GB2233844A - A frequency synthesiser - Google Patents
A frequency synthesiser Download PDFInfo
- Publication number
- GB2233844A GB2233844A GB8921444A GB8921444A GB2233844A GB 2233844 A GB2233844 A GB 2233844A GB 8921444 A GB8921444 A GB 8921444A GB 8921444 A GB8921444 A GB 8921444A GB 2233844 A GB2233844 A GB 2233844A
- Authority
- GB
- United Kingdom
- Prior art keywords
- frequency
- signal
- voltage controlled
- controlled oscillator
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000001413 cellular effect Effects 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0975—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
- H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0941—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/095—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
- H04L27/2007—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained
- H04L27/2017—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained in which the phase changes are non-linear, e.g. generalized and Gaussian minimum shift keying, tamed frequency modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C2200/00—Indexing scheme relating to details of modulators or modulation methods covered by H03C
- H03C2200/0004—Circuit elements of modulators
- H03C2200/0029—Memory circuits, e.g. ROMs, RAMs, EPROMs, latches, shift registers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/06—Means for changing frequency deviation
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
In a modulator for frequency synthesised signals, including a phase lock loop comprising a reference oscillator 8, providing a reference signal to a first input of a phase or frequency comparator 6, a voltage controlled oscillator 2 whose output signal is fed back by way of a variable frequency divider circuit 4 second input of the comparator 6 whose output is applied to a control input of the voltage controlled oscillator, a modulation input signal R is applied to control the output frequency of the voltage controlled oscillator 2 and to control the value N of the variable divider, 4. The operation of the modulator is thus made independent of the actual value N of the divider. The modulation signal is integrated at 24 for controlling divider 4 and applied via a sealer divider 20 to a summing unit 22. The integrated signal is applied via a further sealer 26 to a further summing unit 28 to provide additional adjustment when the value of N is low or the frequency deviation of 2 is small <IMAGE>
Description
A FREOUENCY SYNTHESISER This invention relates to frequency synthesis, in particular direct modulation of a frequency synthesiser to produce wide band modulation.
The present invention has particular application to cellular radio, for mobile telephone systems.
With the adoption of the GSM (Groupe Speciale Mobile) system for a Pan-European Mobile Telephone System [ see for example
Electronics and Communication Engineering Journal Jan/Feb. 1989 vol. 1 no. 1 pp. 7 to 13, "Pan-European cellular radio", D.M. Balston], a number of difficult technical problems have to be overcome for satisfactory implementation of the system.
In the GSM system, data to be transmitted is modulated onto a 900 MHz carrier by a Gaussian minimum shift keying technique (GMSK). Frequency Channels are provided at a spacing of 200 kHz and data is transmitted on each channel at a total rate of 270.833 kbits-1.
One major problem is that of modulation of data onto the UHF carrier wave. GMSK modulation produces a lower spectral occupancy than frequency shift keying or differential phase modulation. In
GSM, the data transmission rate (270.833 kbit/s) is higher than the channel spacing (200 kHz). The bandwidth of the signal must be less than 100 kHz, and this makes the task of modulation difficult.
Normally a phase lock loop system is employed for frequency synthesis so that the transmission frequency as synthesised by the frequency synthesiser can rapidly be changed between channels by changing the division ratio. Conventional methods of modulation, such as modulating the frequency produced by a crystal and then mixing that signal with a UHF signal produced from a synthesiser are too bulky and expensive to be employed in say a user handset of a mobile telephone. Methods have therefore been developed for modulating directly the phase lock loop. One method which is employed for direct modulation is to modulate the phase of a reference crystal oscillator for the phase lock loop. However the problem here is that modulation frequencies are required down to DC and up to around 250 kHz. The high frequency modulations will be filtered out by the filters within the phase lock loop.Another method is direct modulation of the VCO in the phase locked loop.
Here however the low frequency modulations are filtered out by the loop.
A method which has been employed to overcome these problems of modulation in phase lock loops is known as two-point modulation schemes: see IERE Conference Proceedings No. 44,
Conference on Land Mobile Radio, September 1979 pp. 183-191 "FM
Modulation of Frequency Synthesisers", R.I.H. Scott and
M.J. Underhill. Such a scheme is shown in figure 1 wherein a phase locked loop comprises a voltage controlled oscillator 2, a variable divide by N circuit 4, a phase sensitive detector 6 which compares the signal from oscillator 2 as divided by circuit 4 with a reference frequency provided by a crystal oscillator 8 as divided in a divide by
M circuit 10. The output of the phase sensitive detector 6 is applied through a low pass filter 12 to oscillator 2.A modulation input signal
R is applied simultaneously to multipliers 14 and 16 for modulating the voltage controlled oscillator 2 and the reference crystal oscillator 8 respectively.
In operation of the circuit of figure 1, when the modulation signal R produces an increase in phase 6 in the output of the VCO, then the same phase increase s is produced in the output of reference oscillator 8. Hence phase sensitive detector 6 does not react to the phase increase, since the phase increases will be present at both inputs and are cancelled out within the detector; similarly the low pass filter 12 does not experience any phase change. However naturally the output of the oscillator 2 will be suitably modulated.
The theory of operation is described in more detail in the aforesaid article.
The arrangement of Figure 1 has the disadvantage that variation of the number N in the counter 4 (i.e. of the RF channel selected by the number N) may adversely affect the modulation.
This may be understood since the phase sensitive detector 6 will be comparing the output from oscillator 2 as divided by divider 4 and then hence a frequency change in oscillator 2 produced by the modulation R will be correspondingly reduced by divider 4 whereas the reference signal from oscillator 8 will not be reduced by the factor N. Whilst it is possible to compensate for this variation by providing a digitally controlled attenuation network, this naturally increases the complexity of the circuit.
With a view to overcoming this problem, the present invention provides a modulator for frequency synthesised signals, the modulator including a phase lock loop comprising a reference oscillator for providing a reference signal to a first input of a frequency or phase comparator, a voltage controlled oscillator for providing an output signal for the loop, which output signal is fed back by way of a variable frequency divider circuit for dividing the output frequency by a factor N to a second input of the frequency or phase comparator, the output of the comparator being applied to a control input of the voltage controlled oscillator, and wherein a modulation input signal is applied to control the output frequency of the voltage controlled oscillator and to control the value N of the variable divider.
Thus in accordance with the invention if a modulation input signal produces a phase or frequency change in the output of the voltage controlled oscillator, the modulation input signal is arranged to produce a corresponding change in the variable divider value N such that the divided value of frequency applied to the phase sensitive detector remains constant so that the phase sensitive detector does not experience any apparent change of frequency.
Thus, if a change in modulation input signal 8R produces a change 8f in the VCO output signal f, and a change 8N in the divider value N, then for a constant frequency value fN applied to the input of the phase sensitive detector: fN = f = f + #f
N N+#N fN= f = f+#f
N N+#N f(N+#N)=N(f+#f) fN+f#N=Nf+#f thus #N = #f for correct operation.
N f
Thus in accordance with the invention, the operation of the circuit is not dependent on the specific value of N placed in the frequency divider circuit.
However in situations where the value of N is low, or the frequency deviations at the VCO output are small then it may not be possible to get sufficient resolution in the incremental value 8N to provide appropriate compensation. Thus in accordance with a further feature of the invention an extra compensation signal with finer resolution may be added at an appropriate part of the circuit, for example the loop filter input.
A preferred embodiment of the invention will now be described with reference to the accompanying drawings wherein:
Figure 1 is a block schematic view of a phase lock loop of a known form incorporating a two point modulation scheme; and,
Figure 2 is a block schematic view of a frequency synthesiser according to the invention incorporating two point modulation.
Referring now to Figure 2, similar parts to those shown in
Figure 1 are identified by the same reference numeral. In addition, modulation input R is applied via a scaling unit 20 to a summer unit 22 where the scaled value of the frequency deviation is added with the frequency signal provided from low pass filter 12 and applied as an input to oscillator 2. In addition, modulation input R is integrated in an integrator 24 in order to produce a phase change signal which is applied to divider circuit 4 causing incremental phase changes of SN. Phase changes between the incremental levels 8N are applied through a scaling circuit 26 to a summer 28 where the scaled phase change value is summed with the output from phase sensitive detector 6. In addition, a control 30 is provided for setting a nominal value of N.
Thus in operation of the invention, when modulation input signal R is applied this produces a signal RKdev which is summed with the signal from low pass filter 12 to produce a deviation in the output frequency of oscillator 2. In addition this modulation input signal is integrated to produce a phase change signal which is applied to divider N to produce an appropriate change in the value of N. It may be understood that a change in N is equivalent to a phase change in the divided signal fN, since a single cycle of VCO output f when divided by N may be thought of in simple terms as equivalent to a phase change N-1*2it. This change in the value of N is arranged to cancel out the change in output frequency of oscillator 2 so that the signal applied to phase sensitive detector 6 remains constant.In situations where the absolute value of N is low, it may not be possible to produce a change in N which is sufficiently resolved to achieve appropriate compensation and in these circumstances the integrated value of phase change applied to summer 28 produces a further correction in the output from phase sensitive detector 6 to compensate to the required degree of fine resolution.
Thus it may be seen that the invention described above concerns two point modulation of the frequency synthesiser. The two points modulated are the voltage controlled oscillator and the variable divider counter with extra compensation added to the loop filter input to account for quantisation of the value of N. This produces direct wide band modulation (extending down to zero Hz) of an RF carrier and enables the use of low comparison frequencies to produce fine RF channel spacings. The resulting modulation is independent of N (the selected channel).
Claims (8)
1. A modulator for frequency synthesised signals, the modulator including a phase lock loop comprising a reference oscillator for providing a reference signal to a first input of a frequency or phase comparator, a voltage controlled oscillator for providing an output signal for the loop, which output signal is fed back by way of a variable frequency divider circuit for dividing the output frequency by a factor N to a second input of the frequency or phase comparator, the output of the comparator being applied to a control input of the voltage controlled oscillator, and wherein a modulation input signal is applied to control the output frequency of the voltage controlled oscillator and to control the value N of the variable divider.
2. A modulator according to claim 1 wherein the modulation input signal is applied via an integrator means to the divider circuit.
3. A modulator according to claim 2 wherein the integrated modulation input signal is applied via scaling means to a summing device for summing with the output of the frequency or phase comparator for compensating for situations where N is small.
4. A modulator according to any preceding claim wherein the modulation input signal is applied via scaling means to control the voltage controlled oscillator.
5. A modulator according to any preceding claim wherein the modulation input signal is applied to a summing device for summing with an input signal applied to the voltage controlled oscillator.
6. A modulator according to any preceding claim including a loop filter coupled between the frequency or phase comparator and the voltage controlled oscillator.
7. A modulator according to any preceding claim wherein the frequency or phase comparator is a phase sensitive detector.
8. A modulator substantially as described with reference to Figure 2 of the accompanying drawings.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE69026151T DE69026151T2 (en) | 1989-07-08 | 1990-07-03 | Frequency synthesizer |
| EP90307270A EP0408238B1 (en) | 1989-07-08 | 1990-07-03 | A frequency synthesiser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB898915719A GB8915719D0 (en) | 1989-07-08 | 1989-07-08 | Wide bandwidth direct synthesiser modulation |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB8921444D0 GB8921444D0 (en) | 1989-11-08 |
| GB2233844A true GB2233844A (en) | 1991-01-16 |
| GB2233844B GB2233844B (en) | 1993-05-05 |
Family
ID=10659780
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB898915719A Pending GB8915719D0 (en) | 1989-07-08 | 1989-07-08 | Wide bandwidth direct synthesiser modulation |
| GB8921444A Expired - Lifetime GB2233844B (en) | 1989-07-08 | 1989-09-22 | A frequency synthesiser |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB898915719A Pending GB8915719D0 (en) | 1989-07-08 | 1989-07-08 | Wide bandwidth direct synthesiser modulation |
Country Status (1)
| Country | Link |
|---|---|
| GB (2) | GB8915719D0 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2313001A (en) * | 1996-05-07 | 1997-11-12 | Nokia Mobile Phones Ltd | Frequency synthesiser including PLL data modulator |
| GB2317512A (en) * | 1996-09-12 | 1998-03-25 | Nokia Mobile Phones Ltd | Modulation in PLL frequency synthesizers |
| WO2001022674A1 (en) * | 1999-09-22 | 2001-03-29 | Cadence Design Systems Inc. | Radio transmitter architecture comprising a pll and a delta-sigma modulator |
| GB2389252A (en) * | 2002-05-31 | 2003-12-03 | Zarlink Semiconductor Ltd | A frequency modulation system and method |
| GB2491501A (en) * | 2008-09-05 | 2012-12-05 | Icera Canada ULC | Calibration of a frequency synthesiser for use in a frequency modulator |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2046541A (en) * | 1979-04-11 | 1980-11-12 | Siemens Ag | Frequency modulation |
| US4543542A (en) * | 1983-05-17 | 1985-09-24 | Marconi Instruments Limited | Phase locked loop frequency and phase modulators |
| US4810977A (en) * | 1987-12-22 | 1989-03-07 | Hewlett-Packard Company | Frequency modulation in phase-locked loops |
| EP0322139A2 (en) * | 1987-12-23 | 1989-06-28 | Marconi Instruments Limited | Frequency or phase modulation |
-
1989
- 1989-07-08 GB GB898915719A patent/GB8915719D0/en active Pending
- 1989-09-22 GB GB8921444A patent/GB2233844B/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2046541A (en) * | 1979-04-11 | 1980-11-12 | Siemens Ag | Frequency modulation |
| US4543542A (en) * | 1983-05-17 | 1985-09-24 | Marconi Instruments Limited | Phase locked loop frequency and phase modulators |
| US4810977A (en) * | 1987-12-22 | 1989-03-07 | Hewlett-Packard Company | Frequency modulation in phase-locked loops |
| EP0322139A2 (en) * | 1987-12-23 | 1989-06-28 | Marconi Instruments Limited | Frequency or phase modulation |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2313001A (en) * | 1996-05-07 | 1997-11-12 | Nokia Mobile Phones Ltd | Frequency synthesiser including PLL data modulator |
| US5920556A (en) * | 1996-05-07 | 1999-07-06 | Nokia Mobile Phones Limited | Frequency modulation using a phase-locked loop |
| GB2313001B (en) * | 1996-05-07 | 2000-11-01 | Nokia Mobile Phones Ltd | Frequency modulation using a phase-locked loop |
| GB2317512A (en) * | 1996-09-12 | 1998-03-25 | Nokia Mobile Phones Ltd | Modulation in PLL frequency synthesizers |
| US5889443A (en) * | 1996-09-12 | 1999-03-30 | Nokia Mobile Phones, Ltd | Frequency synthesizing circuit using a phase-locked loop |
| GB2317512B (en) * | 1996-09-12 | 2001-01-24 | Nokia Mobile Phones Ltd | Frequency modulation using a phase-locked loop |
| JP2003510899A (en) * | 1999-09-22 | 2003-03-18 | カデンス デザイン システムズ インコーポレイテッド | Wireless transmitter mechanism having a PLL and a delta-sigma modulator |
| GB2371930A (en) * | 1999-09-22 | 2002-08-07 | Cadence Design Systems Inc | Radio transmitter architecture comprising a PLL and a delta-sigma modulator |
| WO2001022674A1 (en) * | 1999-09-22 | 2001-03-29 | Cadence Design Systems Inc. | Radio transmitter architecture comprising a pll and a delta-sigma modulator |
| GB2371930B (en) * | 1999-09-22 | 2004-02-25 | Cadence Design Systems Inc | Radio transmitter architecture comprising a PLL and a delta-sigma modulator |
| JP4808882B2 (en) * | 1999-09-22 | 2011-11-02 | ケイデンス デザイン システムズ インコーポレイテッド | Wireless transmitter mechanism having a PLL and a delta-sigma modulator |
| GB2389252A (en) * | 2002-05-31 | 2003-12-03 | Zarlink Semiconductor Ltd | A frequency modulation system and method |
| US6809585B2 (en) | 2002-05-31 | 2004-10-26 | Zarlink Semiconductor Limited | Frequency modulation system and method |
| GB2389252B (en) * | 2002-05-31 | 2006-09-27 | Zarlink Semiconductor Ltd | A frequency modulation system & method |
| GB2491501A (en) * | 2008-09-05 | 2012-12-05 | Icera Canada ULC | Calibration of a frequency synthesiser for use in a frequency modulator |
| GB2491501B (en) * | 2008-09-05 | 2013-04-10 | Icera Canada ULC | Method and system for calibrating a frequency synthesizer |
| US8836434B2 (en) | 2008-09-05 | 2014-09-16 | Icera Inc. | Method and system for calibrating a frequency synthesizer |
Also Published As
| Publication number | Publication date |
|---|---|
| GB8915719D0 (en) | 1989-08-31 |
| GB8921444D0 (en) | 1989-11-08 |
| GB2233844B (en) | 1993-05-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 730A | Proceeding under section 30 patents act 1977 | ||
| 732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
| PE20 | Patent expired after termination of 20 years |
Expiry date: 20090921 |