GB2225686A

GB2225686A - A delay circuit for a multi-colour-standard television receiver

Info

Publication number: GB2225686A
Application number: GB8917705A
Authority: GB
Inventors: Bum-Hee Nam
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 1988-11-30
Filing date: 1989-08-02
Publication date: 1990-06-06
Anticipated expiration: 2009-08-02
Also published as: FR2639785B1; GB8917705D0; FR2639785A1; DE3925325A1; GB2225686B

Description

h 1 k 1 A DELAY CIRCUIT FOR A MULTIMODE TV The present invention relates

to.a delay circuit for multimode TV in which incoming signals need to be processed in accordance with the broadcasting system used to broadcast the signals.

In a multimode TV, the colour signal and the brightness signal differ from each other in a manner dependent upon the different broadcasting systems which can be accommodated by the TV. Usually. the brightness signal must be delayed so as to be synchronised with the chroma signal. with the delay time varying in accordance with each broadcasting system. That is, the brightness signal must be delayed for a different period for each broadcasting system. if the chroma signal and brightness signal are to be synchronised.

Conventionally. a selecting switch has been used to select an appropriate delay period for each broadcasting s-,.rstem. A typical arrangement is shown in figure 1. wherein the selecting switch is denoted by reference SW1. Using switch SW1 the brightness signal can be synchronised with the chroma signal by applying the brightness signal to one of the delay components, 1 and 2 2, of the brightness signal delay unit 5 - in accordance with the relevant broadcasting system.

In this known method. however. it is difficult to obtain the correct delay time in accord.ance with each different broadcasting system since the selecting switch SW1 must be operated accurately while monitoring the TV screen to ascertain which channel is selected. If the broadcasting system selected by the selecting switch SW1 does not match the actual broadcasting system, the brightness signal and chroma signal are not synchronised and a proper display can not be obtained.

It is an object of the present invention to mitigate the above mentioned disadvantage and to provide a delay circuit in which the brightness signal is automatically delayed in accordance with the particular broadcasting system which is being used.

According to the present invention there is provided a delay circuit for a multimode TV, comprising: a chroma filter. a system selector, a voltage controller and a delay unit. in which the filter, selector and controller operate to provide different control signals to the delay unit such that an input brightness signal is automatically delayed in accordance with the broadcast system used to broadcast the signal applied to the c 3 circuit.

An embodiment of the present invention will now be described. by way of example only and with reference to the accompanying drawings. in which:Figure 1 is a circuit diagram of a conventional arrangement.

Figure 2 is a block diagram of an embodiment of the present invention, and Figure 3 is a more detailed block diagram of the arrangement shown in figure 2.

Figure 2 is a block diagram of the circuit of an embodiment of the present invention. The input video signal is applied to a chroma filter in which the signal is filtered in accordance with each broadcasting system which may be used. After being filtered. the signal is applied to a system selector circuit 7.

The system selector circuit 7 provides a different control signal output (shown as a. b or c) in accordance with the broadcasting system which is in use. The control signal is applied to a voltage controller 8. That is. the chroma signal of the input video signal is 4 filtered in order to determine which broadcasting system is in use. This is achieved by chroma filter 6 and system selector circuit 7. System selector circuit 7 provides a control signal (a. b or c) which identifies the relevant broadcasting system (such as NTSC, PAL or SECAM) to the voltage controller 8. The system selector circuit 7 can be implemented using integrated component TDA 4555 manufacture by Philips. Chroma filter 6 can be implemented using resistors, condensors and an inductance coil, in accordance with conventional filter circuit design.

Voltage controller 8 provides the appropriate control voltage to analog switches SW2, SW3 and SW4 of the brightness signal delay unit 5. The control signal (a. b or c) output by system selector circuit 7 indicates which broadcasting system is in use. The output of voltage controller 8, which is determined by the input control signal (a, b or c), causes one of the analog switches SW2, SW3 and SW4 to be switched ON. Thus, the brightness signal, which is obtained by passing the input video signal through a chroma trap 9, is applied to a respective delay component 1, 2 or 3. The voltage controller 8 effectively provides separate voltage control for each type of broadcast system. The controller 8 can be implemented using integrated component TDA 4565 manufactured by Philips. Chroma trap 9 may be implemented as a conventional trap circuit. comprising resistors, condensors and an inductance coil.

The brightness signal outut from the chroma trap 9 is delayed in the appropriate delay.component (1, 2 or 3) in accordance with the output of the voltage controller 8. The delay components 1. 2 and 3 have respectively different time delays.

System selector circuit 7 distinguishes between the different chroma signals of each broadcasting system and outputs one of the control signals a. b and c as a HIGH level signal, as appropriate. Voltage controller 8 outputs a different voltage for each of the input control signals (a, b or c). The control voltages from controller 8 selectively drive switches SW2, SW3 and SW4 of the brightness signal delay unit 5. in accordance with the broadcasting system which is currently in use. Thus, the brightness signal is output after being delayed by one of the delay components 1, 2 and 3.

Figure 3 shows the circuit of figure 2 in greater detail. Specifically. a circui.-. for implemental voltage controller 8 is shown in detail. As illustrated, the controller is constructed such that control signals a, b and c from the system selector circuit 7 are each applied to the base of a respective transistor Q1 - Q3.

6 via a respective resistor, R1 - R3. Transistors Q1 - Q3 are connected to a supply voltage Vcc via respective collector resistors R4 - R6. The emitter of transistor Q1 is connected to the emitter of transistor Q2 by resistor R7. The emitter of transistor Q2 is connected to that of transistor Q3 and to the output of the _controller 8 by resistor R8. The output of the controller and the emitter of transistor Q3 are connected to ground via resistor R9.

The relationship between the output of controller 8 and the time for which the brightness signal is delayed in unit 5 is as follows:- voltage control 0 - 2.5 V 3.5 - 5.5 V 6.5 - 8.5 V 9.5 - 12 V delay time (n sec) 720 810 900 990 The operation of the circuit will now be explained in more detail. First. the input video signal from an as yet. unidentified broadcasing system is applied to the chroma filter 6. The signal is filtered and applied to the system selector circuit 7 such that the relevant broadcasting system is identified. One of the control signals a, b and c is output in accordance with the z 7 identified broadcasting system.

For any broadcasting system which is recognised, or accommodated, by the apparatus, the input video signal is filtered by the chroma filter and is applied to the system selector circuit 7; such that the specific broadcasting system is identified and the corresponding control signal a. b or c is output to the voltage controller. Thereby, the appropriate time delay of the brightness signal can be achieved.

For example: in the case of the PAL system. selector 7 provides control signal a; in the case of the SECAM system, selector 7 provides control signal b; in the case of the NTSC system. selector 7 provides control signal c.

Control signals a, b and c, which are different from each other. are applied to the voltage controller 8 so that a different voltage is used to control the ONIOFF state of switches SW2. SW3 and SW4 in the brightness signal delay unit 5. - In the case of use of the PAL system, only control signal a is provided as a HIGH level signal. Consequently, transistor Q1 is switched ON, while transistors Q2 and Q3 remain OFF. Thus, the supply 8 voltage Vcc is divided by resistors R4, R7. R8, and R9 and is then applied to the brightness signal delay unit 5.

In the case of use of the SECAM system, only control signal b is provided as a HIGH level signal. Consequently, transistor Q2 is switched ON, while transistors Q1 and Q3 remain OFF. Thus. supply voltage Vcc is divided by resistors RS, R8 and R9 before being applied to the brightness signal delay unit 5.

In the case of use of the NTSC system. only control signal c is provided as a HIGH level signal. Consequently. transistor Q3 is switched ON, while transistors Q1 and Q2 remain OFF. Thus. supply voltage Vcc is divided by resistors R6 and R9 before being applied to the brightness controller unit 5.

If resistors R4 - R9 all have the same value, the lowest voltage control signal is provided in the case of the PAL system, the highest voltage is provided in the case of the NTSC system and a medium voltage is provided in the case of the SECAM system. That is. the control voltage provided by the voltage controller 8 is different for each broadcasting system. These different control signals selectively drive switches SW2, SW3 and SW4 so that the brightness signal output by the chroma 0 1 9 trap 9 is delayed by the appropriate one of delay components 1, 2 and 3.

In accordance with the control voltage output-by voltage controller 8. one of the switches SW2. SW3 and SW4 is automatically turned on. Thus. one of delay components 1, 2 and 3 is selected and the brightness signal from chroma trap 9 is output via the selected delay component.

As described above. the present invention mitigates the problem of the chroma signal and the brightness signal being out of relationship with each other because of the use of an incorrect delay time, resulting from manual selection between broadcasting systems. In the present invention the correct delay is automatically selected for each broadcasting system.

The invention is not limited to the embodiment described hereinabove. Various modifications of the disclosed embodiment as well as other embodiments of the invention will be apparent to persons skilled in the art upon reference to the above description of the invention. All such modifications and embodiments fall within the scope of the invention.

1

Claims

Claims:

1. A delay circuit for a multimode TV, comprising: a chroma filter. a system selector, a voltage controller and a delay unit. in which the filter, selector and controller operate to provide different control signals to the delay unit such that an input brightness signal is automatically delayed in accordance with the broadcast system used to broadcast the signal applied to the circuit.

2. A circuit as claimed in claim 1, wherein the voltage controller comprises a voltage divider controlled by a plurality of transistors each of which is arranged to be switched by a respective control signal from the system selcctor.

3. A circuit as claimed in claim 2, wherein the base of each transistor is connected to a separate input of the controller by a respective resistor and the collector of each transistor is connected to a common supply voltage by a respective resistor. the emitters of the transistors being connected in series by a number of resistors and being connected to the output of the controller.

4. A circuit as claimed in any preceding claim. wherein 11 the delay unit comprises a plurality of separate time delay components which are selected in accordance with the different control voltages applied thereto by the said voltage controller in accordance with the broadcas system used to broadcast the signal applied to the circuit.

5. A circuit as claimed in any preceding claim, comprising a chroma trap which receives the said applied.signal and outputs the said brightness signal.

6. A delay circuit for a multimode TV, substantially as hereinbefore described with reference to and as illustrated in Figures 2 and 3 of the accompanying. drawings.

Published 1990 at The Patent Office, State House. 5671 High Holborn. LondonWClR4TP-F'L=her copies maybe obtained from The Patent Office. Sales Branch. St Mary Cray. Orpington. Kent BR5 3RD. Printed by Multiplex techniques Itd. St Mary Cray. Kent. Con 1'87