GB2224907A - Producing three-level television sync pulse signal - Google Patents
Producing three-level television sync pulse signal Download PDFInfo
- Publication number
- GB2224907A GB2224907A GB8922573A GB8922573A GB2224907A GB 2224907 A GB2224907 A GB 2224907A GB 8922573 A GB8922573 A GB 8922573A GB 8922573 A GB8922573 A GB 8922573A GB 2224907 A GB2224907 A GB 2224907A
- Authority
- GB
- United Kingdom
- Prior art keywords
- signal
- level
- input
- control
- voltage divider
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/16—Conversion to or from representation by pulses the pulses having three levels
- H03M5/18—Conversion to or from representation by pulses the pulses having three levels two levels being symmetrical with respect to the third level, i.e. balanced bipolar ternary code
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/015—High-definition television systems
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Details Of Television Scanning (AREA)
- Television Systems (AREA)
- Synchronizing For Television (AREA)
Description
2224907 METHOD FOR PRODUCING A THREE-LEVEL PULSE SIGNAL This invention
relates to a method for producing a three-level pulse signal.
For synchronizing equipment in a television transmission system a sync signal is required which must generally be added to the television signal during the production of the latter. This sync signal comprises two components. namely the horizontal component for synchronising the horizontal deflection and the vertical component for synchronizing the picture deflection. Methods and circuits are known which produce sync signals with only two different levels, such as has hitherto been used in standard television systems. Of late, preference has been given in the case of high- definition television (HDTV) systems to sync signals which can have three different levels (c.f. for example SMPTE Journal, November, 1987, pp. 1150 to 1152). The advantage of such sync signals is that they are free from mean values, that is they contain no d.c.
voltage component.
The object of the present invention is to provide a simple and inexpensive method for producing a threelevel pulse signal.
Accordingly, the invention provides a method for producing a three-level pulse signal, comprising providing a tristate gate and a voltage divider t connected between an operating potential and a reference potential. the tristate gate having a -signal input, a control input and a signal output with the signal output being connected to the tap of the voltage divider, the method further comprising providing first and second binary pulse signals as control and input signals respectively to the tristate gate to produce the said three-level pulse signal at the tap of the voltage divider, the control signal causing the tristate gate to be transmissive of the input signal when the control signal is at one level and non-transmissive when the control signal is at its other level,yhereby the three-level pulse signal is at a first level corresponding to the low level of the input signal when the control signal is at its said one level and the input signal is low, at a second level corresponding to the high level of the input signal when the control signal is at its said one level and the input signal is high, and at an intermediate third level corresponding to the potential-at the tap of the voltage divider when the control signal is at its said other level.
The invention further provides a circuit for producing a three-level pulse signal, comprising a tristate gate and a voltage divider connected between an operating -potential and a reference potential, the tristate gate having a signal input, a control input and a signal output with the signal output being connected to the 1 tap of the voltage divider, a binary control signal applied at the control input of the tristate gate causing the tristate gate to be transmissive of an input signal when the control signal is at one level and non-transmissive when the control signal is at its other level.
The invention has the advantage that, despite simple construction, it is possible to --obtain therewith a precisely defined zero crossing of the three-level pulse signal, without any adjustments being required during operation.
An embodiment of the invention will now be particularly described with reference to the attached drawing, in which:
Figure 1 is a block diagram of a circuit for performing an ernl?odiment of the present invention, and Figure 2 shows in a, h and c the various pulse signals occurring at the similarly lettered points in the circuit of Figure L Referring to the drawing, the three-level pulse signal shown in line a of Figure 2 can be produced with the --- circuit of Figure 1, in response to the signals shown in lines b and c of Figure 2. The three-level pulse signal shown in line a of Figure 2 is in this embodiment a sync signal for HDTV, and line a of Figure 2 shows the three required components, i.e. the line or horizontal frequency component H for controlling horizontal deflection,.and _the 'vert. ical frequency components for lines 6gS and 1250 which control the vertical deflection.
The circuit of Figure 1 comprises a tristate gate 1 and a voltage divider 2, 3 connected between an operating potential +U b and a reference potential, for example ground, the tristate gate having a signal input 5, a control input 4 and a signal output 6 which is connected to the tap of the voltage divider.
To produce the three-level pulse signal shown in line a of Figure 2 at the signal output 6, the first and second binary pulse signals shown in lines b and c of Figure 2 respectively are provided as control and input signals respectively to the tristate gate 1.
The control signal b in Figure 2 causes the tristate gate 1 to be transmissive of the input signal c in Figure 2 when the control signal is low, and nontransmissive when the control signal is high.
-Accordingly, the three-level pulse signal a in Figure 2 is at a first, lowest, level corresponding to the low level of the input signal when both the control and input signals are low, at a second, highest, level corresponding to the high level of the input signal Y 1 1 when the control signal is low and the input signal is high, and at a third,- intermed iatelevel corresponding to the potential at the tap of the voltage divider when the control signal is high and the 5 tristate gate 1 therefore non-transmissive.
By inspection of Figure 2 it will be seen that the HDTV sync-signal shown in line a will indeed be produced at the output 6 (Figure 1) by the application at the control and signal inputs 4 and 5 respectively of the binary pulse signals shown in lines b and c.
In this embodiment the high level of the input signal at the input 5. is. equal to the operating potential +Ub and the low level of the input signal is equal to the reference potential, and the resistance values of the resistors 2 and 3 of the voltage divider are equal.
Thus, when the tristate gate 1 is non-transmissive the tap of the voltage divider provides at the output 6 a potential midway between the reference and operating potentials. In other words, the intermediate third level of the three-level pulse signal referred to above is exactly midway between the highest and lowest levels.
It is to be understood that the invention is not limited to the production of a.three-level sync signal for HDTV, but may be used for the production of a threelevel pulse signal of any desired form by suitable choice 4 of the binary control and input signals at the tristate gate inputs 4 and 5 respectively.
t k 11 4
Claims (5)
1. A method for producing a three-level pulse signal, comprising providing a tristate gate and a voltage divider connected between an operating potential and a reference potential, the tristate gate having a signal input, a control input and a signal output with the= signal output being connected to the tap of the voltage divider, the method further comprising providing first and second binary pulse signals as control and input signals respectively to the tristate gate to produce the said three- level pulse signal at the tap of the voltage divider, the control signal causing the tristate gate to be transmissive of the input signal when the control signal is at one level and non transmissive when the control signal is at its other level, whereby.the three-level pulse signal is at a first level corresponding to the low level of the input signal when the control signal is at its said one level and the input signal is low, at a second level corresponding to the high level of the input signal when the control signal is at its said one level and the input signal is high, and at an intermediate third level corresponding to the potential at the tap of the voltage divider when the control signal is at its said other level.
2. A method as claimed in claim 1, wherein the high level of the input signal is equal to the operating 4 k potential and the low level of the input signal is equal to the reference potential, and wherein when the tristate gate is non-transmissive the tap -.;.of the voltage divider provides a potential midway between the reference and operating potentials.
3. A method as claimed in claim 1 or claim 2, wherein the three-level pulse signal is a synchronizing signal containing horiz ontal and vertical frequency components for HDTV.
4. A method for producing a three-level pulse signal, substantially astereinbefore described with reference to the accompanying drawing-z
5. A circuit for producing a three-level pulse signal, comprising a tristate gate and a voltage divider connected between an operating potential and a reference potential, the tristategate having a signal input, A control input and a signal output with the signal output being connected to the tap of the voltage divider, a binary control-signal. gpplied_at the control input of the tristate gate causing the tristate gate to be transmissive of an input signal when the control signal is at one level and non-transmissiVe when the control signal is at its"other level.
m&ybSobuurAdfr=Thp6WntOMCe Nnoth. It Mary Cray. Orpingwn. Kent 285 3RD. Printsd bY Mu]UPIex Whniques Itd. St Mary Cray. Kent, Can 1187 1 1 I;
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19883834259 DE3834259A1 (en) | 1988-10-08 | 1988-10-08 | CIRCUIT FOR GENERATING A THREE-LEVEL PULSE SIGNAL |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8922573D0 GB8922573D0 (en) | 1989-11-22 |
GB2224907A true GB2224907A (en) | 1990-05-16 |
Family
ID=6364654
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8922573A Withdrawn GB2224907A (en) | 1988-10-08 | 1989-10-06 | Producing three-level television sync pulse signal |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE3834259A1 (en) |
FR (1) | FR2637748A1 (en) |
GB (1) | GB2224907A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5387944A (en) * | 1992-06-03 | 1995-02-07 | Matsushita Electric Industrial Co., Ltd. | Video signal processing apparatus having digital multivalue synchronizing signal generating circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19826458A1 (en) | 1998-06-13 | 1999-12-16 | Papst Motoren Gmbh & Co Kg | Arrangement with an electric motor |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1210961B (en) * | 1982-12-17 | 1989-09-29 | Ates Componenti Elettron | THREE STATE LOGIC CIRCUIT OUTPUT INTERFACE IN "MOS" TRANSISTORS. |
-
1988
- 1988-10-08 DE DE19883834259 patent/DE3834259A1/en not_active Ceased
-
1989
- 1989-07-12 FR FR8909385A patent/FR2637748A1/en active Pending
- 1989-10-06 GB GB8922573A patent/GB2224907A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5387944A (en) * | 1992-06-03 | 1995-02-07 | Matsushita Electric Industrial Co., Ltd. | Video signal processing apparatus having digital multivalue synchronizing signal generating circuit |
Also Published As
Publication number | Publication date |
---|---|
GB8922573D0 (en) | 1989-11-22 |
DE3834259A1 (en) | 1990-06-07 |
FR2637748A1 (en) | 1990-04-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |