GB2224170A - Electronic ballast circuit for discharge lamps - Google Patents

Abstract

Fluorescent lamps are energised by respective windings of a transformer TX1 having a primary winding 52 connected to switches 4, 5 operated in push-pull by a pulse width control integrated circuit IC. The control IC initially operates in a soft- start mode with a minimum pulse width which is increased to about 50% when a capacitor C3 has charged. A preheating function is provided by operating switches 4, 5 at a frequency above the resonant frequency of series circuits L1, C13, L2, C14 for a predetermined time so that the voltage developed across the lamps is too low to ignite then when a capacitor C2 has charged, a transistor T7 turns on resulting in operation at the resonant frequency. The operating frequency may be adjusted manually to compensate for mains voltage variations or for dimming the lamps. Dimming may alternatively be effected by pulse width adjustment. A safety circuit 6 turns off drive signals to switches 4, 5 in response to high voltage at lamp terminals A, a if one or both lamps fail to strike circuit 6 is also responsive to lamp current sensed by secondary windings L1', L2' on ballast inductors L1, L2, and inhibits the control IC if one or both lamps are missing or go out during running. A power supply for the control IC is derived via a resistor R29 and thyristor TH2 initially, and from an auxiliary winding 52' on transformer TX1 when the lamps are running. <IMAGE>

Description

ELECTRONIC BALLAST CIRCUITS The present invention relates to electronic ballast circuits for driving discharge lamps particularly of the fluorescent type.

The present invention provides an electronic ballast for driving discharge lamps from a a suitable supply including a pulse width modulated switched mode power supply (SMPS) the output of which is used to control the supply of current to a discharge lamp when connected.

The electronic ballast circuit may provide a means for dimming the discharge lamp by alteration of the output of the switched mode power supply.

The electronic ballast circuit may also provide means for compensating for variations in mains supply voltage.

The switched mode power supply may also provide drive signals for push pull switching devices controlling a transformer providing power for the discharge lamp means being provided for ensuring that push and pull switching devices are'not conducting at the same time.

Embodiments of the present invention will now be described, by way of example with reference to the accompanying drawings in which: Figure 1 shows a circuit of an electronic ballast according to the present invention; Figures 2A to P show waveform timing diagrams illustrating voltage levels at various positions in the circuitry; Figure 3 shows a block diagram of the switching control block of Figure 1; Figure 4 shows a circuit of an alternative electronic ballast according to the present invention; Figure 5 shows a modification to the circuitry of Figure 4.

With reference now to Figure 1, the circuitry comprises a rectifier block 10, a switching control block 20, two driver control blocks 30 and 40, a transformer block 50 and two discharge lamps 60 and 70.

The rectifier block 10 provides at its output a high voltage (200V D.C.) output which is connected to the centre tap of primary winding of transformer 52, the output of which powers the lamps 60 and 70.

Transformer 52 is switched by transistors 300 and 400 in drivers 30 and 40 respectively. Transistors 300 and 400 could be any suitable semiconductor switching device, e.g. MOSFETS, power transistors, etc. Because these blocks are identical in operation only one will be described in detail.

Control block 30 includes a control input from block 20 having waveform B thereon. (This waveform alternates with waveform A but with no overlap). This controlling waveform B switches on and off power transistor 300 via transistor 302 (waveform H), transistor 304 providing a fast turn off by pulling current out of the base of transistor 300 on turn off.

Transformer 52 is therefore switched in a push-pull manner by transistors 300, 400 and thereby waveforms M and N are provided to chokes 54, 56 to produce waveforms 0 and P which power the lamps 60, 70.

The switching control block 20 comprises in a preferred example a 2525A regulating pulse width modulator I.C. which provides at its outputs 14 and 11 the complementary waveforms A and B. Other members of the family 1527 and 3527 or 1525, 2525, 3525 could be used or other suitable switched mode controls. The timing for this modulator is provided by an external capacitor C connected to pin 5 and resistor R2 on pin 6. Resistor Rs which is connected between pins 5 and 7 also gives a required delay time between waveforms A and B thereby ensuring that transistors 300 and 400 cannot be both conducting at the same time.

The value of Resistor R1 connected between pins 16 and 2 may be changed to provide on chip control of dimming of lamps 60, 70 by control of the on time of waveforms A and B. Alternatively resistor R1 may be set to a desired value for optimum working.

A resistor R2 is connected between pin 6 and earth.

Resistor R2 is the oscillator timing resistor which sets the circuit frequency. The value of this resistor may be varied to alter the frequency to increase or decrease lamp power with respect to mains input voltage as a compensation measure or to dim the lamp by making R a variable resistor. This compensation may also be made by adjusting pulse width.

The value of Resistor R2 is in a preferred embodiment modified by a "pre-heat" circuit 200. On switch on, R2 is modified by pre-heat circuit 200 to produce an approximate 40kHz o/p which is used to drive the lamps 60, 70 without producing a starting voltage. This is because the inductances 52, 54 and the respective capacitances CL across lamps 60,70 (lON. Farad) are tuned to a resonance frequency of 35 kHz and therefore the approximate 40kHz output provides current through the lamp cathodes, but does not establish the lamp striking voltage.

At a set time after switch on determined by pin 16 (reference voltage) charging capacitance CS the transistor TS switches off and resistor R2 is modified because there is no parallel resistor and the output frequency then becomes the normal frequency of 35kHz providing a lamp striking voltage because of the resonance of 54, 56, inductances and lamp capacitances CL.

With reference now to Figure 3 the block diagram of control circuit 20 is shown for reference purposes. The circuit operates as described to provide complementary outputs at terminals 11 and 14 these outputs being timed as described above and the delay time between outputs 11 and 14 being controlled by the provision of external resistor R3 connected from pin 5 to pin 7.

A d.c. supply for the SMPS chip is provided by circuit 100. Circuit 100 (Fig. 1) is normally driven by an auxiliary winding 52' on transformer 52 to supply 12 volts d.c. On start up resistor RS provides a direct feed which slowly charges capacitor CVS. When the voltage on capacitor CVS exceeds 12 volts thyristor THS fires and a short duration power supply is set up until auxiliary winding 52' takes over.

A soft start capacitor CSS is included connected to pin 8. This capacitor causes the SMPS chip to produce narrow output pulses at the time of switch on, these slowly widening to the approximate 50:50 ratio after a short time determined by the value of the capacitance CSS.

Pin 10 on the SMPS chip is shown connected to earth.

However, in a modification pin 10 may be connected to detect the voltage across the lamps (suitably divided down). Thus, when the lamp is operating normally with say 100 volts across the lamp pin 10 may be at ground.

If, however, the lamp starts to flicker or fails to strike the voltage on pin 10 may be caused to rise (by suitably charging a capacitor) and this is effective in switching off the chip thereby preventing further damage to the circuit. Pin 9 may also be used, the IC, however, being turned off when pin 9 of the chip is grounded, the pin being held high during normal running.

With reference now to figure 4, in the alternative embodiment circuit.

The circuit is split into several main sections numbered 1 to 7, all other component parts may be considered separately.

Section 1 The circuit of section 1 controls start up of the electronic ballast. The input to this section is a full wave rectified voltage supplied via bridge RB and filter network FN. Diode D1 feeds the supply to smoothing capacitors C17 and C18 and to the centre tap of the main transformer Try1. Connection of section 1 is between bridge RB and diode D1. This full wave signal is derived to allow a subsequent current zero which will enable thyristor TH2 to turn-off following an inhibited gate signal.

A current is drawn through resistor R2 9 and thyristor TH2 to charge internal power supply capacitor C2 1 The gate signal for a thyristor TH2 is taken via resistor Rg, capacitor C5 and diac DI1. Once capacitor C2 i is charged to zener diode voltage Ds thyristor TH1 turns on, current flows from C21 and the circuit begins to operate.

This low voltage DC supply to the IC and other associated circuitry will now be maintained from the auxiliary winding on the main transformer TXl. Therefore, current need not be drawn through R29 and thyristor TH2 any longer.

From the rectified AC signal, capacitor C6 is charged through resistor R12 until a voltage is reached which will turn-on transistor T1 which inhibits the drive to thyristor TH2 by discharging capacitor C5. The thyristor TH2 is now turned off at next curren zero reducing considerably power dissipation in resistor R29. Resistor R25 is connected across capacitor C6 to enable a reasonable reset time in case of interruption of the mains supply.

In an alternative embodiment shown in Fig.5, section 1 may be replaced by section 1'. In this circuit, circuit current is supplied via R29 and P.T.C. 1 (positive temperature coefficient resistor) to charge capacitor C21.

As a current flows through P.T.C 1 it heats up and after a period of time the resistance substantially increases and current flow is thereby substantially reduced, reducing dissipation in R29 Section 3 This section of circuitry provides a low voltage (approx 13v) supply to the internal circuitry for the IC and for blocks 4, 5 and 7. The voltage is supplied from a centre tapped auxiliary winding 52' on the main transformer 52(TX1), which is rectified using diodes D11 and D12. Capacitor C4 eliminates any high frequency transients, inductor Ls smooths the supply and capacitor C21 is the supply reservoir. The network TH1, Ds and R28 cts as described under section 1.

Sections 4 and 5 These are identical in operation. The PNP transistor T6 (T9 ) receives signals from the IC, the current drawn from the IC to the transistor is limited by resistor R19 (Rll) whilst the capacitor Cs (C7) acts as a speed up capacitor to enhance the speed of switching.

Transistor T6 (T9) being the PNP type switches on with a zero volt output from the IC, this then delivers current from the internal DC rail supply which is suppressed by capacitors C19 (C16 ) and C20 (C22) via resistor R24 (R15) which suitably limits this current to power transistor Ts (T8). Diodes D6 (D3) and D7 (D4) are in Baker clamp formation and prevent transistor T5 (T8) becoming over-saturated.

The power transistor emitter network consisting of diodes D16 (D13), D15 (D14) and capacitor C26 (C25) float the power transistor emitter at a voltage level of 1.4 volts approximately, this to be used to enhance turn-off speed when transistor T3 (T4 ) is turned on from positive going signal level from IC via resistor capacitor network R2o (rio) and C27 (C28).

The diode D8 (D5) prevents reverse conduction of power transistor T5 (T8).

Resistor R22 (R13) pulls the collector of transistor T6 (T9) down to ground on the turning off of such transistor.

Resistor R26 (R17 ) discharges any base capacitance of power transistors Ts (T8).

Section 2 This circuitry delivers the power to, for example two 50 watt lamps 60, 70 in operation. The primary winding of transformer 52 is centre tapped with transistors T5 and T8 alternatively switching current to circuit ground in push-pull operation. Each lamp circuit has its own secondary winding both of which are identical in nature.

Capacitors C23 and C24 act as snubbers to control secondary voltage and to eliminate any high frequency transients. The lamp control mechanism is through inductors L1 and L2 and capacitors C13 and C14. Such inductors are tuned to resonate with the capacitors at the frequency which is controlled by the IC. When the circuit is switched on the IC runs at a higher frequency than the resonant frequency (see section 7) which will provide a current through the lamps to pre-heat the cathodes but with a voltage insufficient to strike the lamp.

After a predetermined time the frequency is changed from this high frequency state to the resonant frequency.

At resonance a high voltage is produced at points A and B in the lamp circuit of sufficient magnitude to strike the lamp (say 700v). When the lamps are running there current are limited by inductors L1 and L2 to satisfy the lamp requirements.

Voltage suppressor diodes D17 , D18 , D19 and Dzo are in connection across the primary windings to suppress the abnormally high transformer voltage which is seen during the pre-heat time prior to striking the lamp. Controlling this voltage protects the semiconductor devices in sections 4 and 5.

Section 7 This circuit performs various functions. Capacitor C3 connected to IC pin 8 controls the soft start function.

At switch on when the capacitor is discharged the pulse width is at a minimum and opens out to approximately 50% at a time determined by the value of the capacitor.

Resistors Rg, Rs and capacitor C1 control the frequency and overlap or delay time. The overlap or delay time is the time at which both outputs are off (or on) in this case so as to avoid simultaneous conduction of the power transistors. Since the pre-driver transistors in this case (T6 + Tg) are of the PNP type and turn on with a negative going edge the IC has now been chosen to be a 2727A such that the overlap or delay time has both outputs high simultaneously. The overlap or delay time control resistor in this case is Rs.

The IC frequency is determined by Re and C1, resistor R6 being fixed. In order to change the frequency to enable a pre-heat of the cathodes resistors Rl and R3 are switched across capacitor C1 with the use of transistor T7 . The damping effect of these resistors effectively reduces circuit frequency.

At switch on capacitor C2 is discharged and, therefore, transistor T7 is off, timing capacitor C1 is undamped and in conjunction with resistors Re and R & the circuit frequency is approximately 40-45KHz. Capacitor C2 charges at a rate determined by resistor R4. When C2 reaches approximately 0.7 volts transistor T7 turns on switching R1 and R3 across capacitor C1 to reduce the output frequency of IC and, therefore, circuit frequency.

Section 6 This is the shutdown and safety network. Circuit shutdown is achieved by the use of the IC. If pin 9 is connected to ground the outputs will turn off (remain high in this case) and the circuit will remain off until interruption of the mains supply whereby capacitor Ce can discharge, allowing C21 to re-charge which will initiate operation of the IC.

IC pin 9 is kept high during normal running by the connection of resistor R23 to the reference voltage.

The detection circuit operates under the following conditions: 1. one lamp fails to strike 2. both lamps fail to strike 3. one lamp is missing 4. both lamps are missing 5. one lamp goes out during running Consider 1 and 2 A voltage is derived from points A and B on the lamp circuit section 2. This voltage is divided down by resistors R2 (R7 ) and R5 (R14) and passed through a diode (D2, Duo). If the voltage on either network is high enough then diac DI2 breaks over, charges capacitor Cs to the required gate trigger voltage of thyristor TH3 which turns on and grounds pin 9 which will stop the IC from operating.

Consider 3, 4 and 5 Thyristor TH3 has a timer circuit connected to the gate via diode D2l. Capacitor Clo is being charged via resistor Rzl which is connected to the IC reference voltage, to a potential equal to the thyristor gate trigger voltage plus the diode D21 voltage. When this voltage is reached the thyristor TH3 turns on which in turn switches the IC off.

If we assume the circuit is working correctly, capacitor C10 must be discharged to inhibit shutdown. The circuit to inhibit shutdown is derived from the lamp output inductors. A small secondary number of turns Ill', L2 ' are wound on inductors L1 and L2. These secondary windings produce a potential which is proportional to the current flowing through the primary.

If both lamps are running sufficient potential is produced to charge capacitor C15 through resistor R18 to the diac trigger voltage D13, which turns on transistor T2 which inhibits capacitor C10 from charging.

If one or both lamps is missing, or one lamp extinguishes diac trigger voltage DI3 cannot be maintained, transistor T2 turns off which allows capacitor Cio to charge which turns thyristor TH3 on which inhibits the IC from operating..

Claims (6)

1. An electronic ballast for driving discharge lamps from a suitable supply including a pulse width modulated switched mode power supply the output of which is used to control the supply of current to a discharge lamp when connected.

2. An electronic ballast as claimed in claim 1 in which the switched mode power supply provides drive signals for push-pull switching devices controlling a transformer providing power for the discharge lamp when connected, and in which first control means is provided to ensure that the push and pull switching devices are not conducting at the same time.

3. An electronic ballast as claimed in claim 2 in which a second control means is provided to provide a soft start for the discharge lamp when connected, the second control means being operative for a predetermined period of time following switch on of the electronic ballast to cause the switched mode power supply to operate at a first frequency different from its normal operating frequency, which first frequency is not equivalent to the tuned frequency of the discharge lamp, capacitor and associated inductance when fitted, such that the lamp will not be provided with a striking voltage of sufficient magnitude to cause the lamp to ignite during the predetermined period of time, and including means operative following the predetermined period of time to inhibit the second control means to thereby allow the switched mode power supply to commence operation at the tuned frequency of the discharge lamp, capacitance and inductance when fitted to provide a strike voltage of sufficient size to cause the lamp to ignite.

4. An electronic ballast as claimed in claim 2 in which a third control means is provided, the third control means being operative to detect the failure of one or more lamps connected to an output winding of the transformer and being operative to switch the switched mode power supply to a condition in which both the push-pull switching devices are in an off state, thereby removing power from the output winding of the transformer.

5. An electronic ballast as claimed in claim 2 in which the transformer includes a switching winding and in which the auxiliary winding provides power for the switched mode power supply once the lamp when connected has ignited, and in which initial power for the switched mode power supply is supplied via a direct path connected to a rectified mains supply, the direct path including a series switching device, the series switching device being controlled by a control device connected to the auxiliary winding to thereby switch off the series switching device following supply of power to the lamp when connected.

6. An electronic ballast substantially as described, with reference to the accompanying drawings.