GB2223901A

GB2223901A - Transistor follower circuit

Info

Publication number: GB2223901A
Application number: GB8823599A
Authority: GB
Inventors: James Arthur Tijou
Original assignee: Philips Electronic and Associated Industries Ltd
Current assignee: Philips Electronics UK Ltd
Priority date: 1988-10-07
Filing date: 1988-10-07
Publication date: 1990-04-18
Also published as: GB8823599D0

Abstract

A transistor follower circuit comprises a first transistor 1 having one of its two main electrodes (source) 5 connected via a first current source 2 to one of two supply lines (+V) for the circuit and the other of its two main electrodes (drain) 6 connected via a second current source 3 to the other of said two supply lines (OV), the circuit also comprising a second, bipolar, transistor 4 having its emitter-collector path connected between said other main electrode (drain) of the first transistor and said one supply line and its base connected to said one main electrode of the first transistor, the first transistor having a control electrode connected to receive an input voltage. The first transistor may be either a FET (Figures 1 & 3) or bipolar (Figures 2 & 4) transistor. <IMAGE>

Description

DESCRIPTION: TRANSISTOR FOLLOWER CIRCUIT This invention relates to a transistor follower circuit.

It is an object of the present invention to provide a transistor follower circuit having an improved follower performance.

According to the invention, a transistor follower circuit comprises a first transistor having one of its two main electrodes connected via a first current source to one of two supply lines for the circuit and the other of its two main electrodes connected via a second current source to the other of said two supply lines, the circuit also comprising a second, bipolar, transistor having its emitter-collector path connected between said other main electrode of the first transistor and said one supply line and its base connected to said one main electrode of the first transistor, the first transistor having a control electrode connected to receive an input voltage.

The circuit parameters of a transistor follower circuit according to the invention would be such that in response to an applied input voltage which renders the first transistor conductive, the second transistor is also rendered conductive to pass a portion of the current flowing between the current sources, and that the voltage across the two main electrodes of the first transistor is held at the value of the base-emitter voltage of the second transistor for a range of input voltage values.

Thus, the effect of the second transistor in a transistor follower circuit according to the invention is to reduce the magnitude of the current in the main current path of the first transistor because of the current diverted through the second transistor. Furthermore, because the voltage across the two main electrodes of the first transistor is clamped to the value of the base-emitter voltage of the second transistor, this voltage is made substantially independent of the magnitude of the current in the main current path of the first transistor, and therefore substantially independent of the value of the applied input voltage. A practical result of these effects is that, as will be described, the transistor follower circuit can operate over a larger range of input voltage values than would otherwise be possible without the inclusion of the second transistor in the circuit.

The first transistor used in the transistor follower circuit according to the invention may be either a field-effect transistor which forms a source follower or a bipolar transistor which forms an emitter follower. Either a p-channel or an n-channel field effect transistor may be used, with the second transistor being of npn or a pnp type, respectively. Similarly, either a pnp or an npn type bipolar transistor may be used as the first transistor, with the second transistor being of opposite type, respectively. The transistor follower circuit may also be arranged so that the input voltage is applied thereto using the so-called bootstrap principle.

Said first and second current sources of a transistor follower circuit according to the invention are preferably respective constant current sources each comprised by a transistor having its emitter-collector path connected in series with the main current path of said first transistor, together with a further transistor which is connected as a preset current mirror to control the extent of conduction of said transistor.

In order that the invention may be more fully understood reference will now be made by way of example to the accompanying drawings, of which: Figures 1 to 4 show respective transistor follower circuits according to the invention; Figure 5 shows partly diagrammatically a circuit arrangement which includes the transistor follower circuit of Figure 1.

Referring to the drawings, the transistor follower circuit shown in Figure 1 comprises a junction field-effect transistor 1, two constant current sources 2 and 3 and a bipolar transistor 4.

The field-effect transistor 1 is p-channel type and operates as a source follower. The current source 2 is connected between the source 5 of the field-effect transistor 1 and a positive supply line +V and the current source 3 is connected between the drain 6 of the field-effect transistor 1 and a negative (or return) supply line OV. The bipolar transistor 4 has its collector connected to the positive supply +V, and its emitter and base connected to the drain and source, respectively, of the field effect transistor 1. The transistor follower circuit has an input terminal 7 and an output terminal 8 to which are connected respectively the gate 9 and the drain 6 of the field effect transistor 1.

The transistor follower circuit has circuit parameters such that for a given supply line voltage +V/OV and for a given range of input voltage applied at the input terminal 7, the drain current through the field-effect transistor 1 is approximately equal to a current I which is the current supplied by the constant current source 2. There is a consequential conduction of the transistor 4 which passes a current I that does not form part of the drain current through the field-effect transistor 1.

The current source 3 passes the total current I+ ~ I. The base-emitter voltage of the transistor 4 clamps the drain-source voltage of the transistor 1 to its own value. This clamping holds for the range of input voltage values so that the transistor 1 always operates in a stable region of its output characteristic for this range. The output voltage which is present at the output terminal 8 corresponds in magnitude to the input voltage applied at the input 7, but has a small offset which corresponds to the gate-source voltage of the field-effect transistor 1. The voltage between drain and source of the field-effect transistor 1 is the gate-source of this transistor less the base-emitter voltage of the transistor 4.Because the a.c. voltages between the gate and the source and drain, respectively, of the transistor 1 are approximately the same, the effects of gate-source and gate-drain junction capacitances are negligible so that there is minimal spurious a.c. current.

The transistor follower circuit shown in Figure 2 has a pnp bipolar transistor 9 which operates as an emitter follower and replaces the field-effect transistor 1 in the circuit of Figure 1. The two follower circuits of Figures 1 and 2 are in all other respects the same and operate in like manner. The circuit of Figure 2 additionally includes three resistances 10, 11 and 12 and a capacitance 13, shown in dotted line, which serve to examplify the possible provision of the bootstrapping technique in a follower circuit according to the invention.

The transistor follower circuit shown in Figure 3 corresponds to the circuit of Figure 1, but has an n-channel field-effect transistor 1' and a pnp bipolar transistor 4'. The transistor follower circuit shown in Figure 4 corresponds to the circuit of Figure 2, but has an npn bipolar transistor 9' and a pnp bipolar transistor 4'.

The transistor follower circuit of Figure 1 has a particular but non-exclusive application in the circuit arrangement of Figure 5. This circuit arrangement provides a stable clamped voltage VS periodically at an output 14. The output voltage VS is otherwise determined by the voltage at an input terminal 29.

It comprises the transistor follower circuit 15, a comparator circuit 16 and an output circuit 17. The circuit 15 has as its two current sources respective current mirror circuits, of which one comprises two pnp transistors 18 and 19 and the other comprises two corresponding npn transistors 20 and 21. The transistors 19 and 21 have their emitter-collector paths connected in series with the source-drain path of the field-effect transistor 1. Their conducting states are controlled by transistors 18 and 20, respectively, which are set to provide predetermined base voltages for the transistors 19 and 21. The voltage produced at the output terminal 8 is applied to the base of a transistor 22 in the output circuit 17. The resulting voltage at the collector of the transistor 22 forms the stable clamped voltage VS at the output 14.

Potential divider resistors 23 and 24 derive a feedback voltage VF from the voltage VS. This voltage VF is applied to the base of a transistor 25 which is connected with a further transistor 26 as a differential amplifier in the comparator circuit 16. A reference voltage VR is applied to the base of the transistor 26. The voltage at the collector of the transistor 26 will depend on the relative values of the voltages VR and VF.

This collector voltage determines the charge on a capacitor 27 which provides a resultant control voltage VC at the gate of the field-effect transistor 1 via a switch 28 which is closed periodically during the 'clamp' interval. In operation, any tendency for the stable clamped voltage VS to vary, for example due to load variation at the output terminal 14, will cause a corresponding variation in the feedback voltage VF. This will result in a variation of the control voltage VC in a sense tending to correct the instability in the voltage VS. The corresponding transistor follower circuits of Figures 2 to 4 may be similarly employed in equivalent circuit arrangements.

From reading the present disclosure, other modifications will be apparent to persons skilled in the art. Such modifications may involve other features which are already known per se and which may be used instead of or in addition to features already described herein. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present application also includes any novel feature or any novel combination of features disclosed herein either explicitly or implicitly or any generalisation thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention.

The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims

CLAIMS:

1. A transistor follower circuit characterised by comprising a first transistor having one of its two main electrodes connected via a first current source to one of two supply lines for the circuit and the other of its two main electrodes connected via a second current source to the other of said two supply lines, the circuit also comprising a second, bipolar, transistor having its emitter-collector path connected between said other main electrode of the first transistor and said one supply line and its base connected to said one main electrode of the first transistor, the first transistor having a control electrode connected to receive an input voltage.

2. A transistor follower circuit as claimed in Claim 1, characterised in that said first transistor is a field-effect transistor which forms a source follower.

3. A transistor follower circuit as claimed in Claim 2, characterised in that said first, field-effect, transistor is a p-channel type and said second transistor is of npn type.

4. A transistor follower circuit as claimed in Claim 2, characterised in that said first, field-effect, transistor is of n-channel type and said second transistor is of pnp type.

5. A transistor follower circuit as claimed in Claim 2, characterised in that said first transistor is a bipolar transistor which forms an emitter follower.

6. A transistor follower circuit as claimed in Claim 5, characterised in that said first, bipolar, transistor is of pnp type and said second transistor is of npn type.

7. A transistor follower circuit as claimed in Claim 5, characterised in that said first, bipolar, transistor is of npn type and said second transistor is of pnp type.

8. A transistor follower circuit as claimed in any preceding Claim, characterised in that each of said first and second current sources is a constant source comprised by a transistor having its emitter-collector path connected in series with the main current path of said first transistor, together with a further transistor which is connected as a preset current mirror to control the extent of conduction of said transistor.

9. A transistor follower circuit as claimed in any preceding Claim, embodied in a circuit arrangement which provides a stable clamping voltage, said circuit arrangement also comprising an output circuit having a transistor which supplies said stable clamping voltage at its collector and has its base connected to receive the voltage at the output of the transistor follower circuit, and a comparator circuit which is connected to receive a reference voltage and at least a portion of the stable clamping voltage and is operable in accordance with their difference to apply a control voltage as an input voltage to said transistor follower circuit.

10. A transistor follower circuit substantially as hereinbefore described with reference to any one of Figures 1 to 4 of the accompanying drawings.

11. A circuit arrangement embodying a transistor follower circuit as claimed in Claim 10, substantially as hereinbefore described with reference to the Figure 5 of the accompanying drawings.