GB2214766A

GB2214766A - Data processing system including display function

Info

Publication number: GB2214766A
Application number: GB8901561A
Authority: GB
Inventors: Arai Makoto
Original assignee: Toshiba Corp
Current assignee: Toshiba Corp
Priority date: 1988-01-27
Filing date: 1989-01-25
Publication date: 1989-09-06
Anticipated expiration: 2009-01-25
Also published as: GB8901561D0; GB2214766B; JPH01191191A; KR920001963B1; KR890012217A

Abstract

A data processing system is constituted by a plasma display panel (11) capable of displaying an image using four colors, a CRT (12) capable of displaying an image using 16 colors, a control section (62), an image memory for holding image data, a palette register (61) in which palette data representing a display mode is set, and a control memory for holding palette data for the PDP (11) and the CRT (12). The control section (62) is operated in the following manner. The control section (62) determines which one of the PDP (11) and the CRT (12) is in an operative state. When the PDP (11) is in an operative state, the control section (62) loads palette data for the PDP (11) into the palette register (61). When the CRT (62) is in an operative state, the control section loads palette data for the CRT (12) into the palette register. The control section (62) scans the image memory, and addresses the palette register (61) by using the obtained image data. The control section (62) controls the PDP (11) or the CRT (12) in accordance with data held in an address-designated entry so as to display an image. <IMAGE>

Description

"DATA PROCESSING SYSTEM INCLUDING DISPLAY FUNCTION" The present invention relates to a data processing system and, more particularly, to a data processing system, which includes two or more display units for displaying images in different modes (color, gradation) and can display images by switching the display units.

A display control hardware called an EGA (Enhanced (Graphics Adaptor) is known. As shown in Fig. 1, the EGA generally comprises video RAM 31, palette register (color palette) 32, and display circuit 33, and is connected to display unit 34. In general, video RAM 31 comprises four memory planes arranged in the same address space. 24 (= 16) types of displays can be performed in accordance with a combination of bit data at the same address locations of the four memory planes.

Palette register 32 is used to change display colors at high speed. Data designating display colors (identical colors having different gradation levels are processed as different colors) are set in 16 entries of palette register 32. Display circuit 33 causes CRT 34 to display an image in accordance with the content of an entry designated by four pieces of bit data at the same address locations of the four memory planes of video RAM 31.

When the content of an entry of palette register 32 is updated, a display color is changed at high speed.

A conventional EGA is designed to be used to control one type of display unit. For this reason, for example, if a plasma display unit, which can display an image only at four gradation levels, is connected to a conventional EGA for 16 display colors, a proper image cannot be obtained.

The present invention has been made in consideration of the above drawbacks, and has as its object to provide a data processing system which can display an image in an optimal state in accordance with the characteristics of a display unit.

In order to achieve the above object, according to the present invention, there is provided a data processing system comprising: first display means (PDP) for displaying an image in n types of display modes; second display means (CRT) for displaying an image in m (n < m) types of display modes; palette register means (61), which has a plurality of entries, and in which data for specifying a display mode is set in each entry; first control memory means (71) for holding data to be loaded into the palette register means (61) so as to operate the first display means (11); second control memory means (72) for holding data to be loaded into the palette register means (61) so as to operate the second display means (12);; third control memory means (73) for holding switching data representing which one of the first display means (11) and the second display means (12) is in an operative state; loading means (1) for loading one of the data held in the first control memory means (71) and the second control memory means (72) in accordance with the switching data stored in the third control memory means (73); image data storage means (5), having a plurality of memory planes (31), for storing image data; and display control means (62, 63) for addressing the palette register means (61) by using the image data read out from the image data storage means, and selectively controlling the first display means (11) and the second display means (12) in accordance with data held in an address-designated entry so as to display an image.

With the above arrangement, according to the present invention, a data processing system capable of always displaying an image in an optimal state in accordance with the characteristics of a display unit is provided.

This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is a block diagram showing an arrangement of an EGA; Fig. 2 is a block diagram showing an arrangement of a data processing system according to an embodiment of the present invention; Fig. 3 is a block diagram showing an arrangement of a display circuit in Fig. 1; Fig. 4 is a block diagram showing an arrangement of a palette register in Fig. 3; Fig. 5 is a table for explaining a method of using the palette register in Fig. 3; Fig. 6 is a table showing a relationship between set values in the palette register and display colors or gradation; Fig. 7 is a block diagram showing an arrangement of a control memory in Fig. 2; Fig. 8 is a view for explaining a display operation of the data processing system in Fig. 2;; Figs. 9A and 9B are views for explaining a display color changing operation of the data processing system in Fig. 2; and Figs. 9C and 9D are views for explaining a switching operation of the data processing system in Fig. 2.

A data processing system according to an embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

Fig. 2 shows an arrangement of the data processing system according to the embodiment of the present invention. Referring to Fig. 2, CPU 1, main memory 2, keyboard controller 3, external storage controller 4, VRAM (video random access memory, image random access memory) 5, display circuit 6, control memory 7, and ROM 8 are connected to system bus 13. External storage unit 10 such as a floppy disk is connected to external storage controller 4. Keyboard unit 9 is connected to keyboard controller 3. Plasma display panel (PDP) 11 and color CRT 12 are connected to display controller 6.

CPU 1 constitutes a main part of the control section of this system. Application program (software) and the like Is loaded In main memory 2. Keyboard controller 3 controls keyboard unit 9. External storage controller 3 controls external storage unit 10. VRAM 5 stores display data. The structures of display controller 6 and control memory 7 will be described later. ROM 8 stores a display BIOS (basic input/output system) for controlling display controller 6 and various other control programs, and is denoted by BIOS in Fig. 2.

System bus 13 is constituted by address lines, data lines, control lines, and the like, and is adapted to perform transfer of data and control signals between CPU 1 and each unit. External storage unit 10 stores application programs and the like under the control of external storage controller 4. PDP 11 can display an image by using four gradation levels (luminance levels) (four colors assuming that identical colors having different gradation levels are regarded as different colors), whereas color CRT 12 can display an image by using 16 colors or more (identical colors having different gradation levels are processed as different colors).

Keyboard unit 13 has keys and is used to enter various data in this system.

As shown in Fig. 3, display circuit 6 in Fig. 2 includes palette register (color palette) 61 connected to system bus 13, display controller 62 connected to system bus 13 and palette register 61, and switching circuit 63 connected to display controller 62, PDP 11, and color CRT 12. Display controller 62 addresses VRAM under the control of CPU 1, and reads image data.

Display controller 62 addresses palette register 61 by using the readout image data, and displays an image on PDP 11 or CRT 12 through switching circuit 63 in accordance with the content of a designated entry.

An arrangement of palette register 61 will be described in detail below.

As shown in Fig. 4, palette register 16 has 16 entries (may be regarded as constituted by 16 registers). Each entry of palette register 61 consists of eight bits, in which lower six bits BO to B5 are used. 0th bit BO designates a blue display. Similarly, 1st, 2nd, 3rd, 4th, and 5th bits Bl, B2, B3, B4, and B5 respectively designate green, red, high luminance blue display, high luminance green display, and high luminance red display. A relationship between set values in palette register 61 and display colors on CRT 12 is as shown in Fig. 5. As for PDP 11, one of the four gradation levels is designated by using 1st and 2nd bits B1 and B2. Note that gradation level 0 is darkest and gradation level 3 is brightest.

Assume that set vales for color CRT 12 are directly used as set values for PDP 11. If an application program is of, e.g., a type for displaying an image by using 16 colors and designates to display a character in blue on a black background, the character becomes unclear on PDP 11. In this embodiment, therefore, set values (palette data) shown in Fig. 6 are set in palette register 61. Note that the set values shown in Fig. 6 are standard values, which can be updated as needed as will be described later, and hence not fixed. As is apparent from Fig. 6, the set values for color CRT 12 are different from those for PDP 11. When an application program designates to display a character in green on a blue background, the character becomes unclear on PDP 11 even if the set values in Fig. 6 are used.

However, such a case is very rare. Fig. 6 shows optimal values obtained by the present applicant by actually operating various application programs and examining the results.

As shown in Fig. 7, control memory in Fig. 2 includes PDP memory 71, CRT memory 72, and flag memory 73. PDP memory 71 holds palette data (e.g., the set values shown in Fig. 6) to be stored in palette register 61 so as to be used for an image display by PDP 11. CRT memory 72 holds palette data (e.g., the set values shown in Fig. 6) to be stored in palette register 61 so as to be used for an image display by CRT 12.

Flag memory 73 stores an identification flag representing which one of PDP 11 and CRT 12 is to be operated, or is currently operated.

An operation of the data processing system comprising the display function having the arrangement shown in Figs. 2 to 7 will be described below with reference to Fig. 8.

An operator enters a desired instruction or the like by operating, e.g., keyboard 9. Keyboard controller 3 detects a key operation, and supplies a required instruction to CPU 1 through system bus 13. In response to this instruction, CPU 1 loads a required application program or the like from external storage unit 10 into main memory 2 through external storage 4.

CPU 1 interprets/executes the application program held in memory 2. According to the application program, CPU 1 executes BIOS and writes display data in VRAM 5 through the BIOS.

CPU 1 checks the content of flag memory 73 so as to check a currently operated display unit. If PDP 11 is in an operative state, CPU 1 loads the contents of PDP memory 71 in palette register 61. If color CRT 12 is in an operative state, CpU 1 loads the contents of CRT memory 72 in palette register 61.

Writing of the display data in VRAM 5 and loading of the data in palette register 61 are independently performed. CPU 1 performs each operation independently as needed.

Display controller 62 scans VRAM 5, and addresses palette register 61 by using readout image data. More specifically, display controller 62 addresses palette register 61 by using 4-bit data constituted by a combination of four pieces of bit data at the same address locations of the four memory planes (e.g., the same relative positions of the four memory planes). Display controller 62 displays an image on PDP 11 or color CRT 12 through switching circuit 63 in a display mode designated by the content of an addressed entry. If, for example, a combination of bit data at certain address locations of the memory planes of VRAM 5 is "1100", the 13th entry of palette register 61 (since the first address is 0, an entry number and a corresponding address do not coincide with each other in this embodiment) is addressed.If switching circuit 63 electrically connects PDP 11 to this system, palette data for PDP 11 is set in palette register 61. In this case, the content in the 13th entry is 02H, and corresponds to gradation level 1. Display controller 62 displays a dot of gradation level 1 at a corresponding display position on PDP 11.

When switching circuit 63 electrically connects color CRT 12 to the system, palette data for CRT 12 is set in palette register 61. In this case, the set value in the 13th entry is 3CH, and hence display controller 62 displays a red dot with the maximum luminance at a corresponding display position on color CRT 12.

Display controller 62 scans VRAM 31 (e.g., rasterscans each memory plane from the upper left to the lower right), and displays dots at corresponding display positions on a display unit.

With the above arrangement, even if only one palette register is used, since optimal palette data for PDP 11 or CRT 12 can be set in palette register 61, a proper image display can be performed by using either PDP 11 or CRT 12.

In the system having the above-described arrangement, an application program may change a display color.

For example, an application program may designate to change a portion currently displayed in red into a yellow portion. In this case, if PDP 11 is currently operated, the portion to be displayed in the new color may become obscure with respect to the background, and the display may become unclear. This may occur, for example, when a character is displayed in red (at gradation level 2 on PDP 11) on a gray background (displayed at gradation level 0 on PDP 11), and an application program changes the color of the character into black (displayed at gradation level 2 on PDP 11) during an operation of PDP 11. For this reason, in this embodiment, when an application program designates to change a display color during an operation of PDP 11, CPU 1 changes the display color on CRT memory 72, but does not change the contents in palette register 61.An operation of changing a display color will be described in detail with reference to Figs. 9A to 9D.

Fig. 9A shows a display operation of PDP 11. When PDP 11 is currently operated, CPU 1 loads set values of PDP memory 71 into palette register 61 in accordance with the content of flag memory 73. Assume that CPU 1 execute BIOS according to the application program, and designates a blue display. However, since PDP 11 can only perform a display using four gradation levels, the display is performed in a mode inherent to PDP 11 (mode A in Fig. 9A). In the case shown in Fig. 6, a display is performed using the first gradation level. Assume that the application program designates to change the blue display into a red display by using palette register 61. In this case, while PDP 11 is operated, CPU 1 does not update the content of the second entry of palette register 61, and changes data held in the second entry of control memory 72 into data representing red.

That is, the display mode (mode A) is not changed in PDP 11, and an image in the initial mode is held.

Fig. 9B shows a display operation of color CRT 12.

When CRT 12 is currently operated, CPU 1 checks the content of flag memory 1, and loads palette data in CRT memory 72 into palette register 61. Assume that the application program displays a red image. If, in this case, the application program designates to change the read image into a blue image, CPU 1 sets data representing blue in the second entries of control memory 72 and palette register 61. As a result, the display color on CRT 12 is changed from red to blue. In this manner, the color of the image can be changed into the color requested by the application program. In this case, the contents stored in PDP memory 71 are not changed.

A case wherein a currently operated display unit is switched from PDP 11 to color CRT 12 in the state shown in Fig. 9A will be described below with reference to Fig. 9C. In this case, the operator operates keyboard 9 so as to enter a command for switching a display unit.

In response to this command, CPU 1 loads palette data of CRT memory 72 into palette register 61, as shown in Fig.

9C. In addition, CPU 1 sets data representing color CRT 12 in flag memory 73, and switches switching circuit 63 to a setting for CRT 12. As described above with reference to Fig. 9A, red is designated in the second entry of control memory 72. Consequently, red is also set in the second entry of palette register 61, thereby causing CRT 12 to display a red image. In this manner, an image can be displayed in a color requested by the application program.

A case wherein a currently operated display unit is switched from CRT 12 to PDP 11 in the state shown in Fig. 9B will be described below with reference to Fig.

9C. Similar to the above case, the operator enters a command for switching a display unit through the keyboard or the like. In response to this command, CPU1 replaces the contents stored in palette register 61 with values in PDP memory 71. Inherent display mode A is designated in the second entry of PDP memory 71, and PDP 11 performs a display in mode A.

As described above, by selectively using palette data for PDP 11 and CRT 12 in accordance with the BIOS, the problem of an unclear image on PDP 11 can be eliminated even if the application program designates a change in display color.

In the above embodiment, the described system supports only PDP 11 and CRT 12. However, the present invention can be applied to display units other than the PDP and the CRT, e.g., a liquid crystal display (LCD) unit. In addition, the present invention can be applied to, e.g., a case wherein a color CRT capable of a 16-color display and a monochrome CRT are used.

Moreover, the present invention can be applied to a system for supporting more than three types of display units, e.g., a CRT, a PDP, and an LDP. In this case, the required number of memories for storing palette data corresponds to that of the types of display units.

As has been described above, according to the present invention, in a data processing system which can switch an operation between a display unit which can display an image in m types of display modes and a display unit which cannot display an image in m types of display modes an image can be properly displayed on both the display units.

Note that even if the set values shown in Fig. 6 are used, a character may become unclear on the PDP when the character is designated to be displayed in green on a blue background. This problem may be solved in the following manner. When a display color change is designated, display data held in VRAM 5 is checked, and palette data for the PDP is changed in consideration of the color and the pattern of gradation of an image after the change, thereby optimizing the palette data.

Claims

Claims:

1. A data processing system comprising: first display means for displaying an image in n types of display modes; second display means for displaying an image in m (n < m) types of display modes; palette register means, which has a plurality of entries, and in which data for specifying a display mode is set in each entry; first control memory means for holding data to be loaded into said palette register means, for operating said first display means; second control memory means for holding data to be loaded into said palette register means, for operating said second display means; third control memory means for holding switching data representing which one of said first display means and said second display means is in an operative state;; loading means for loading one of the data held in said first control memory means and said second control memory means in accordance with the switching data stored in said third control memory means; image data storage means, having a plurality of memory planes, for storing image data; and display control means for addressing said palette register means by using the image data read out from said image data storage means, and selectively controlling said first display means and said second display means in accordance with data held in an address-designated entry for displaying an image.

2. A system according to claim 1, wherein said first display means comprises a plasma display panel (PDP) capable of displaying an image with four gradation levels, said second display means comprises a color CRT unit capable of displaying an image using 16 colors (identical colors having different gradation levels are regarded as different colors), each entry of said first control memory means holds data representing one of the four gradation levels, each entry of said second control memory means holds data representing one of the 16 colors and said loading means transfers the data representing the gradation level held in said first control memory means to said palette register means when said PDP is in an operative state, and transfers the data representing the color held in said second memory control means to said palette register means when said CRT unit is in an operative state, in accordance with contents stored in said third control memory means.

3. A system according to claim 2, wherein said first control memory means stores data representing gradation level 0 (gradation level 3 is brightest and gradation level 0 is darkest) in first and ninth entries thereof, data representing gradation level 1 in second, third, fourth, 13th, 14th, and 15th entries thereof, data representing gradation level 2 in sixth, seventh, 10th, 11th, 12th, and 16th entries thereof, and data representing gradation level 3 in an eighth entry thereof.

4. A system according to claim 2, wherein when an application program of said data processing system designates to change a color of a display image, if said plasma display panel is in an operative state, said loading means changes a content of a corresponding entry of said second control memory means without changing a content of said palette register means so as not to change a display image.

5. A system according to claim 1, wherein said second control memory means comprises m entries, in each of which a color (identical colors having different gradation levels are regarded as different colors) is set, and said first control memory means comprises m entries, in each of which data representing a corresponding color of an image constituted by n colors converted from an image constituted by m colors is set.

6. A system according to claim 1, wherein when an application program of said data processing system designates to change a display color, and said first display means is in an operative state, said loading means changes a content stored in said second control memory means without changing a content stored in said palette register means so as not to change a display image.

7. A system according to claim 1, wherein when display means to be operated is switched from said first display means to said second display means, said loading means loads data held in said second control memory means into said palette register means, and changes switching data stored in said third control memory means, and when display means to be operated is switched from said second display means to said first display means, said loading means loads data held in said first control memory means into said palette register means, and changes switching data stored in said third control memory means.

8. A system according to claim 7, wherein said system comprises switch designating means, said loading means loads a content of one of said first and second control memory means into said palette register means and changes a content of said third control means in response to the designation, and said display control means sets display means which is in an operative state in an inoperative state, and sets display means which is in an inoperative state in an operative state in response to the designation.

9. A system according to claim 1, wherein said first and second display means display an image using a plurality of dots, said memory planes are allocated in the same address space, and said display control means scans said memory planes, addresses said palette register means using data constituted by a combination of bit data at the same address locations of said memory planes, and displays a dot at a display position of said first or second display means corresponding to the address locations of said memory planes specified by output data from said palette register means.

10. In a data processing system comprising: first display means capable of displaying an image in n types of display modes; second display means capable of displaying an image in m (n < m) types of display modes; control means connected to said first and second display means; image storage means for holding image data; palette register means, which has a plurality of entries, and in which palette data specifying a display mode is set in each entry; control memory means for holding palette data for said first display means and for said second display means; and bus means for connecting said control means, said image storage means, said palette register means, and said control memory means so as to transfer data, a method of operating said control means, comprising the steps of: determining which one of said first and second display means is in an operative state so as to load palette data for said first display means held in said control memory means into said palette register means when said first display means is an operative state, and to load palette data for said second display means held in said control memory means into said palette register means when said second display means is in an operative state; addressing image data by scanning said image storage means; addressing said palette register means by using the obtained image data; and controlling said first or second display means in accordance with data held in an address-designated entry.

11. A method according to claim 10, wherein said first display means comprises a plasma display panel capable of displaying an image using four colors (identical colors having different gradation levels are regarded as different colors), said second display means comprises a color CRT unit capable of displaying an image using 16 colors (identical colors having different gradation levels are regarded as different colors), palette data of said first display means consists of a group of data each representing one of the four colors, and palette data for said second display means consists of a group of data each representing one of the 16 colors, and said control means loads the palette data for said first display means into said palette register means when said plasma display panel is in an operative state, and loads the palette data for said second display means into said palette register means when said CRT unit is in an operative state.

12. A method according to claim 11, wherein the palette data for said first display means data is designed such that data representing gradation level 0 (gradation level 3 is brightest and gradation level 0 is darkest) is loaded in first and ninth entries of said palette register means, data representing gradation level 1 is loaded in second, third, fourth, 13th, 14th, and 15th entries thereof, data representing gradation level 2 is loaded in fifth, sixth, seventh, 10th, 11th, and 16th entries thereof, and data representing gradation level 3 is loaded in an eighth entry.

13. A method according to claim 10, wherein said control means comprises means for executing an arbitrary application program and displaying an image on said first or second display means in accordance with the application program, and said control means changes the palette data for said second display means without changing a content of said palette register means when the application program designates to change a color of a display image and said first display means is in an operative state.

14. A method according to claim 10, wherein when display means to be operated is switched from said first display means to said second display means, said control means loads the palette data for said second display means held in said control memory means into said palette register means, and when display means to be operated is switched from said second display means to said first display means, said control means loads the palette data for said first display means held in said control memory means into said palette register means.

15. A method according to claim 10, wherein said first and second display means display an image using a plurality of dots, said image storage means includes a plurality of memory planes allocated in the same address space, and said control means scans said memory planes, addresses said palette register means using the image data constituted by a combination of bit data at the same address locations of said memory planes, and displays a dot at a display position of said first or second display means corresponding to the address locations of said memory planes in a display mode specified by output data from said palette register means.

16. A system for displaying an image by using palette register means having a plurality of entries in each of which data for specifying a display mode is set, comprising: first control memory means for holding first set data for said palette register; second control memory means for holding second set data for said palette register; and loading means for selectively loading the first and second set data respectively set in said first and second control memory means into said palette register means.

17. A system according to claim 16, wherein said second memory means comprises m entries, in each of which a color (identical colors having different gradation levels are regarded as different colors) is set; said first control memory means comprises m entries, in each of which data representing a corresponding color when an image consisting of m colors is converted into an image consisting of n (m > n) colors is set, and said palette register means comprises m entries.

18. A system according to claim 16, wherein when an application program which is executed by said data processing system designates to change a display color while said data processing system is displaying an image using n colors, said loading means changes a content of said second control memory means without changing a content stored in said palette register means so as not to change a display image.

19. A system according to claim 16, wherein said data processing system displays an image consisting of m or n colors by selectively operating display means capable of displaying an image using m colors and display means capable of displaying an image using n colors, and when display means set in an operative state is switched, said loading means loads one of the first and second set data, which corresponds to display means set in an operative state upon switching into said palette register means.

20. A system according to claim 16, wherein said data processing system displays an image consisting of 16 or 4 colors by selectively operating a CRT unit capable of displaying an image using 16 colors and a display unit capable of displaying an image using 4 colors, said second control memory means comprises 16 entries, in each of which a color (identical colors having different gradation levels are regarded as different colors) is set, said first control memory means comprises 16 entries, in each of which data representing a corresponding color when an image consisting of the 16 colors is converted into an image consisting of the four colors, said palette register comprise 16 entries, and when display means set in an operative state is switched, said loading means loads one of the first and second set data, which corresponds to display means set in an operative state upon switching into said palette register means.

21. A data processing system including display function, substantially as hereinbefore described with reference to Figs. 2 to 9D.

22. A manufacturing method of data processing system including display function, substantially as hereinbefore described with reference to Figs. 2 to 9D.