GB2214377A - Current amplifier circuit arrangement - Google Patents

Abstract

In a current amplifier arrangement comprising a pair of pnp transistors 1,2 having paralleled base-emitter paths and the collectors of which are connected to input 4 and output (5) terminals respectively, the feed to the commoned bases of the two transistors from the input terminal is via a long tail pair of npn transistors 8,9 to reduce the dependence of the gain of the arrangement on the absolute values of the relatively low current gains of the pnp transistors. Additionally, a lower power supply voltage is possible. Capacitors 11,12 may be added to increase the stability of the amplifier. Transistors 8,9 may be replaced by field effect transistors. The pnp transistors may be integrated as low-gain "internal" types whilst the npn transistors may be integrated as high gain "vertical" types. <IMAGE>

Description

DESCRIPTION: CURRENT AMPLIFIER CIRCUIT ARRANGEMENT This invention relates to a current amplifier circuit arrangement comprising first and second bipolar transistor structures and a non-inverting amplifier, said transistor structures both being of a first conductivity type and having their bases interconnected and their emitters connected to a common point, the collectors of said first and second transistor structures constituting the arrangement input and the arrangement output respectively, the input of said non-inverting amplifier being connected to the collector of the first transistor structure and the output of said non-inverting amplifier being connected to the bases of the first and second transistor structures.

A circuit of this general type is disclosed, for example, in 1971 IEEE International Solid-State Circuits Conference, pages 146-147, and is shown in Figure 1 of the accompanying diagrammatic drawing. As will be seen from Figure 1 the emitters of first and second pnp transistor structures 1 and 2 are connected to a common point 3, their bases are interconnected, and their collectors are connected to points 4 and 5 respectively. The points 4 and 5 constitute a current input point and a current output point respectively, i.e. the input and output of the arrangement. A non-inverting amplifier, constituted in Figure 1 by a third pnp transistor 6, has its input (base of transistor 6) connected to the collector of transistor 1 and its output (emitter of transistor 6) connected to the interconnected bases of the transistors 1 and 2.

The collector of transistor 6 is connected to a reference potential point 7. In operation, when a current is drawn from point 4, the resulting emitter current of transistor 6 is divided between the base-emitter paths of transistors 1 and 2, forward-biassing the latter transistors and resulting in transistor 2 supplying collector current to the point 5. Because the base-emitter voltages of transistors 1 and 2 are equal the ratio between their collector currents is determined purely by the ratio between their effective emitter areas. Thus, if the base current of transistor 6 is neglected, the ratio of the current drawn from the point 4 to the current supplied by transistor 2 to point 5 is equal to the ratio of the effective emitter area of transistor 1 to the effective emitter area of transistor 2.However, in many cases the base current of transistor 6 cannot be neglected, for example because the circuit is fabricated by means of an integrated circuit process in which the pnp structures are of the so-called "lateral" type which tend to have low current gains. This in turn means that it is difficult to manufacture such an integrated circuit for which the ratio of the current flowing at the point 5 to the current flowing at the point 4 in operation is accurately that required, because this ratio becomes dependent not only on the ratio between the effective emitter areas of the transistors 1 and 2 but also on the current gains of these transistors. (A simple analysis reveals that, if it is assumed for simplicity that the transistors 1 and 2 are identical and that the transistors 1, 2 and 6 have current gains B1, B1 and B6 respectively the said ratio is given by B1/EB1+2i(1+B6), the second term in the denominator becoming non-negligible for small values of B1 and B6).

Another disadvantage of the known circuit is that it tends to oscillate. This is because, as all the transistors are of the same conductivity type, their cut-off frequencies are all substantially the same, with the result that the associated poles in the transfer characteristic all occur at substantially the same frequency. Yet another feature of the known circuit which is a disadvantage in some circumstances is that the input current point 4 is inherently two pn junction forward voltages below the potential at the point 3. Thus, if one terminal of a power supply is connected to point 3, and point 4 is connected to the other power supply terminal via further circuitry, the power supply voltage is reduced by two pn junction forward voltages as far as this further circuitry is concerned. It is an object of the invention to enable these disadvantages to be mitigated.

According to the invention a current amplifier circuit of the kind defined in the first paragraph is characterised in that the non-inverting amplifier comprises a long tail pair of third and fourth bipolar transistor structures of a conductivity type opposite to said first conductivity type, the collector of the first transistor structure being d.c.-coupled to the base of the third transistor structure and the collector of the fourth transistor structure being d.c.-coupled to the bases of the first and second transistor structures.

It has now been recognised that, by arranging that the non-inverting amplifier comprises a long tail pair of third and fourth bipolar transistor structures in the manner specified, this amplifier can comprise transistor structures of an opposite conductivity type to that of the first and second structures, with the result that the amplifier transistors can in many circumstances be given much higher current gains than those of the first and second structures. High current gains can in turn lead to a much lower dependence of the gain of the overall arrangement on the absolute magnitudes of the current gains of the first and second structures when the latter gains are relatively low. In addition, as will become clear hereinafter, the stability of the arrangement can be thus improved and the "headroom" available for circuits driving the input of the arrangement can be increased.

As a modification the third and fourth bipolar transistor structures can be replaced by first and second field-effect transistor structures respectively, the bases and collectors of the third and fourth structures then being replaced by gates and drains respectively of the first and second field-effect structures respectively.

Embodiments of the invention will now be described, by way of example, with reference to the accompanying diagrammatic drawing in which Figure 1 is a diagram of a known current amplifier circuit arrangement, as discussed hereinbefore, and Figure 2 is a circuit diagram of an embodiment of the invention.

In Figure 2, in which components having counterparts in Figure 1 have been given the same references, a current amplifier circuit arrangement again comprises first and second pnp transistor structures 1 and 2 the emitters of which are connected to a common point 3, the bases of which are interconnected, and the collectors of which are connected to a current input point 4 and a current output point 5 respectively. However the pnp non-inverting amplifier transistor structure 6 of Figure 1 has been replaced by a non-inverting amplifier in the form of a long tail pair of first and second npn transistor structures 8 and 9, the commoned emitters of the transistors 8 and 9 being connected to reference potential point 7 via a current source 10 which carries a current I.The base of transistor structure 8 constitutes the input of the amplifier, and is connected to the collector of structure 1, and the collector of structure 9 constitutes the output of the amplifier and is connected to the bases of the structures 1 and 2. The base of structure 9 is also connected to the bases of the structures 1 and 2, although it could alternatively be connected to a further reference point (not shown) carrying a potential below that occurring at the bases of the structures 1 and 2 in operation. The collector of structure 8 is connected to the common point 3, which carries a positive potential in operation.A similar analysis to that which yielded the expression quote above for the ratio of the current flowing at the point 5 to the current flowing at the point 4 of the arrangement of Figure 1 yields for the arrangement of Figure 2 the expression xBp/Cx8p-((I-2x)/(B,+1))1 if it is assumed for simplicity and for example that both pnp structures 1 and 2 are identical and have a current gain Bp, and that the current gain of npn structure 8 is Bn. The quantity x is the current flowing into the base of each structure 1 and 2. Although the above expression contains the quantity x, the resulting non-linearity of the arrangement can be made negligible by choosing Bn to be large and I to be just greater than the maximum value of 2x which occurs in operation. If this is done it will be noted that the expression also becomes substantially independent of Bp (and Bn) as required. If the arrangement is manufactured by an integrated circuit process in which the pnp structures are of the so-called "lateral" type and the npn structures are of the so-called "vertical" type, which as mentioned hereinbefore tends to yield pnp structures having comparatively low current gains, such processes as is known can yield npn structures having comparatively large current gains, as required. Morover, the npn structures tend to have much higher cut-off frequencies than the pnp structures, making it possible for the transfer characteristic of-the arrangement to have a dominant pole at a low frequency (determined by the pnp structures) and hence for the arrangement to be devoid of the instability associated with the arrangement of Figure 1.If desired the stability of the arrangement of Figure 2 can be enhanced still further by connecting a capacitor 11 (shown in dashed lines) between the base of structure 8 and a reference potential point and/or a capacitor 12 (shown in dashed lines) between the bases of the structures 1 and 2 and a reference potential point. Inclusion of respective series resistors in the emitter lines of transistors 8 and 9 can also be of assistance in this respect.

It will be noted that, in contradistinction to the arrangement of Figure 1, in Figure 2 the potential on the point 4 is inherently only one pn junction forward voltage below the potential on point 3.

Many possible modifications to the arrangement of Figure 2, which modifications lie within the scope of the invention as defined by the claims, will be readily apparent to those skilled in the art. For example the simple transistor structures 8, 9 and/or 1, 2 may be replaced by Darlington transistor structures. As another example the input current path of a pnp current mirror circuit (not shown) may be included in the collector line of the transistor 8, the output of this mirror circuit being connected to the bases of the structures 1 and 2. As another example, respective resistors may be included in the emitter lines of the transistors 8 and 9. As yet another example the npn bipolar transistor structures 8 and 9 may be replaced by respective n-channel field effect transistor structures.Obviously each transistor structure may be replaced by a transistor structure of the opposite conductivity type, if desired, provided that the sign of the supply voltage is reversed.

As discussed above, the gain of the arrangement of Figure 2 is determined by the ratio between the effective emitter areas of the structures 1 and 2. This gain may be chosen to be greater than, equal to, or less than unity, as desired.

From reading the present disclosure, other modifications will be apparent to persons skilled in the art. Such modifications may involve other features which are already known in the design, manufacture and use of systems ... and devices ... and component parts thereof and which may be used instead of or in addition to features already described herein. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present application also includes any novel feature or any novel combination of features disclosed herein either explicitly or implicitly or any generalisation thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims (7)

CLAIMS:

1. A current amplifier circuit arrangement comprising first and second bipolar transistor structures and a non-inverting amplifier, said transistor structures both being of a first conductivity type and having their bases interconnected and their emitters connected to a common point, the collectors of said first and second transistor structures constituting the arrangement input and the arrangement output respectively, the input of said non-inverting amplifier being connected to the collector of the first transistor structure and the output of said non-inverting amplifier being connected to the bases of the first and second transistor structures, characterised in that the non-inverting amplifier comprises a long tail pair of third and fourth bipolar transistor structures of a conductivity type opposite to said first conductivity type, the collector of the first transistor structure being d.c.-coupled to the base of the third transistor structure and the collector of the fourth transistor structure being d.c.-coupled to the bases of the first and second transistor structures.

2. An arrangement as claimed in Claim 1, wherein the current gain of the third structure is high compared with the current gains of the first and second structures.

3. An arrangement as claimed in Claim 1 or Claim 2, wherein the bases of the first and second structures are d.c.-coupled to the base of the fourth structure.

4. An arrangement as claimed in any preceding claim, including a capacitor connecting the collector electrode of the first structure to a reference potential point.

5. An arrangement as claimed in any preceding claim, including a capacitor connecting the bases of the first and second structures to a reference potential point.

6. A modification of an arrangement as claimed in any preceding claim, wherein the third and fourth bipolar transistor structures are replaced by first and second field-effect transistor structures respectively, the bases and collectors of the third and fourth structures being replaced by gates and drains respectively of the first and second field-effect structures respectively.

7. A current amplifier circuit arrangement substantially as described herein with reference to Figure 2 of the drawing.