GB2209908A - A bi-phase modulator - Google Patents

A bi-phase modulator Download PDF

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Publication number
GB2209908A
GB2209908A GB8721717A GB8721717A GB2209908A GB 2209908 A GB2209908 A GB 2209908A GB 8721717 A GB8721717 A GB 8721717A GB 8721717 A GB8721717 A GB 8721717A GB 2209908 A GB2209908 A GB 2209908A
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United Kingdom
Prior art keywords
gate
phase modulator
signal
nand
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8721717A
Other versions
GB8721717D0 (en
Inventor
David Charles Evenden
Bryan Stephen Rickett
Neil Roughton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co Ltd
Original Assignee
Plessey Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Co Ltd filed Critical Plessey Co Ltd
Priority to GB8721717A priority Critical patent/GB2209908A/en
Publication of GB8721717D0 publication Critical patent/GB8721717D0/en
Publication of GB2209908A publication Critical patent/GB2209908A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00Conversion of the form of the representation of individual digits
    • H03M5/02Conversion to or from representation by pulses
    • H03M5/04Conversion to or from representation by pulses the pulses having two levels
    • H03M5/06Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
    • H03M5/12Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

A bi-phase modulator uses gallium arsenide digital logic devices (i) in an EXOR gate configuration with additionally (ii) an AND/NAND gate for pulsing a carrier input, (Fig 2 (iii)) and possibly (iii) a flip-flop 5 to provide synchronisation of the carrier frequency with the modulating signal, to provide a pulsed bi-phase output (Fig 2 (v)). <IMAGE>

Description

A BI-PHASE MODULATOR The present invention relates to a bi-phase modulator and more particularly to modulators using high speed logic devices.
With increasing apparatus performance, there is a demand to improve operating speeds and reduce apparatus volume. This is particularly true with bi-phase modulation, especially where there is a requirement for pulsing of the modulated output.
Previously, apparatus for bi-phase modulation has been constructed with discrete components. These discrete components such as signal mixers, matching networks and drive circuitry have also often required fine adjustment to achieve bi-phase modulation.
While to provide a pulsing operation, an additional PIN diode R.F.
switch (or mixer) with associated drive circuitry has been necessary.
As will be appreciated, the use of discrete components makes equipment bulky and expensive to construct.
The availability of high speed Gallium Arsenide digital logic devices have allowed construction of a bi-phase modulator according to the present invention which substantially reduces these problems.
According to a first embodiment of the present invention there is provided a bi-phase modulator comprising an AND gate and a ex OR gate wherein the AND gate is constructed and arranged to receive a carrier frequency signal, acts to pulse that carrier signal and directs it to the ex-OR gate wherein the pulsed carier signal is modulated by a modulating signal.
Preferably, the ex-OR gate and AND gate are constructed of Gallium Arsenide.
Alternatively, according to a second embodiment of the present invention there is provided a bi-phase modulator comprising wave synchronisation means and a modulation element wherein the signal synchronisation means is adapted to synchronise a carrier wave frequency and a modulating wave signal before these waves are inputed to respective inputs of the modulation element, the modulation element comprising a logic device comparing the levels on its inputs to provide a modulated output wave signal.
An embodiment of the present invention will now be described by way of example only with respect to the accompanying drawings wherein Figure 1 shows, in block diagram form, a pulsed biphase modulator, including an ex-OR gate and an RF gate switch, according to the present invention; Figure 2 illustrates a schematic timing diagram for the modulator shown in Figure 1; and, Figure 3 shows, in block diagram form, a pulsed biphase modulator as shown in Figure 1 with a signal synchronisation flipflop device.
In Figure 1, a pulsed biphase modulator according to the present invention is disclosed. A carrier radio frequency (RF) input 1 is switched by an AND gate 3 under the control of a gate pulse 5.
The gate 3 through its AND truth table providing a pulse 7 of carrier 1 when a gate pulse 5 is present. This pulsed carrier 7 is directed to a first input 8 of an ex-OR device 9. Typically, the carrier frequency can be up to 2.8-3.OGHz while the gate pulses are of the order oflO0tS duration. Although it will be appreciated that as with other logic devices the modulator could operate down to D.C levels. A modulating input signal 11 incident upon a second input 15 of ex-OR device 9 bi-phase modulates the carrier pulse 7. It is due to the operating speeds of Gallium Arsenide devices that the ex-OR gate constructed can accomodate the carrier frequency.
The ex-OR truth table given below demonstrates the inherent ability of an ex-OR gate to provide modulation.
Ai A2 B=Al O 0 0 0 1 0 1 1 1 0 A typical timing diagram for a pulsed bi-phase modulator according to the present invention is shown in Figure 2(i-v). A radio frequency (RF) input is shown in Figure 2(i), this input is presented to input 1 of AND gate 3. A gate pulse, of the order of 100nS, as shown in Figure 2(ii) is presented at input 5 of AND gate 3. The AND gate 3, according to the truth table below, gives a gated or pulsed RF output (Figure 2(iii)).
A1 A2 B=Al*A2 O 0 0 1 0 0 0 1 0 1 1 1 This gated RF output 7 of the AND gate 3 is presented at input 8 of the ex-OR gate 9, whilst the modulating signal (Figure 2(iv)) is directed to input 15. The ex-OR gate 9, through its truth table stated previously, provides a bi-phase modulated signal as shown in Figure 2(v) through its output 17.
It will be appreciated that both the AND and ex-OR gates due to their construction from high speed Gallium Arsenide material can accomodate the necessary signal frequencies with the minimum of interface components. The AND gate is used as an RF switch and 1800 signal splitter. The ex-OR gate provides bi-phase modulation.
Usually synchronisation of the RF carrier phase and modulation signal phase is not required due to the inherent effects of biphase modulation. However, synchronisation can be provided as shown in Figure 3 using a flip-flop element 31 and replacing the AND gate with an AND/NAND gate 33 the combination constituting wave synchronisation means whereby the NAND output is used to control the flip-flop element 31. It will be appreciated that in practice the AND/NAND gate and AND gate may be the same device utilising different output pins.
If the flip-flop element 31 is constructed of GaAs then the operating time lag of the flip-flop element 31 can be discounted. The flip-flop 31 therefore acts to synchronise leading edges of the carrier signal and modulating signals by triggering, upon the first leading edge of the NAND output coinciding with a modulating signal 37 of logic 1, a logic 1 output 39 to the ex-OR gate. The output 39 is sustained until the first leading edge of a NAND signal is present without a logic 1 at the modulating signal input 37. As the NAND and AND output are synchronised so is the modulating signal and carrier signal.
In the embodiments described above there are three devices each constructed of Gallium Arsenide allowing operational speeds for these devices which reduce to a minimum interface requirement.
The devices, by their nature, can be readily produced by volume miniaturisation using gate-array integration etc.

Claims (17)

1. A bi-phase modulator comprising an AND gate and a ex-OR gate wherein the AND gate is constructed and arranged to receive a carrier frequency signal acts to pulse that carrier signal and directs it to the ex-OR gate wherein the pulsed carrier signal is modulated by a modulating signal.
2. A bi-phase modulator as claimed in claim 1 wherein the ex-OR gate is constructed on a Gallium Arsenide substrate.
3. A bi-phase modulator as claimed in claim 1 or 2 wherein the AND gate is constructed on a Gallium Arsenide substrate.
4. A bi-phase modulator as claimed in claims 1, 2 or 3 wherein the ex-OR gate and AND gate are constructed upon the same substrate.
5. bi-phase modulator substantially as hereinbefore described with reference to Figure 1.
6. An ex-OR gate adapted for bi-phase modulation of a carrier signal with a modulating signal.
7. An ex-OR gate as claimed in claim 6 wherein the ex-OR gate is constructed of Gallium Arsenide.
8. A radio-frequency pulsing arrangement including an AND or NAND gate whereby a presented radio-frequency is outputed dependent upon the presence of a pulse signal.
9. A radio-frequency pulsing arrangement as claimed in claim 8 wherein the AND or NAND gate is constructed of Gallium Arsenide.
10. A bi-phase modulator comprising wave synchronisation means and a modulation element wherein the wave synchronisation means is adapted to synchronise a carrier wave frequency and a modulating wave signal before these waves are inputed to respective inputs of the modulation element, the modulation element comprising a logic device comparing the levels on its inputs to provide a modulated output wave signal.
11. A bi-phase modulator as claimed in Claim 10 wherein the synchronisation means includes an element to pulse the carrier wave frequency.
12. A bi-phase modulator as claimed in claim 10 or 11 wherein the modulation element is an exclusive OR logic gate.
13. A bi-phase modulator as claimed in Claim 10, 11 or 12 wherein the synchronisation means comprises an AND/NAND gate device and a flip-flop device arranged whereby the AND/NAND device has respective inputs to receive the carrier wave frequency and a switching signal for pulsing of the carrier frequency, the AND/NAND device AND output being directed to the modulation element while the NAND output drives a clock input of the flip-flop device, the flipflop device data input being arranged to receive the modulating signal while its output is fed substantially in synchronism to the modulating device.
14. A bi-phase modulator as claimed in Claim 13 wherein the AND/NAND device acts as a 1800 signal splitter.
15. A bi-phase modulator as claimed in Claim 12 and any subsequent claim wherein the exclusive OR logic gate is formed from gallium arsenide.
16. A bi-phase modulator as claimed in Claim 13 and any subsequent claim wherein the AND/NAND device and the flip-flop device are formed from gallium arsenide.
17. A bi-phase modulator substantially as hereinbefore described with reference to Figure 3.
GB8721717A 1987-09-15 1987-09-15 A bi-phase modulator Withdrawn GB2209908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8721717A GB2209908A (en) 1987-09-15 1987-09-15 A bi-phase modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8721717A GB2209908A (en) 1987-09-15 1987-09-15 A bi-phase modulator

Publications (2)

Publication Number Publication Date
GB8721717D0 GB8721717D0 (en) 1987-10-21
GB2209908A true GB2209908A (en) 1989-05-24

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GB8721717A Withdrawn GB2209908A (en) 1987-09-15 1987-09-15 A bi-phase modulator

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GB (1) GB2209908A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000019608A2 (en) * 1998-09-30 2000-04-06 Koninklijke Philips Electronics N.V. Circuit for processing data signals

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1368069A (en) * 1971-10-20 1974-09-25 Post Office Digital communications systems
GB1473641A (en) * 1974-06-06 1977-05-18 Post Office Digital encoders for phase shift keyed systems
GB1493556A (en) * 1975-03-05 1977-11-30 Ncr Co Code conversion apparatus for binary data
GB2011229A (en) * 1977-11-04 1979-07-04 Mca Disco Vision Encoding and decoding of digital data
EP0064728A2 (en) * 1981-05-07 1982-11-17 Nec Corporation Multiple phase digital modulator
GB2120053A (en) * 1982-04-28 1983-11-23 Int Computers Ltd Digital data encoding

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1368069A (en) * 1971-10-20 1974-09-25 Post Office Digital communications systems
GB1473641A (en) * 1974-06-06 1977-05-18 Post Office Digital encoders for phase shift keyed systems
GB1493556A (en) * 1975-03-05 1977-11-30 Ncr Co Code conversion apparatus for binary data
GB2011229A (en) * 1977-11-04 1979-07-04 Mca Disco Vision Encoding and decoding of digital data
EP0064728A2 (en) * 1981-05-07 1982-11-17 Nec Corporation Multiple phase digital modulator
GB2120053A (en) * 1982-04-28 1983-11-23 Int Computers Ltd Digital data encoding

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000019608A2 (en) * 1998-09-30 2000-04-06 Koninklijke Philips Electronics N.V. Circuit for processing data signals
WO2000019608A3 (en) * 1998-09-30 2000-11-23 Koninkl Philips Electronics Nv Circuit for processing data signals
US6498817B1 (en) 1998-09-30 2002-12-24 Koninklijke Philips Electronics N.V. Circuit for processing data signals

Also Published As

Publication number Publication date
GB8721717D0 (en) 1987-10-21

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