GB2185663A

GB2185663A - 3-level line transmission code

Info

Publication number: GB2185663A
Application number: GB08600971A
Authority: GB
Inventors: Peter John Dyke; Andrew Michael Robinson
Original assignee: STC PLC
Current assignee: STC PLC
Priority date: 1986-01-16
Filing date: 1986-01-16
Publication date: 1987-07-22
Also published as: GB2185663B

Abstract

A line transmission code, used in a transmission system such as a subscriber loop, uses three levels, +, - and 0, the number of non-zero states being reduced to reduce bandwidth. A data stream is converted to HDB3 code, which is an AMI code, which is converted to the new code using the following rules: (i) non-adjacent 1 bits becomes +, +, or - - (ii) a run of an odd number of 1's becomes +0,...0, + or -0,...0- (iii) a run of an even number of 1's becomes +0,... 0, -, or -0, ...0+, Decoding is very simple, using the following rules: (a) ++ or -- received: the second pulse is deleted and replaced by 0 (b) if a run of 0's arrive after a + or a - , the + or - and the 0's are converted to 1's. This decoding brings the stream back to HDB3. Coding and decoding circuits are described. The coding arrangement comprises 4 bistables to the inputs of 2 of which the successive digits of the AMI code are applied from the outputs of the other 2 bistables, these other bistables being controlled by means of gating arrays. The ternary code is subjected to Class I partial response filtering in the transmission path.

Description

SPECIFICATION 3-Level Line Transmission Code The present invention relates to data transmission systems in which digital data is handled in binary form.

Transmission in digital form is subject to distortion due to the parameters of the transmission medium as a result of which a simple straight-sided pulse gets "spread out" so that inter-symbol interference (ISI) becomes inevitable. Various methods have been devised to deal with this, one of which is to transmit data in a format in which alternate bits of one value (usually 1) are inverted. This, known as AMI (alternate mark inversion) or HDB3, minimises the voltage unbalance which can otherwise occur when long strings of l's are sent, but introduces bandwidth difficulties.

An object of the invention is to produce a system in which, by modifying the line code used an improvement is effected.

According to the present invention, there is provided a data transmission system, in which digital data to be handled is transmitted in a balanced ternary form and subjected to Class 1 partial response filtering in the transmission path to effect bandwidth reduction or signal-noise improvement.

Embodiments of the invention will now be described with reference to the drawings, in which: Fig. 1 is a block diagram of a system embodying the invention.

Figs. 2 and 3 relate to decoding arrangements for the system of Fig. 1.

Figs. 4 and 5 relate to encoding logic for a modified system embodying the invention.

An essential basis of the technique on which the present system is based is that it in effect exploits what is known as partial response techniques. These reflect the fact that the transmission channel does not respond fully to a data bit being sent within one symbol period, but only responds partially. Thus each impulse as received extends over more than one timing interval so the channel in effect has some memory capability. The consequence of this is that two level signals as sent become multi-level as received.

Partial response techniques reduce the bandwidth of a transmission channel, e.g. to improve the signal-to-noise ratio at the receiver at the expense of allowing a controlled amount of inter-symbol interference (ISI). They can be classified into several classes, dependent on the filtering in the transmission channel. In the simplest form the bandwidth of the transmission channel used is approximately two-thirds that of the normal cosine response, which gives a large reduction in received noise. There is some ISI; thus with a single rectangular pulse into the filter the output is a pulse of the same polarity lasting for two bit times. If the transmitted data is in binary form, this ISI causes multi-level signals at the receiver.

With non-redundant ternary (three-level) input signals the minimum number of received levels is five.

This increase in the number of levels degrades system performance by providing lower level receive amplitude "eyes" on which a decision as to the significance of the signal is made.

In the system to be described, many pseudo-ternary or three level codes containing redundancy may be subjected to partial response filtering in the transmission path. Examples of these codes commonly used for transmission and/or at equipment interfaces are AMI, HDB3, B3ZS and B6ZS. Because of the inherent redundancy in these codes and their coding characteristics, bipolar violations never occur with an AMI code. They also never occur without intermediate zero pulses in HDB3, B3ZS and B6ZS. That is, a pulse of one polarity is always followed by zero pulses before another pulse of that polarity is transmitted. As partial response filtering causes a single pulse to last for two or more bit periods, an increase in the received number of levels does not occur until very steep band limiting occurs. This causes single pulses to last over four bit periods in the case of HDB3.Hence partial response filtering may be used with line codes of the above characteristics while still retaining three receive levels as transmitted through the filter.

In the system to be described, ternary data, e.g. in AMI or HDB3, is transmitted and subjected to such partial response filtering in the transmission path. Because of the inherent redundancy of the ternary data-no marks of the same polarity allowed within the same ISI period-the ISI does not cause extra levels in the receiver. Instead, such a code causes a modified ternary "eye" which can be regenerated using established circuits and techniques.

The use of three-level codes for transmission means that the modified ternary "eye" at the receiver retains many of the properties of the original code, i.e. no direct current or low frequency components, finite digital sum variations (DSV), etc., which makes equalisation, regeneration and error detection fairly simple, and also reliable.

Examples of the number of received levels with binary AMI and HDB3 line codes are given below, dependent on the number n of superposition.

n Binary AMI HDB3 1 2 3 3 2 3 3 3 3 4 3 3 4 5 3 5 When regenerated, the ternary "eye" referred to above gives a ternary signal which is a coded form of the transmitted signal. For example, with Class I, n=2, filtering this coding occurs in accordance with the expression: bn=an+an~t where an is the ternary digit to be coded, an~, is the preceding ternary digit, and bn is the coded digit. This gives the following results: (i) non-adjacent 1's, i.e. + or are extended to become ++ or respectively.

(ii) a run of an odd number of l's becomes +0... 0+ or..... 0-, i.e. the first and last digits of the sequence have the same polarity while any in between are 0's.

(iii) a run of an even number of 1's becomes +0 . . . 0or0 . . . 0+, i.e. the first and last digits have the opposite polarity while any in between are 0's.

Thus in cases (ii) and (iii) the first digital pulse is unaltered, further l's becomes 0's, and the last digit defines whether the number of l's is odd or even.0 digits are unaltered.

Decoding is then simple and is based on the expression: Cn=bnCn-1 where C digits are those to be decoded, and b are received digits. This follows the following rules: (a) ++ or - - received: the second pulse of such a pair is deleted.

(b) all 0's after a single received pulse become l's, the next pulse, + or -, is removed and becomes a 0 digit.

In the above, where the HDB3 "all zeroes" is used, it is coded and decoded automatically.

We now list in tabular form some coding examples.

Binary Conventional HDB3 Coded Signal (n=2 filtering) (i) 111110 ±±+0 +0000+ (ii) 111100 f-±OO +000-0 (iii) 101010 +0-0+0 +±---++ (iv) 100010 +000-0 ++00-- (v) 0110 0±0 0+0 (vi) 011011 0±0± 0+0-+0 (vii) 0000000000 0-+00±00- 0-0+0+0-0 (viii) 0110000010 0- +000+0-0 0-0+00++ - - Notes on the above table: (a) In Examples (i) and (ii) all 1's are removed.

(b) From Examples (iii) and (iv) it will be seen that binary 10 ends up in the new code as + + or (c) Example (viii) is the HDB3 "all zeroes" code combination.

This coded form of HDB3 offers several advantages over HBD3 when used as a line code itself. From the table above it can be seen that runs of 1's in conventional HDB3 are replaced by 0's in the coded form and this means that there is no signal at the half bit rate in the spectrum of the coded HDB3. In wire systems it is at the half bit rate that the gain of adjacent regenerators is highest and therefore using this modified form of HDB3 gives a reduction in cross-talk to adjacent systems. A block diagram of an example system using this coded HDB3 is shown in Fig. 6 and is described later.

We now consider an example of a system employing the invention, in which randomising or scrambling the transmitted bit stream is not needed.

Fig. 1 is a block diagram of a transmission system the invention, separated into transmitter and receiver sections. The line code used in this example is HDB3.

The transmitter section uses a commercially available regenerator integrated circuit 1 behind a 0-6 dB equaliser 2 to allow for in-station cabling losses.

At the receiver, two regenerator integrated circuits 4 and 5 are used to recover the data. The first of these, 4, equalises the received signal to the partial response described earlier. It receives the signals from the line via a partial response filter 7 and a 100% raised cosine equaliser 8, which together form a partial response Class 1, n=2 filter. The 6 dB bandwidth of this filter is approximately two thirds that of the normal raised cosine response. Hence a large improvement in signal-noise ratio over a standard HDB3 regenerator is attained. However, because all frequencies at or above the half bit rate are rejected by the filter 7, no signal appears at the "eye" of the integrated circuit 4 during runs of l's in the data. Hence this partial response "eye" cannot be used for clock extraction.Therefore, the second integrated circuit 5 takes the received signal equalised to a normal raised cosine response and uses this to extract a clock signal for the first circuit 4.

The extra bandlimiting in the partial response filter 7 causes a controlled amount of ISI, which gives a modified ternary "eye" at the circuit 4. When regenerated this gives a ternary signal that can be decoded back to HDB3 by a simple logic circuit requiring only three or four logic chips. This is described briefly later.

The maximum DSV of the ternary signal, before decoding back to HDB3, is 3, which is 1 more than the DSV of HDB3, so error detection can be implemented by an excess DSV counter to indicate error rates accurately up to 1 in 103.

The logic function required to decode the regenerated n=2 partial response code back to HDB3 consists of 4 flip flops and 4 gates. Alternatively a decoding system incorporating decision feedback equalisation (DFE) can be used; this would simplify decoding in intermediate regenerators, if such are needed.

Fig. 2 shows the decoding logic used to convert from n=2 code back into HDB3, the 1A and 1B inputs being respectively the + and - inputs for that code, as per the following table: Ternary Bit IA 1B + 01 - 10 0 11 QA and QB are the HDB3 outputs, positive and negative respectively for the code after decoding back to HDB3.

Fig. 3 is a state diagram which indicates how the decoder switches between the various states. Thus as will be seen to be necessary from the earlier discussion of the code, this needs three states for 11 output (ternary '0' output). Truth tables for Fig. 2 are given below.

Figs. 4 and 5 are diagrams similar to Figs. 2 and 3, but for the conversion to the new code format representation. Truth tables for Fig. 4 are given below.

These circuits are used when using the coded form of AMI/HDB3 as a line code itself, as described earlier. Fig. 6 shows the block diagram of such a system. As before a 06dB equaliser compensates for in-station cabling before the transmitter and a clock is extracted to drive the following logic. The data is then scrambled before being fed into the encoding circuitry of Figs. 4 and 5. A scrambler may be needed to break up runs of l's in the data which would give long runs of 0's at the decoder output.

At the receiver full equalisation is required (i.e. same as for normal HDB3/AMI) since the encoding logic has effectively done the Class I filtering already and any further bandlimiting will result in extra levels at the receiver.

After clock extraction and regeneration, the received data is passed through the decoder logic described in Figs. 2 and 3 and then descrambled to give the original HDB3/AMI.

Truth Table for Encoder Logic Present State Input Next State Qx Qy QA QB 1A IB Dx Dy DA DB 0 1 0 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 0 1 0 1 1 0 1 1 1 1 1 1 1 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 1 1 1 1 0 1 0 1 1 0 1 0 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 0 1 0 1 0 1 0 1 1 1 0 1 1 0 1 0 1 0 1 1 0 1 1 1 1 1 1 1 1 1 1 0 0 1 0 1 0 1 1 1 1 0 1 0 1 0 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 1 1 1 1 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 Truth Table for Decoder Logic Present State Input Next State Qx Qy QA QB IA IB Dx Dy DA DB 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 1 1 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 0 1 1 1 0 0 1 1 1 0 1 1 1 1 0 1 0 1 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1

Claims

CLAIMS 1.A A data transmission system, in which digital data to be handled is transmitted in a balanced ternary form and subjected to Class I partial response filtering in the transmission path to effect band-width reduction or signal-noise improvement.
2. A data transmission system in which digital data to be handled is converted from a binary representation into a first code format wherein digits of one binary value are sent as a zero amplitude signal while successive digits of the other binary value are sent alternately as signals of different polarities, in which the data stream in the first code format is converted into a second code format according to the equation bn=an+bn~1, where a represents the digit in the first code format and b represents digits in the second code format, in which if said binary values are 0 and 1 respectively the coding between the first and the second formats is effected according to the following rules:: (i) non-adjacent 1 bits becomes +, +, or - (ii) a run of an odd number of 1 bits becomes +0,...0, + or -0,... 0-, i.e. the first and last digits of the sequence have the same polarity while any inbetween are 0's (iii) a run of an even number of 1 bits becomes +0,...0, -, or -0,... 0+, (iv) the first pulse in case (ii) or (iii) is unchangeable, further adjacent 1's become 0's and the first pulse by its polarity defining whether there is an odd or an even number of l's, and in which the decoding to the first code format is effected in accordance with the equation Cn=bn=Cn~, where C is a digit decoded into the first code format, in which if said binary digit values are 0 and 1 respectively the decoding between the second and the first code formats is effected according to the following rules: (a) ++ or-- received: the second pulse of the pair is deleted and replaced by0 (b) if a run of 0's is received after a + or a -, the + or - and the 0's are converted to 1's (c) "all zeroes" is handled both in coding and decoding automatically.
3. A data transmission system as claimed in claim 2, in which the decoding is effected by an assembly of gates and bistables, substantially as described with reference to Figs. 2 and 3.
4. A data transmission system as claimed in claim 2 or 3, in which the coding is effected by an assembly of gates and bistables, substantially as described with reference to Figs. 4 or 5.
5. A data transmission system, substantially as described with reference to Figs. 1, 2,3,4 and 5 or Fig. 6.
6. A coding circuit for conversion from an alternate mark inversion (AMI) binary code into a partial response code, which includes four bistables to the inputs of two of which the successive digits of the AMI code are applied in two-wire manner from the outputs of the other two of the bistables, and two gating arrays which control said other two of the bistables in accordance with the current states of the inputs and the current states of the outputs.
7. A decoding circuit for conversion from a partial response code into an alternate mark inversion (AMI) binary code, which includes four bistables to the inputs of two of which the partial response code bits are applied in two-wire manner via gating means, the AMI code being derived from the outputs of the same two bistables in two-wire manner, and the gating means being controlled by the current conditions of the bistables and of the inputs and the outputs to effect said conversion.

Amendments to the claims have been filed, and have the following effect: A new claim has been filed as follows:-
8. A data transmission system in which digital data to be handled is converted from a binary representation into a first code format wherein digits of one binary value are sent as zero amplitude signals while successive digits of the other binary value are sent alternately as signals of different polarities, in which the data stream in the first code format is converted into a second code format according to the equation bn=an+bn~1, where a represents the digit in the first code format and b represents the digit in the second code format, in which if said binary values are 0 and 1 respectively the coding between the first and the second formats is effected according to the following rules:: (i) non-adjacent 1 bits, i.e. + or - each become +, +, or -- respectively; (ii) a run of an odd number of 1 bits becomes +0,... 0+,or-0,... 0-, i.e. the first and last digits of the sequence have the same polarity while any in between are 0's; (iii) a run of an even number of 1 bits becomes +0,... 0-,or-0,... 0+, i.e. the first and last digits of the sequence have opposite polarities while any in between are 0's; and (iv) the first pulse in case (ii) or (iii) is unchanged, further adjacent l's become 0's and the final pulse by its polarity defines whether there is an odd or an even number of l's; in which the decoding to the first code format is effected in accordance with the equation Cn=bnCn1, where C is a digit decoded into the first code format, in which if said binary digit values are 0 and 1 respectively the decoding between the second and the first code formats is effected according to the following rules: : (a) if ++ or -- be received, the second pulse of the pair is deleted and replaced by 0; (b) if a run of 0's is received after a + or a -, the + or - and the 0's are converted to l's; and in which the "all zeroes" in said first code is automatically coded into a special preselected code combination, and said preselected combination in the second code is automatically decoded to "all zeroes" in the first code.