GB2181312A - Frequency alignment circuit and synthesizer therefor - Google Patents

Abstract

An alignment circuit is of the type including a local oscillator 13 and one or more tuning filters 5, 9, each controlled by respective varactor diodes D1 to D4 to which a common high-voltage tuning signal Vc is applied at their high-voltage side. The tuning signal Vc is supplied by a synthesiser circuit 3' responsive to the output of the local oscillator 13. The synthesiser circuit 3' also applies low-voltage correction signals ???V1 to ???V4 to the opposite side of respective ones of these diodes D1 to D4, which signals are specific to the different characteristics of the diodes. The synthesiser circuit (Figure 5) thus may comprise a shift register (41) and digital-to-analogue converter (39) for generating the voltage correction signals ???V1 to ???V3 in response to digitised data supplied from a pre-programmed memory (45) under the control of a system microprocessor (43). This circuitry may be combined with high-frequency synthesis circuits on a common integrated chip. The invention has application to TV channel selection/tuner circuits. <IMAGE>

Description

SPECIFICATION Frequency alignment circuit and synthesizer therefor Technical field The present invention concerns improvements in or relating to frequency alignment circuits and to synthesizers utilisedtherein, especially, but notexclusively, television (TV) channel selection/tuner circuits and digitally programmable frequency syn thesizers therefor.

At present most TV tuners use digital frequency synthesis to generate a local oscillator varactor control voltageforobtaining a selected local oscillator (LO) frequency. The digitally programmablefrequency synthesizer used is normally part of a phase or frequency-locked loop and will usually incorporate a high frequency prescaler. The synthesizer isfrequ entyrequiredtofunction up to frequencies of the order 1.3GHz and the presenttrend isto use a single chip implimentation in conjunction with external high voltage components.

It is usual to incorporate a preselection filter and image rejection filters in the circuits aforesaid, and varactors (varicapdiodes) also are usedforaligning the frequency characteristics of these r.f.-filters.

Background art In TV tuner circuits, used currently, a common varactor control voltage is applied to each ofthevaractor diodes, ie. the filter diodes and the local oscillator diode. It is important that the varactor-tuned r.f.filters and local oscillator should have good mutual frequencytracking. Because of the spread of the characteristics oftuned circuit components, the var- actor diodes in particular, time consuming and costly manual alignment is requisite to achieve this required tracking and appropriate frequency ranging. The varactor diodes, therefore, must undergo a complex selection procedure so to obtain matching within ac ceptable close tolerance - eg. 2%. Even when such procedures are adopted, tuner performance is in general less than optimum.

Asolution to the problem, just mentioned, has been reported recently- cf. "Computer Controlled Television Channel Selection and TunerAlignment" byD.DumontandA.Neelen, Digest of Technical Papers, 1985 IEEE International Conference on Con sumer Electronics, pp.78-79 (June 5, 1985). The sol- ution,thus reported, is to use not a single common varactorcontrol voltage, but to use a corrected highlevel control voltage specific to each varactor diode.

The set of control voltages aforesaid are derived from a synthesizer generated varactor line voltage, corrections being applied to compensate for the disparate impedance- voltage characteristics of the individual varactor diodes. In this case, therefore, a wider tolerance on diode characteristics is acceptable and coarse component selection only therefore is requisite. According to the implimentation reported, an additional semiconductor chip is utilised to perform the generation of voltage corrections and the high-level voltage signal processing necessary for producing the set of corrected control voltages (cf. Figure 3 of the paper above-cited).

It is thus noted that two semiconductor chips, at least, are utilised- one chip optimised for highfrequency low-voltage synthesizerfunctions, and an otherchipoptimisedto handle high-voltagecorrection functions.

For optimum integration of the synthesizer system, it would be necessary to integrate these aforesaid high voltage outputs and associated addition circuitry with the high-frequency synthesis circuitry. This is disadvantageous since high-frequency synthesis circuitry components usually have in herent low breakdown voltage. For a typical silicon semiconductor component, this breakdown voltage would be approximately 1 0V, a voltage much lower than that required by the high voltage processing circuitry (c.30V). Techniques are known for designing a simple high voltage output stage which could in turn be serviced by the synthesis loop.However, techniquesfor high voltage voltage processing would involve complex design, and any reliable method would most like require inordinately high numbers oftransistors, and would thus utilise significantly large areas of semiconductor material.

Disclosure ofthe invention The present invention is intended as an alternative and advantageous solution to the problem aforesaid.

The need for separate semiconductor chip structures, orfor inordinately complex circuitry on a single chip, is obviated.

The solution to this problem, as disclosed herein, is to apply a common varactor control voltage to the high-voltage side of each varactor, whilst applying a varactor specific low-level correction voltage to the low-voltage side of each varactor.

It is noted that only low-level corrective voltage outputs are requisite, and since these voltages are inherently within the voltage handling capability of high-frequency synthesizer processing circuit components, both synthesizerfunction and correction function circuitry may be implimented using a single common semiconductor chip.

in accordance with a first aspect of the invention, therefore, there is provided a frequency alignment circuit ofthe type comprising:an r.f. mixer; a local oscillator, the output ofwhich is connected to an inputofthe mixer; a pre-mixer r.f. tuned filter, responsive to input signal,the output of which is connected to another inputofthe mixer; a set of varactor diodes, one of which is connected to the local oscillator, at least one other of which is connected to said filter; and, a synthesizer circuit, responsive to and connected to receive a sample of the local oscillator output signal, this synthesizer circuit having a varactor control voltage line output, this output being connected to the high-voltage side of each said varactor diode, characterisedby:- varactor-specific low-level correction voltage gener ationcircuitryhavinga plurality of corresponding outputs, each said output being connected to the low-voltage side of each corresponding varactor diode, respectively.

The invention combines all the advantages ofauto- maticfrequency alignment with further evident advantage of possible single chip implimentation, butatthesametimeavoids high complexity, highvoltage voltage-processing circuitry. The advantages of automatic alignmentare:- improved noise figure performance; greater constancy in gain and group delay; as also, increased selectivity and better interference rejection.

In accordance with a second aspect of the inventin there is provided a synthesizer semiconductor chip for use in thefrequency alignment circuit aforesaid, wherein said chip incorporates an highfrequency synthesizer circuit having a varactorcontrol voltage line output; and in addition thereto and integrated therewith, a low level, compatible, varactor-correction voltage generation circuit and plural outputs associated therewith.

Itshould also be noted thatthe varactorcontrol voltage line output aforesaid may also utilise external high voltage components, and such design is not precluded from the scope ofthis invention.

Brief introduction of the drawings In the drawings accompanying this specification: Figures land 2 are block circuit diagrams, in part simplified and schematic, of a standard frequency alignment circuit, and, a known improved variant thereof, respectively; Figure 3 is a block circuit diagram of a frequency alignment circuit, a circuit modified in accordance with the present invention; Figure 4 is an illustrative graph depicting the impedance-voltage characteristics of a pair of disparate varactordiodes; and, Figure 5is a block circuit diagram of a single chip synthesizer, also modified in accordance with the present invention.

Description of preferred embodiment So that the invention may be better understood, an embodiment thereof will now be described, byway of example only, and with particular reference to the accompanying drawings.

A standard frequency alignment/TVtuner circuit is shown in Figure 1. This comprises a tuner component assembly 1, a synthesizer 3 and a set oftuning control varactor diodes D1 to D4 each of which is connected to a corresponding part ofthe assembly 1.

The assembly is itself comprised of several components, namely: a preselection filter 5, a preamplifier 7, a band-pass image-rejection filter 9, a r.f.

mixer 11, local oscillator 13whichtogetherwiththe band-pass filter 9 is connected to respective inputs of the mixer 11, an lFoutputfilter 15 connected to the outputofthe mixer 11 and an iF-stage pre-amplifier 17. Varacter diode Dr, thetwo varactor diodes D2 and D3, and the varactor diode D4 are, as shown, connec- ted to the preselection filter 5, the band-pass filter9 and the local oscillator 13, respectively. A sample local-oscillator r.f. voltage signal is fed to the input of the synthesizer 3 and this latter, in response to this signal, generates a varactor-line control voltage Vc.

This voltage Vc is applied to the high-voltage side of each varactor diode D1 to D4, in turn via isolating im pedances R1 to R4. The low-voltage side of each var actor diode D1 to D4 is connected to a common earth line VEE. AS discussed above, each ofthe varactor dio des D1 to D4 must be selected to be within a very close tolerance.

In the known improved variant, shown in Figure 2, a correction circuit 19, implimented on an additional, discrete, voltage-optimised, semiconductor chip, is interposed between the synthesizer 3 and each ofthe varactor diodes D1 to D4. As in the previous system circuit, these diodes D1 to D4 are each connected to a common earth-line VEE. The correction circuit 19 is responsiveto the varactor line voltage Vc and gener ates varactor-specific corrected voltages Vci to Vc4for each ofthe diodes D1 to D4. These corrected voltage signals Vc1 to Vc4 are applied, as shown,tothe highvoltage side of each ofthe diodes D1 to D4.

In the inventive variant, shown in Figure 3, the syn thesizer processing circuitry and also corrective cir cuitryare implimented using a common system chip 3'. This chip 3' has an inputfor inserting sampled local oscillator signal, and, as is conventional,the synthesizer processing circuitry generates a varactor-line control voltage Vc. The corrective circuitry, however, generates low-level varactor-specific cor rective voltages V1 to V4. The control voltage Vc is applied to each varactor diode D1 to D4,whilstatthe same time the corrective low-level voltages are app lied to the diodes D1 to D4.These are applied to the low-voltage side, in each case, between each diode D1 to D4 and corresponding capacitors C1 to C4 each ofwhich whichistiedtoacommonearth-linevEE The low-level corrective voltages V1 to V3 for the filtervaractor diodes D1 to D3 are pre-determined to compensate for differences in the diode impedancevoltage characteristics- See Figure 4.

In the graph (Figure 4) curves are shown comparing the characteristics forthe local-oscillatorvaractor diode D4and one ofthefilterdiodes D1. It can be seen that there is a disparity between these two characteristics. The varactor diodes D1 to D3 are here selected to have a broad tolerance- ie. their characteristics lie within + Vm (say) ofthe local oscillator varactor D4 voltage Vc.In the implimentation dis- cussed here a bias voltage V4 is applied to the local oscillatorvaractordiode D4: V4=+Vm At a given value of capacitance Cm and control voltage Vc, the same capacitance can be attained for each varactordiode D1 to D3 by applying an errorcorrection voltage V. This error voltage V1 is shown referenced to the local-oscillator varactor diode D4 characteristic.

Atypical implimentation of common system chip 3' is shown in Figure 5. The synthesis circuitry, part of this chip 3', is of phase-locked loop (PLL) design. (It is to be noted that other designs of synthesizer circuit can be adopted - eg. frequency-locked loop (FLL) and are not precluded from the scope of this invention.) This circuitry comprises a reference oscillator 21, a reference divider 23, a phase comparator 25, a pre-amplifier27 and prescaler 29 and programmable divider 31,all arranged in well-known configuration.

The output ofthe comparator 25 feeds a charge pump 33 and output loop-filter comprised of an amplifier 35 and associated filter 37. Each errorvoltage AV1 to AV3 is generated by means of a digital analogue converter (DAC) 39. The programmable divider 31 and DAC 39 are each controlled by means of a common n-bit shift registerword store 41,which in turn is governed by a microprocessor43 and memory 45 (usually external). The chip 3' also inclu dens a generator 47 for the I ocal oscillator diode D4 shift voltage V4.

Whilst the prescaler 29 has been described as part ofthe chip 3', it may also be implimented as an external component. Thus for example, a highfrequency bipolar-process component prescaler may be used in conjunction with a low-frequency (eg. MOS/CMOS/NMOS) process chip.

During system assembly, the varactor diode characteristics are determined under computer test and data defining the error voltages AV1 to AV3 (vac) is loa ded fro m the com puter into the system memory 45 to provide a look-up table for errorvoltage generation.

Claims (11)

1. Having described the invention and the manner in which it may be performed a frequency alignment circuit ofthetype comprising:- an r.f. mixer; a local oscillator, the output of which is connected to an inputofthe mixer; a pre-mixer r.f. tuned filter, responsive to input signal, the output of which is connected to another inputofthe mixer; a set ofvaractor diodes, one of which is connected to the local oscillator, at least one other of which is connected to said filter; and, a synthesiser circuit, responsive to and connected to receive a sample of the local oscillator output signal, this synthesiser circuit having a varactor control voltage line output, this output being connected to the high-voltage side of each said varactor diode, characterisedby: - varactor-specific low-level correction voltage generation circuitry having a plurality of corresponding outputs, each said output being connected to the low-voltage side of each corresponding varactor diode, respectively.

2. Afrequencyalignmentcircuit, as claimed in claim 1, wherein the correction voltage generation circuitry comprises:storage means for holding error correction data words; and digital-to-analogue conversion means, responsive to said storage means, to produce the error correction voltages that are applied to the low voltage side of the corresponding varactor diodes.

3. Afrequencyalignmentcircuit, as claimed in claim 2, wherein said storage means is provided buy a shift register.

4. Afrequencyalignmentcircuit, as claimed in claim 3,togetherwith:a microprocessor, co-operative with said shift register, for loading the correction data words therein; and a memory, co-operative with this microprocessor, for containing a set of correction data words therefor.

5. Afrequency alignment circuit, as claimed in claim 4, wherein the memory is pre-programmed and contains thus correction data words specific to the characteristics ofthe circuit varactor diodes.

6. A synthesiser semiconductor ch ip for use in the frequency alignment circuit, as claimed in claim 1,wherein said chip incorporates an high-frequency synthesiser circuit having a varactor control voltage line output; and in addition thereto and integrated therewith, a low level, compatible, varactorcorrection voltage generation circuit and plural outputs associated therewith.

7. Asynthesisersemiconductor chip, as claimed in claim 6, wherein said voltage generation circuit comprises: storage means for holding error correction data words, and digital to analogue conversion means, responsive to said storage means, to produce error correction voltages.

8. A synthesiser semiconductor chip, as claimed in claim 7, wherein said storage means is provided by a shift register.

9. A synthesier semiconductor chip, as claimed in claim 8, wherein the high frequency synthesiser circuit includes a digitally programmable divider, which latter is co-operative with the shift-register, this register being adapted for holding control data therefor in addition to said error correction data words.

10. Afrequencyalignment circuit constructed adapted and arranged to operate substantially as described hereinbefore with reference to and as shown in figures 3to 5 of the accompanying drawings.

11. A synthesiser semiconductor chip constructed adapted and arranged to operate substantially as described hereinbefore with reference to and as shown in figure 5 of the accompanying drawings.