GB2180419A - Direct conversion receiver - Google Patents

Abstract

In direct conversion receivers, particularly receivers in which d.c. block capacitors 20,22 connected to the outputs of quadrature-related mixers 12,14 are integrated on-chip, it is important to maintain the local oscillator 16 coupled to the mixers on-tune. An a.f.c. circuit is provided which is able to sense if mistuning is identified. The a.f.c. circuit comprises a phase detector 30,32,34 coupled to the outputs of the quadrature related mixers, a frequency discriminator 36 coupled to a point in a low frequency path from one of the mixers, and a multiplier 38 for multiplying together the outputs of the phase detector and frequency discriminator to produce a control signal which has one polarity if mistuning is high and the opposite polarity if mistuning is low. Modifications for extending the control range of the a.f.c. circuit are disclosed. The receiver is for paging and receives digital signals coded by frequency-shift keying, the local oscillator 16 being locked to the carrier frequency. <IMAGE>

Description

SPECIFICATION Direct conversion receiver The present invention relates to a direct conversion receiver.

Direct conversion receivers are known per se for use in digital paging receivers. In digital paging in accordance with CCIR Radiopaging Code No. 1 signals are frequency modulated on a carrier frequency f,, by frequency shift keying so that a 1x is fc4.5kHz and a "O" is fC+4.5kHz. These receivers are characterised by a local oscillator tuned to the carrier frequency, the front end mixers producing an output at baseband frequencies. In order to separate the binary signals, quadrature related outputs of the mixers are low pass filtered and thereafter data is recovered by a demodulator circuit. Any drift in the local oscillator will cause the audio signalling terms to have different frequencies symmetrically disposed about the on-tune audio tone frequency.Accordingly it is desirable to provide an a.f.c.

system for such a receiver. The low pass filtering includes d.c. block capacitors and in order to produce a sharp cut-off in the filter characteristic near d.c. then the block capacitors should have a high value which means that they are not integrable with the rest of the receiver circuitry and also the circuit is slow in operation. Use of lower value capacitors would enable the circuit to operate more quickly but has the disadvantage of producing a large notch in the characteristic at and near d.c. However such lower value capacitors may then be integrated.

An object of the present invention is to provide automatic frequency control in a direct conversion receiver.

According to the present invention there is provided a direct conversion receiver including a tunable local oscillator for mixing an input signal down to baseband in a pair of quadrature related mixers, wherein the polarity of a signal passed to an a.f.c. system for the local oscillator is determined by the output of phase detecting means coupled to both signal paths, which output indicates whether the signal originates from above or below the local oscillator frequency.

The a.f.c. system may comprise a frequency discriminator coupled to one of the signal paths from said mixers, a phase detector coupled to both said signal paths and means for forming a product of outputs from the frequency discriminator and the phase detector.

The present invention also provides a direct conversion receiver comprising quadrature related first and second signal paths including mixers, a tunable local oscillator coupled to said mixers for mixing an input signal down to baseband, and an a.f.c. circuit comprising a phase detector coupled to the first and second signal paths to identify whether the signal originates from above or below the local oscillator frequency, a frequency discriminator coupled to a low frequency point in one of the first and second signal paths, and a circuit for reversing the polarity of the frequency discriminator output according to whether the signal originates from above or below the local oscillator frequency, said circuit having inputs coupled to the outputs of the phase detector and the discriminator, an output of the multiplier, in operation, being used to provide an a.f.c. signal for the local oscillator.

The present invention is based on recognition of the fact that if the local oscillator is mistuned then two audio tone signals will be produced but because of their symmetry with the on-tune audio tone signal it is not possible to determine in which direction the local oscillator frequency should be shifted, but this is not a problem if it is possible to identify the sense of the mistuning. Such a sense signal can be provided by a phase detector acting on both of the quadrature outputs. Multiplying the discriminator output with the sense signal provides an appropriate a.f.c. voltage for controlling the local oscillator frequency.

If desired narrow bandpass filters are coupled to the outputs of the mixers in the first and second signal paths, the passband of said bandpass filters being centred on the on-tune audio frequency. Advantages of narrowband operation are that smaller d.c. block capacitors can be used with the consequent increase in speed and when fabricating the receiver as a monolithic integrated circuit these capacitors can be integrated as part of the monolithic circuit.

Alternatively when low pass filters are coupled to the outputs of the mixers in the first and second paths, each of the filters may have a characteristic which has a sharp cut-off at as high a frequency as possible having regard to obtaining adequate adjacent channel rejection, the d.c. blocking circuitry contributing a filter response which rises at a slow rate from d.c., the rate being such that there is no signal attenuation when the local oscillator is on-tune. Such an overali filter characteristic enables the a.f.c. range to be extended compared to one which increases rapidly from d.c.

This is because at the limit of the a.f.c. range the control voltage is determined by the one of the two signal tones with the higher frequency and when the other lower frequency tone which under these circumstances is giving an incorrect a.f.c. output signal becomes of comparable value then the a.f.c. system becomes confused and is liable to latch-up in an incorrect tuning iocation. By having a slow rate increase from d.c. and an extended filter with a sharp cut-off at the higher frequency end of the characteristic, then in the case of severe mistuning the a.f.c. circuit can still operate because the lower frequency tone still has a small amplitude compared to the other tone until it has shifted into the vicinity of the on-tune frequency.

Whilst low pass filters having such a characteristic extend the pull-in range of the circuit, they also allow noise to be passed as well. This can be avoided by providing a separate phase detector for detection of the transmitted data which is coupled to the low pass filters by passband filters of narrower bandwidth than said low pass filters, said narrower filters being tailored to give optimum signal to noise ratio.

The present invention further provides a direct conversion receiver comprising quadrature related first and second signal paths including mixers, a tunable local oscillator coupled to said mixers for mixing an input signal down to baseband, low pass filtering means in said first and second signal paths, time delay means coupled to the low pass filtering means in one of said signal paths, a further mixer for mixing the output of the time delay means and the low pass filtering means in the other of said signal paths and providing a low pass filtered output which is proportional to the degree of drift in the local oscillator frequency, a frequency discriminator having an input connected to a low frequency point in one of said first and second signal paths, and signal multiplying means for multiplying together the low pass filtered output of the further mixer and an output of the frequency discriminator to provide an a.f.c. signal for the local oscillator.

The present invention will now be described, by way of example, with reference to the accompanying drawings, wherein, Figure 1 is a block schematic diagram of one embodiment of the present invention, Figures 2A to 2G are diagrams for use in understanding the need for a.f.c. on the local oscillator, Figure 3 is the characteristic of the frequency discriminator used in the circuit shown in Figure 1, Figure 4 is a tuning truth table, Figure 5 shows a modified filter characteristic and three exemplary local oscillator drifting situations, Figures 6A to 6C and 7A to 7C illustrate these three oscillators drifting situations, separately, in the case of Figures 6A to 6C for downward drifts and in the case of Figure 7A to 7C for upward drifts, Figure 8 is a block schematic diagram of another embodiment of the present invention, and Figure 9 is a block schematic diagram of a further embodiment of the present invention.

In the drawings the same reference numerals have been used to indicate corresponding parts.

The direct conversion receiver shown in Figure 1 comprises an antenna 10 connected to quadrature related mixers 12, 14. The input signal, which for example is a digital paging signal, comprises a digital signal frequency modulated on a carrier fc by frequency shift keying, for example a "1" comprises f,-4.5kHz and a "O" is fc + 4.5kHz, see Figure 2A. A local oscillator 16 having an output frequency f, Figure 2B, is coupled to the mixers 12, 14, in the case of the local oscillator signal applied to the mixer 12, this is phase shifted by 90" in a phase shifter 18. If the local oscillator is on-tune then f, = f In the mixers 12, 14 the input signals are mixed down to baseband and the audio frequency output is selected Figure 2C.The selection means comprises d.c. block capacitors 20, 22 and low pass filters 24, 26. As phase difference is the main feature which distinguishes the "1" and "0" audio signals then one method of identifying the binary value of received signals is to phase shift the audio signal in one path by 90" or K/2 in another phase shifter 28 and multiply the phase shifted signal by the audio signal in the other path in a multiplier 30. The output from the multiplier 30 is low pass filtered in a filter 32 and limited in an amplifier 34.

If the local oscillator frequency f, drifts then the audio signals or tones corresponding to "1" and "0" are not the same.

This is illustrated in Figure 2. Figures 2D and 2F illustrate drifts in the local oscillator frequency f, by + 1 kHz and - 1kHz, respectively, giving the low frequency spectra shown in Figures 2E and 2G. Accordingly the phase detector, that is the mixer 30, filter 32 and the amplifier 34, is not as effective in recovering the binary data.

Automatic frequency control for the local oscillator 16 is provided by connecting a frequency discriminator 36 to an audio frequency path of the receiver and multiplying its output (a) with the output (b) from the limiting amplifier 34 in a multiplier 38. The characteristic of an exemplary frequency discriminator 36 is shown in Figure 3. For audio frequencies below 4.5kHz the output is negative (-ve) and for those above the ouput is positive (+ve).

Meanwhile the two path phase detector has a characteristic that for signals below f, it produces a positive (+ve) output and for signals above f, it produces a negative (-ve) output.

The a.f.c. control voltage derived by multiplying (a) and (b) together is always +ve if the mistuning is high and -ve if the mistuning is low. This voltage can then be used to decrease or increase the local oscillator frequency to correct for the drift. The operation of the a.f.c. circuit is summarised in Figure 4.

In the left hand column the mistuning of f, is listed, H for high and L for low, in the next column is listed the transmitted symbol, SYM, the remaining columns have been identified above. Also shown in Figure 4 are the outputs which occur when the local oscillator has drifted high or low by more than the deviation, in the present example 4.5kHz, which is the case denoted by the three headed arrows in Figure 5. It can be seen that because both "1" and "0" tones are now on the same side of the local oscillator frequency, the output (b) is the same for both "1" and "0", while the lower frequency tone, at fx in Figure 5, still gives rise to a -ve output from the discriminator output (a). The overall discriminator output contribution from this tone is thus incorrect.

The output from the multiplier 38 is filtered in low pass filter 40 and amplified as required in the amplifier 42 before being applied as a control voltage to the local oscillator 16. The filter 40 defines the dynamic behaviour of the a.f.c. system and also causes the contributions arising from the transmission of "1" and "0" signals to be averaged.

If the d.c. block capacitors 20, 22 are to be integrated on-chip it is desirable to use a high cut-off frequency, for example 4kHz, in order to minimise the required silicon area. In this situation when the local oscillator is correctly tuned then a POCSAG data signal is demodulated correctly as all frequency components lie within 4.5kHz + 500 Hz, 500 Hz being substantially the bit rate. However if the receiver is mistuned, one of the signalling tones may lie below 4kHz and be reduced or lost. For example, if the local oscillator 16 is mistuned high for example by IkHz and a logical "0" symbol is being transmitted the audio signal will be at 3.5 kHz (Figure 2E) and will be attenuated or lost. In the absence of the signal the a.f.c. circuit will be driven by noise and will give out an average control signal near to zero.Later when a logical "1" symbol is transmitted an audio signal of 5.5kHz will be able to pass the d.c. block capacitors 20, 22 and the receiver will be driven toward correct tuning.

The converse happens when the local oscillator frequency is mistuned low as shown in Figures 2F and 2G.

In another embodiment the timing range is extended by adjusting the characteristic of the d.c. blocking filters 20, 22 so that the signal is attenuated between d.c. and say 4 kHz, the precise frequency being selected to ensure that there is no attenuation when the local oscillator is on-tune, while the low pass filters 24, 26 have a passband extending as high as permissible having regard to the need for adjacent channel rejection and cutting-off sharply, for example as illustrated in Figure 5. The low pass filters may be of the elliptic type to achieve the sharpest transition between the pass band and the stop-band. Such arrangement enables the a.f.c. range to be extended by making most use of the higher frequency audio tone, and by attenuating the misleading influence of the lower frequency tone as will be described with reference to Figures 6A to 6C and 7A to 7C.Figures 6A to 6C show what happens when the local oscillator mistunes low and Figures 7A to 7C show what happens when the local oscillator mistunes high. In each case the horizontal arrow indicates the direction in which the local oscillator frequency should be corrected.

Figures 6A and 7A show the positions of the symbols when a IkHz shift has occurred.

The lower frequency symbol has been attenuated but still has sufficient amplitude to participate in a.f.c. It should be noted that a difference of 9kHz exists between the two symbols at r.f. and in Figures 6A and 7A folding about d.c. occurs, compared with Figure 2.

Figures 6B and 7B show that when a shift equal to the deviation, here 4.5kHz, occurs one of the symbols has been shifted to d.c.

and is blocked by the capacitors 20, 22. In this situation the a.f.c. circuit is reliant on the higher frequency symbol for tuning because during the period when lower frequency tone is being transmitted only the receiver noise is present to drive the a.f.c. circuit is driven by noise.

Figures 6C and 7C illustrate how this low pass filter characteristic can be utilised to provide additional a.f.c. when the local oscillator drifts low by 4.5kHz + fx. The lower frequency symbol frequency is now unfolded from about d.c. and has a frequency fxz The higher frequency symbol has a frequency fX+9kHZ. As explained with reference to Figure 4 it is important that the high frequency tone dominates the a.f.c. system in the case of there being large frequency drifts. Therefore frequency control can be maintained up to the point that the amplitude of both symbols is substantially the same.

This technique for extending the range of the a.f.c. relies on the use of frequency discriminator/phase detector circuitry that produces an output which varies in magnitude with variations in the amplitude of the signal at its input, so that an attenuated signal produces a smaller output signal from the discriminator. This can most easily be achieved by using the delay and multiply discriminator, known per se, or by separately measuring the amplitude of the signal and weighting the discriminator output accordingly as described by J. H. Roberts in "Multiplication by square of envelope as means of Improving Detection Below FM threshold" IEEE Transactions on Communications Technology, June 1971 Vol.

COM-19, pp 349 to 353.

Widening the bandwidth of the low pass filters 24, 26 has the disadvantage that greater amounts of noise are passed which could be detrimental to the demodulation of the signal in the phase detector. To overcome this problem a separate demodulator circuit 44 is provided as shown in Figure 8.

The circuit 44 comprises pass band filters 46, 48 connected respectively to the low pass filters 24, 26. The bandwidth of the filters 46, 48 is narrower than that of the filters 24, 26. Demodulation of the data may then be achieved for example by connecting a 7r/2 (or 90 ) phase shifter 50 to the output of the filter 48 and multiplying the outputs of the filter 46 and the phase shifter 50 in a multiplier 52. The output from the multipier 52 is filtered in low pass filter 54 and applied to a limiting amplifier 56 which provides the required binary output on a terminal 58.

Figure 9 illustrates a variation of the circuit shown in Figure 1 which enables the control range of the a.f.c. circuit to be further extended. In Figure 9 a constant delay circuit 60 has replaced the phase shifter 28 and the limiting amplifier 34 has been omitted from the phase detector. The effect of this is that the input (b) to the multiplier 38 is a signal which is proportional to the extent of the drift of f, from fc, rather than simply + 1 or - 1 according to whether the signal was below or above the current local oscillator frequency. To take the case illustrated in Figure 6C as an example, the (b) input to the multiplier is greater for the tone at (9kHz+f,) than it is for the signal at f,, ensuring that the former makes a greater contribution to the a.f.c. output than the latter. The range of the a.f.c.

system is then limited by the bandwidth of the low pass filters 24, 26 (needed to remove adjacent channel signals) which will eventually attenuate the upper frequency tone.

Claims (19)

1. A direct conversion receiver including a tunable local oscillator for mixing an input signal down to baseband in a pair of quadrature related mixers, wherein the polarity of a signal passed to an a.f.c. system for the local oscillator is determined by the output of phase detecting means coupled to both said signal paths, which output indicates whether the signal originates from above or below the local oscillator frequency.

2. A receiver as claimed in Claim 1, wherein the a.f.c. system comprises a frequency discriminator coupled to one of the signal paths from said mixers, a phase detector coupled to both said signal paths and means for forming a product of outputs from the frequency discriminator and the phase detector.

3. A direct conversion receiver comprising quadrature related first and second signal paths including mixers, a tunable local oscillator coupled to said mixers for mixing an input signal down to baseband, and an a.f.c. circuit comprising phase detecting means coupled to the first and second signal paths to identify whether this signal originates from above or below the local oscillator frequency, a frequency discriminator coupled to a low frequency point in one of the first and second signal paths, and a circuit for reversing the polarity of the frequency discriminator output according to the output of the phase detector being used to provide an a.f.c. signal for the local oscillator.

4. A receiver as claimed in Claim 3, wherein the circuit for reversing the polarity of the frequency discriminator output comprises a multiplier.

5. A receiver as claimed in any one of Claims 1 to 4, wherein narrow bandpass filters are coupled to the outputs of the mixers in the first and second signal paths, the centre frequency of said filters being the on-tune audio frequency.

6. A receiver as claimed in Claim 5, fabricated as a monolithic circuit, wherein d.c.

block capacitors coupled to outputs of said mixers are integrated into the monolithic circuit.

7. A receiver as claimed in any one of Claims 1 to 4, wherein low pass filters are coupled to the outputs of said quadrature related mixers, each of said low pass filters having a characteristic which has a sharp cutoff at as high a frequency as possible having regard to obtaining adequate adjacent channel rejection.

8. A receiver as claimed in Claim 7, in which said low pass filters are of an elliptic type.

9. A receiver as claimed in Claim 7 in which means providing d.c. blocking filtering are provided in the signal paths from the outputs of said quadrature related mixers; said d.c. blocking filtering means having a transfer function which rises at a slow rate from d.c., the rate being such that there is no signal attenuation when the local oscillator is on-tune.

10. A receiver as claimed in Claim 7, 8 or 9, further comprising another phase detector coupled to said low pass filters, said another phase detector including passband filters of narrower bandwidth than said low pass filters to provide a data output.

11. A direct conversion receiver comprising quadrature related first and second signal paths including mixers, a tunable local oscillator coupled to said mixers for mixing an input signal down to baseband, low pass filtering means in said first and second signal paths, time delay means coupled to the low pass filtering means in one of said signal paths, a further mixer for mixing the output of the time delay means and the low pass filtering means in the other of said signal paths and providing a low pass filtered output which is proportional to the degree of drift in the local oscillator frequency, a frequency discriminator having an input connected to a low frequency point in one of said first and second signal paths, and signal multiplying means for multiplying together the low pass filtered output of the further mixer and an output of the frequency discriminator to provide an a.f.c.signal for the local oscillator.

12. A receiver as claimed in Claim 2, 3 or 11, wherein the frequency discriminator is of a type in which the magnitude of its output varies according to the amplitude of the signal at its input.

13. A receiver as claimed in Claim 12, wherein the output of the frequency discriminator is proportional to the frequency and the square of the amplitude of the signal at its input.

14. A receiver as claimed in Claim 2, 3 or 11, wherein the frequency discriminator is of the phase shift and multiply type.

15. A receiver as claimed in Claim 1, 2 or 3, wherein the phase detecting means is of a type whose output signal magnitude increases as the difference between the signal and the local oscillator increases, said output being used to increase the weight given to the current output of the frequency discriminator, which output is passed to the a.f.c. circuit.

16. A receiver as claimed in Claim 15, wherein the phase detecting means has a characteristic such that its output is proportional to the frequency difference between the input signal and the local oscillator frequencies.

17. A receiver as claimed in Claim 16, wherein the phase detecting means has a characteristic such that its output increases in magnitude as the amplitude of the signal at its input increases.

18. A receiver as claimed in Claim 15, 16 or 17, wherein the phase detecting means is of the phase shift and multiply type.

19. A direct conversion receiver constructed and arranged to operate substantially as hereinbefore described with reference to and as shown in the accompanying drawings.