GB2177521A - Programmable logic controller system for hazardous environment - Google Patents

Abstract

A programmable logic controller system for use in a hazardous environment has a microprocessor-based logic controller (10) and also a unit (30) incorporating a microprocessor and an alterable memory such as a RAM. This unit (30) can be coupled directly or indirectly to the controller (10) for testing and modification of a program. After testing the program is transferred to a non-volatile memory (43) outside the hazardous environment. This non-volatile memory (43) is then taken into the hazardous environment and fitted to the controller (10) for routine operation. This allows a program to be tested on the controller (10) before it is committed to the non-volatile memory (43). Preferably modification of the program is possible while working in the hazardous environment. Communication between the unit (30), any intermediate item of equipment and the controller (10) is preferably through opto-isolators to preserve electrical isolation. Serial data transmission is preferred. <IMAGE>

Description

SPECIFICATION Programmable logic controller system for hazardous environment This invention relates two programmable logic controllers, suitable for, for example, control of industrial plant. By now, general purpose programmable controllers are well known. The present invention, however, provides a programmable controller system suitable for use in a hazardous environment, e.g.

where there is risk of explosion.

The present invention provides a system of connectable units comprising (i) afirst unit which is a controller suitable for use in a hazardous environment, incorporating a microprocessorto be governed by a stored program and able to be fitted with a non-voltaile memory containing such program (ii) a second unit incorporating a memory of an alterabletype permitting selective change of data held at individual memory addresses without erasing the entire contents of the memory.

The controller and this second unit are constructed and arranged to be connectable together while at least the controller is in the hazardous environment.

The controller can then be governed by a program which (at least initially) is stored in the alterable memory of the said second unit. Subsequently the program is transferred to non-volatile memory which is fitted to the controller.

The program stored in the alterable memory ofthe said second unit may be copied into volatile memory ofthe controller before being run by the controller's microprocessor. The controller may be arranged to be fitted with either a non-volatile memory or a volatile memory into which a program can be copied from the second unit.

Preferably the controller and/or the said second unit provide a keyboard usable in the hazardous en vi ronment to modify the program in the alterable memory ofthe said second unit.

The second unit is preferably a portableunitsuit- able for use in a hazardous environment. Preferably the second unit incorporates a microprocessor, whether it is portable or not.

Connection of a portable second unit to the control- ler may be a direct connection ofthe portable unit to the controller, through electrical connectors and/or cable, while both the controller and the portable unit are in the hazardous environment.

Another possibility is connection through an intermediate piece of equipment also located in the hazardous environment. In this case the intermediate equipment may be a unit serving to monitoroperation of the controller and/or monitor a plant which the controller is operating. Such a monitoring unit may be at a distance from the controller itself.

Yet another possibility is to utilise connection extending into the hazardous environmentfrom outside that hazardous environment. This possibility will gen- erally be preferred if the second unit is not portable.

The term "alterable memory" includes volatile memory, and it is preferably RAM with a back-up power supply to prevent loss of the memory contents.

When a program in the alterabie memory is satisfactory, it can be transferred to a non-volatile memory and the non-volatile memory thereafter fitted to the controller, for the controller to be governed by the program. Transferto non-volatile memory will generally take place outside the hazardous environment.

The non-volatile memory will generally be a semiconductor memory able to retain the contents of the memory without any electrical power supply. The memory may well be atype such as an EPROM which cannot be erased except by erasing the entire contents of the memory.

An example of an alternativeto an EPROM is an EAROM, where an individual memory address can be changed, although at a slower speed than that for reading a memory address or writing to RAM.

Generally, the controllerwill not be able to alterthe contents ofthe non-volatile memory.

The system will preferably include means to trans- fer a program from the portable unitto a non-volatile memory outside the hazardous environment. Such means will preferably be or include, an EPROM prog- rammer, (sometimes known as an EPROM burner).

Preferably the portable unit is directly connectable to the EPROM programmerfortransferring the program to an EPROM. Such an EPROM programmer can also be used for making further copies ofthe program in EPROM's which are held as spares. It may perform otherfunctions, such as providing an output to a printer, for making a hard copy of a program listing, and copying such programs through industry standard ports to other peripherals or host computers.

Preferably the portable unit has a battery power supply, and the controller and portable unit when connected are connected through one or more opto isolators,soasto remain electrically isolated.

Another preferred feature is that a portable second unit is a self contained unit which incorporates a keyboard, a display and microprocessor, enabling loading or alteration of the memory, both with and without the portable unit being connected to the controller.

In a preferred arrangement the controller and the second unit are arranged and operated such that (as briefly referred to above) a program can be transfer- red from the memory of the second unit to RAM within the controller. After this the microprocessor of the controller is operated under the control of the transferred program.

Preferably transfer ofthe program from the second unit to the controller is at a speed which is slower (and entails lower frequencies) than direct access to memory by the controller's microprocessor running at its normal clock speed (i.e. during direct communication between the microprocessor and memory containing a program which the microprocessor is executing).

The transmitted pulses may well be longerthan would be involved in direct access at normal clock speed.

Thus this siowed-down transfer may consist of transmission ata pulse frequency which is less than the clock frequencies of the microprocessors in the controller and second unit. The transmission may be accomplished with handshaking between the two un its. but need not be. It may be serial transmission.

Slowing down the speed of transfer can enable a wider choice of opto-isolator, extending the choice to opto-isolators giving a greater physical spacing between the conductors of the electrical circuits which are thereby isolated.

Embodiments ofthe invention will now be described, to explain the invention further, and byway of example. Description is with reference to the accompanying diagrammatic drawings in which Figure 1 shows the various parts of a system, and Figures2 and 3show parts of circuitry of a slightly different system.

Referring first to Figure 1 ofthe drawings, a programmable logic controller 10 is installed in a hazardous environment (which may be a coal mine).

The controller is equipped with multiple input and output connections, (e.g. 12,14) arranged to accept armoured cable in accordance with requirements for a hazardous area.

The controller has a considerable number of input/ output (I/O) channels, and is provided with interchangeable circuit boards which interfacethese channels to the input and output connections. These boards are of three types. One type interfaces sixteen inputs to I/O channels. The other two types each interface the controller to output channel transducer connections, one type provides DC drive on sixteen outputs, under command of the controller's microprocessor, whereas the other type provides DC drive on eight outputs again under command ofthe controller's microprocessor, butwith output load status monitoring.

The controller is powered by a power supply unit 16a of a type suitable for use in a hazardous area. This unit also provides power to any ofthe above mentioned circuit boards which are interfacing transducer inputs. The output boards, however, each require one ortwo additional power supply units. Each sixteen channel board has two circuits serving eightchannels, whereas each eight channel board has two circuits of four. These circuits are electrically isolated from each other, and from the remainder of the controller, and each is designed to accept a separate power supply unit 1 6b. This use of multiple power supply units, and electrical isolation enables hazardousarea requirementsto be met. Signals to these electrically isolated output drive circuits aretransmit- ted through opto-isolators.

Within the controllerthere is a microprocessor (CPU), a permanently-fitted non-volatile memory containing its operating system and a permanentlyfitted RAM intended for use as a "scratchpad" while a program is running, e.g. to hold variables, and a stack. Additionally the controller includes a connector 20 for a detachable circuit board 22.

Two types of circuit board are provided, for use alternatively. One board 22a carries RAM 23. The alternative board 22b carries at least one non-volatile memorywhich may be an EPROM 43. Whichever board is fitted, the memory occupies the same space in the memory map ofthe controller's microprocessor. Preferably boards 22a and 22b are identical or as similar as possible.

A portable second unit 30 has a keyboard 32 and an LCD display 34, and internally a microprocessor (CPU), a non-volatile memory containing its monitor program, and RAM 35. The unit is powered by NiCd rechargeable batteries 36 which may be recharged from a separate charger37. The unit isthus selfcontained. The user of the system can load a control program intended to be run by the controller 10. The user can load this control program into RAM 35 ofthe portable unit using its keypad 32. The user can then check it by means of the display 34, under commands entered via the keypad 32. The portable unit 30 also has one or more ports 38 enabling connection to a number of peripheral devices including an EPROM programmer42,whichcan blowa program into an EPROM forfitting into a board 22b.

The peripheral devices such as EPROM programmer 42 and battery charger 37 never enterthe hazardous area.

The portable unit 30 does enter thins area, and can be connected via'a port 39 to the controller 10. The two units are constructed such that when so connected, connection is via opto-isolators which serve to isolate the units electrically, while permitting data transmission. The opto-isolators may be accommodated either in the controller, or in the portable unit, as may be preferred.

The opto-isolator chosen is such that it gives a physical separation between the circuits which is ade quate to meet regulations for hazardous areas.

When the units 10,30 are connected in the hazardous area the key pad 32 can be used to enter a command which will cause a program, held in the portable unit's RAM 35 to be copied (downloaded) into the RAM 23 in the controller's board 22a. The program can then be run bythe controller's micropprocessor.

Use is as follows: An intended program is loaded into the RAM 35 via the key pad or other peripheral device such as the EPROM programmer. The portable unit 30 is then carried into the hazardous area, where the controller 10 is already installed, and fitted with a RAM board 22a. The program is copied into the RAM 23 on this board 22a. The intended program is then tried out, i.e.

run by the controller, although at this stage, the operating system ofthe controller may also perm it direct commands through the keyboard of the portable unit.

During this testing the program in the RAM 35 may be amended, in situ, as necessary and the amended program copied into RAM 23 for checking. When the program has reached a final version,the unit30 is carried out of the hazardous area to the EPROM prog rammer 42. The program is copied into an EPROM 43.

This is fitted into a board 22which is then carried into the hazardous area and exchanged forthe board 22a. This leaves the controller programmed with the final version ofthe users program, held in the EPROM on the board 22b.

It will be appreciated that providing for alteration of the program in situ in the hazardous area enhances the ease of use of the system. So also does the selfcontained nature ofthe portable unit 30.

The controller 10 and the portable unit 30 are constructed, and their operating system programs are such that neither microprocessor has direct access to the memory in the other unit. Primarfacie, direct memory access across the the interface between the two units would be an appropriate technique. However, we have found it preferable to avoid this, and instead construct the units for a program in the RAM 35 to be copied into the controller's memory, by serial data transmission. The slower transmission rate allows use of a slower opto-isolator giving greater physical separation ofthe circuits.

The ram 35 is preferably a CMOS type, because of the low power requirements of such a RAM. CMOS RAM is preferably used elsewhere in the system, as well. Indeed it is preferred that all chips, including the microprocessors, are CMOS types, forthe sake of low power consumption.

The portable unit 30 is illustrated as having two separate ports 38, and a separate port 39. Possibly there could be fewer ports, possibly only one used for all three functions.

The portable unit 30 may have a RAM chip separate from the RAM 35, and used to hold e.g. variables and a stack. Alternatively addresses within the RAM 35 may serve this purpose.

Preferably the interchangeable circuit boards 22a, 22b, may contain few or no components except four the RAM and non-volatile memory which are interchanged. However, it may be convenient for them to carry additional components, which are duplicated on both boards, to reduce the total number of boards needed in the controller. Thus, these boards might carry ROM containing the operating system program ofthe controller, address decoding logic, and/or the microprocessor chip.

At the development stage, the program held in the RAM 35 could conceivably contain provision for sing- le stepping, stopping at defined break points, or other diagnosticfunctionswhich are then eliminated immediately before copying into the EPROM. The board 22a could conceivably carry hardwareforsinglestepping which is not required on, and omitted from, the board 22b.

The system illustrated by Figures 2 and 3 is the same as that already described, except that inter changeable circuit boards 22a, 22b are not used. Instead, either a RAM 23 or a non-volatile memory, such as an EPROM 43 can be fitted into a zeroinsertion force socket of the controller.

Figure 2 shows part ofthe circuitry of the controller.

Other parts of the circuitry (e.g. generation of clock pulses, connection to memory mapped inputs and outputs) can be conventional, microprocessor of micro-controller architectures For example, as shown in Figure 2, the controller 10 incorporates a microprocessor 50 connected to a data bus D and an address bus A. Individual lines in these buses are not shown separately, except fo r th e th ree most significant address lines 51,52, and 53. The data bus and address bus are connected to a ROM 54 containing the operating system (monitor program) for the microprocessor, a RAM 55 which serves as a "scratch pad" RAM holding for example variables and a stack, and a zero insertion force socket 56 which can receive either a RAM chip 23 or a non-volatile memory such as an EPROM chip 43, as represented diagrammatica Ily.The two most significant address lines 52,53 go to a 2 to 4 decoding chip 58. This is connected to chip select pins of the ROM 54 and the RAM 55, and to that connection ofthe socket 50 which receives the chip select pin of a RAM 23 or nonvolatile memory 43.

This decoding arrangement locates the ROM 54, the memory chip in the socket 56 and the scratch pad RAM 55 in three successive quarters ofthe microprocessor's memory map. The fourth quarter is used for memory mapped input/output.

A RD (read) control line from the microprocessor is connected to theOE (output enable) pin of the RAM chip 55 and to that connection ofthe socket 56 which receives the output enable pin of a RAM 23 or EPROM 43.

In orderthatthe socket can receive either a RAM chip 23 or an EPROM chip 43 the circuitry should be designed to use chips of types where RAM and EPROM have many functions carried by the same pins. It is common for commercially available EPROM and RAM chips of equal memory size to havemostof theirfunctions (e.g. data lines, address lines and chip select) to be carried on corresponding pins.

For pinswherefunctions are different as between RAM and EPROM,the relevant connections ofthe socket 56 are wired through ganged selector switches 60.

In the example shown, one pin 61 is connected to WR (write) control line ofthe microprocessor when the switches are in the lower position, and to an address line 51 when the switches are in the upper position. This is appropriate for RAM and EPROM respectively.

Correspondingly another pin 62 is connected to address line 51 orto the supply voltage Vcc.

Although not shown, the principle of wiring a few pins of socket 56 via selector switches can also be used to allow the socket to accept more than one size of memory, e.g. 8K by 8 bits or 32K by 8 bits, both of which are available in 28 pin DIL packages with many pins having the same function in each case.

Examples of suitable commercially available memory chips are 27C64 and 27C256 EPROM's and 6264 and 65256 RAM's.

RAM 55 has a rechargeable back-up power supply (not shown) to preserve its contents in the eventofa powerfailure. It is automatically recharged through a diode by the main supply. In order to preservethe very limited back up supply, the RAM 55 must not be selected while the main supply has failed. This is ensured by a tristate buffer 64 inserted between the decoder 58 and the chip select pin of RAM 55. The enable pin of the buffer is connected to the main supply voltage Eco while the buffer is powered from the back up supply. If the main supply fails the buffer is disabled. Its output becomes high impedance and is pulled up the back up supplyvoltage Vsuthrough the resistor 65 Figure 3 of the drawings shows the circuitry employed in the portable unit. Like the controller, the portable unit 30 has a microprocessor 70 connected by data lines D and address lines A,71,72 and 73to a ROM 74 containing an operating system. Onlythe three most significant address lines are shown separately, and are numbered 71,72,73 in Figure 3. The data and address lines also connect to a RAM 76. Part ofthis RAM serves as a "scratchpad". Part of it is used to hold a program put in by the user. A2to 4 line decoder78 is connected to chip select pins, and thus locates ROM 72 and RAM 74 in two successive quarters of the memory map of microprocessor 70.

The portable unit has a keypad 32 and a display 34 which are not shown in Figure 3. They are connected to an input/output port ofthe microprocessor 70.However, if a microprocessor was employed which did not have such an integral input/output port, the keypad and display could be connected to it through a conventional peripheral interface adapter.

Figures 2 and 3 also show the method of connection between the portable unit and the controller.

The microprocessors 50,70 each have pins for serial data input and output (with other microprocessors serial data input and output could be provided through a separate UART connected to the microprocessor).

The portable unit includes a pair of opto-isolators 80,82, serial data output 84 of microprocessor 70 is connected to the diode of isolator 80. The transistor of isolator 82 is connected to the serial input 86.

The diode of isolator 82, and the transistor of isolator 80 are connected to four pins of a socket 88 connectable buy a shortflexiblejumpercabletofourpins of a socket 90 of the controller 10. This socket 90 is connected to the power supply of the controller and to the serial data input and output pins of microp rocessor 50, so that when the sockets 88,90 are con- nected byjumper cable, the serial output 94 of mic- roprocessor 50 is connected to the serial input 86 of microprocessor 70 through the isolator 80, while the serial output 84 is connected through isolator82to the input 96 of microprocessor 50.

This arrangement allows serial data transmission and handshaking between the two microprocessors without any direct electrical connection between the portable unit30 and the controller 10.

Connections to and from the inputs and outputs 84, 86,94,96 are through amplifying buffers 98. The pins of socket 88 and the corresponding pins of socket 90 are shown numbered 1,2,4and5.

Serial data transmission may proceed at a rate of 500 bits per second or less whereas the microprocessors' clockfrequencies may be 1MHz or more. Consequently each pulse on the serial link may lastfor hundreds of clock cycles.

The microprocessor 50 has one pin 100 of an input' output port connected to a switch 102 which can be operated to connectthe pin 100 to the supply voltage Vorto ground.

This switch issetto putthecontroller 10 in a"free running mode" or in a "de-bug mode". At power upthe operating system begins with initialisation, then tests pin 100 and branches accordingly. If the switch 102 is setfor"free running mode", the microprocessorex- ecutes any program in the memory fitted in socket 56.

If the switch 102 is setfor"debug mode" the operating systemwaitsfora command transmitted overthe serial linkfrom the portable unit 30.

Useofthesystem of Figures2and 3 isverysimilar to use ofthe system of Figure 1.

After a program has been loadedthroughthe keypad ofthe portable unit,this unit is connected to controller 10. At this stage a RAM chip 23 should be present in the socket 56 of the controller. The switch 102 should be setfor"debug mode". The program is copied from RAM 76 into the RAM 23 in socket 54.

Routines to accomplish this are provided in the operating systems of the two microprocessors 50,70.

Commands to bring aboutthe copying are entered through the keypad of the portable unit and transmitted overthe serial data link between the portable unit andthecontroller. Nextthe intended program can be evaluated. If necessary the program in the portable unit's RAM 76 is altered and the altered version copied into RAM 23 and tested. This may be done repeatedly. During testing in "debug mode" commands may be entered through the keypad of the portable unit and transmitted over the serial linkto the controller. For example, it is possible to give a command to proceed by single steps ofthe program, orto start at a specific point in the program. Routines to implement such commands are inciuded in the operating system of microprocessor 50.

When the program is satisfactory the portable unit is disconnected and carried to an EPROM programmer42, which is used to copy the program into an EPROM 43. Connection to the EPROM programmer 42 may be accomplished by connection of the programmerto socket 88, for serial data transmission to the EPROM programmer.

The blown (burnt) EPROM 43 is carried to the controller 10, and fitted into the socket 56 in place of the RAM 23. The EPROM 43 and the RAM 23 occupy the same space in the memory map of microprocessor 50.

Since part of RAM 76 was used as a "scratchpad"the program loaded by the user cannot fill this RAM, nor can itfill RAM 23 orEPROM 43 unless the RAM 76 is largerthan these. In practice this is not a serious limitation.

The apparatus described above enables a user to try out an intended control program on the controller, in the hazardous environment, before the program is put into the non-volatile memory from which the controller reads the program during routine use. The above apparatus makes it possible to test the program before it is put into the non-volatile memory.

Furthermore, the program can be modified andre- tested by a user working in the hazardous environment before the program is put into the non-volatile memory.

Claims (15)

1. A system of connectable units comprising (i) a first unitwhich is a controller suitable for use in a hazardous environment, incorporating a microprocessorto be governed by a stored program and able to befitted with a non-volatile memory containing such program (ii) a second unit incorporating a memory of alterable type permitting selective change of data held at individual memory addresses without erasing data at other addresses the controller and said second unit being constructed and arranged to be connectabletogether while at least the controller is in the hazardous en vironment,forthe controllerthen to be governed bya program stored in the alterable memory ofthe said second unit.

2. Asystemaccordingtoclaim 1 furthercomprising meansfortransferring a program from the alterable memory of the said second unit to a non-volatile memory.

3. Asystem according to claim 2whereinsaid means is an EPROM programmer.

4. A system according to any one ofthe preceding claims wherein connection between the controller and the said second unit permits communication while the controller and said second unit remain electrically isolated from each other.

5. A system according to any one of the preceding claimsfurthercomprising an additional item of equipmentsuitablefor use in a hazardous environment, and connection between the controller and said second unit passes through said additional item of equipment.

6. Asystem according to any one of the preceding claims wherein at least one of said controller and said second unit has a keyboard usable in the hazardous environment to modify the program.

7. Asystem according to any one of the preceding claims wherein the second unit incorporates a microprocessor.

8. A system according to any one of the preceding claims wherein said second unit is a portable unit suitable for use in a hazardous environment.

9. A system according to claim 8wherein the portable unit is a self-contained unit which incorporates a keyboard, a display and a microprocessor, enabling loading or alteration of the said memory ofthe portable unit both with and withoutthe portable unit being connected to the controller.

10. Asystem according to claim 8orclaim 9 wherein the portable unit has a battery power supply, and connections between the controller and the portable unit is through one or more opto-isolators, so that the controller and portable unit remain electrically isolated.

11. A system according to any one ofthe preced- ing claims arranged for the program stored in the alterable memory ofthe said second unit to betransferred into RAM of the controllerwhiie at leastthe controller is located in the hazardous environment, for the controllerthen to be governed by the said program transferred into the controller's said RAM, the controller being arranged to be governed alternatively by a program in said RAM or by a program transferred into a said non-volatile memory before said memory is fitted into the controller.

12. A system according to claim 11 arranged for transfer of the program into said RAM over a connection between the controller and said second unit through one or more opto-isolators, at a speed which entails lower frequencies than during direct communication between the microprocessor and memory containing a program which the microprocessor is executing.

13. Asystem according to claim 11 or claim 12 wherein the controller is arranged to be fitted alternativelywith said RAM or said non-volatile memory.

14. Asystem according to anyoneofthepreceding claims wherein communication between said second unit and the controller, when connected together, is by serial data transmission.

15. Asystem of connectable units, substantially as herein described with reference to the accompany- ing drawings.