GB2157507A - Testing apparatus for printed circuit boards - Google Patents

Abstract

In apparatus for testing bare printed circuit boards, test probes 5 are mounted in carrier blocks 12, each block 12 simulating an actual component, such as a dual-in-line package, Fig. 5, a transistor, Fig. 6 (not shown), or other discrete component, to be mounted subsequently of a printed circuit board under test. Each block is separately cabled 15 to an interface plug 16. The required blocks corresponding to the components to be mounted on the board under test are assembled into a frame and plugged into appropriate zones of an interface board 17 connected to a computerised tester. Boards can thus be tested under simulated circuit conditions. <IMAGE>

Description

SPECIFICATION Testing apparatus for printed circuit boards This invention relates to apparatus for testing bare printed circuit boards, i.e. before they have electrical/electronic components mounted thereon.

Bare board electrical testing of complex printed circuit boards, especially multilayer boards, has been practiced for many years. The testing is usually limited to a simple check for continuity and unwanted short circuits.

One of the problems of bare (unpackaged) board testing is in making electrical contact with the board.

This is usually done on a "bed of nails" head of sprung probes, against which the board is held by hydraulic or pneumatic pressure. Typically, the individual probes may be as shown in Figure 1, with a metal body (1), a spring loaded head (2) and a clipon or insertable connecting wire (3). Body shapes may vary, but will usually include some change in diameter to transfer pressure from the carrier plate to the probe. The shape of the head can also vary, with domes, points or dimpled heads being commonly used.

The probe heads may contain several thousand probes, and are expensive to assemble.

Generally, there are four known, used ways of making a head to contact the boards to be tested, which may have pads in any positions.

(i) A regular matrix of probes, all on a grid, usually of 0.1" pitch, as shown in Figure 2. The probes (5) are carried in an insulating body or carrier (4), which is equipped with locating pins (6) which engage in tooling holes in the board under test. To use this, all boards have to be designed with all holes on the grid, or with special extended pads which coverthe nearest grid point to an off grid hole. A thin plastic masking sheet is drilled with holes which allow "wanted" probes through to contact the board, and hold back "unwanted" probes-i.e., any which might cause short circuits between "off grid" tracks etc.

(ii) A regular grid of probes as in (i) above, but instead of a mask a "translation board" as shown in Figure 3 is used. This is a thin, slightly flexible PCB (7) which has on one face "on grid" pads (8) to match the probe array, and on the other face pads (9) on or off grid as necessary to match the hole pattern of the board under test. The two sets of pads are interconnected by small diameter plated through holes (10).

(iii) A regular grid of probes similar to (i) above, but with longer, slightly flexible probes which can be passed through a special composite mask which holds back "unwanted" probes and allows others through, moving the ends of any which must contact "off-grid" pads on the board to an appropriate off-grid position.

(iv) A unique head as shown in Figure 4, specially made, with plastic plates (11) drilled with holes in the same positions as the holes on the board to be tested. Individual probes (5) are inserted in these holes, and each probe is wired back to a head/tester interface plug. Heads can be dismantled, and probes and plugs re-used, but assembly and dismantling times are very long, and such unique heads are cost effective only when large numbers of boards are to be tested. Alternatively the probes are carried in an unloaded board of the type desired to be tested, as disclosed in British patent specification 1,542,235.

Accordingto the present invention there is provided apparatus for testing printed circuit boards including a test head comprising a plurality of test probes mounted in carrier blocks such that each carrier block simulates a component to be mounted on the printed circuit board under test, all the probes of each block making simultaneous contact with mounting pads or holes for the component simulated by the block, the test head carrying such component simulating blocks demountably mounted in a support means whereby all probes of all blocks can be brought into simultaneous intimate contact with the printed circuit board under test.

Embodiments of the invention will now be described with reference to Figs. 57 of the accompanying drawings, wherein:- Fig. 5 illustrates a probe carrier block simulating a dual-in-line package (DIP); Fig. 6 illustrates a probe carrier block simulating a transistor, and Fig. 7 illustrates a zoned interface for connecting the probe carrier blocks to the signal generating and evaluating means.

The sprung contact probes are made up into blocks with injection moulded or potted plastic bodies, which simulate standard DIPs, flat packs, or chip carriers. Figure 5 shows a simulator for a DIP.

Similar smaller blocks simulate standard transistor bodies, Figure 6, and small pitch resistors or capacitors. Large pitch, two-leaded components can be accommodated by free pairs of single probes.

Edge connector fingers or holes for plug and socket connectors can have specially made blocks to match the range of sizes used, or they can be contacted in units of perhaps 10 or 20 contacts each, built up to the appropriate length.

The backs of the plastic bodies (12) are made with either a single pillar (13), or a set of pillars, preferably with their ends reduced in diameter (14), which fit into a main back plate of a support head (not shown) and which leave spaces through which the cables of fine wires (15) to the simulated components are routed. The pillars can either be a snap fit into the back plate for the head, or they can be retained with screws whose heads sit in counterbores in the back plate.

The individual blocks are best assembled in a frame, with any spacing bars and packing necessary, in a manner similar to that in which a printer traditionally assembled a page of metallic blocks of print.

The interface between the tester and the probe head will need to be considerably bigger than that required for an individual probe head to test boards of comparable size. Figure 7 shows one form for such an interface, in which the plugs (16) on the cables (15) from the simulated components are plugged in the correct order to correspond to the circuit diagram for the board. The sockets plug into rows of holes (18) in the panel, which is divided into zones by painted or other lines (19). The zones include at least provision for connectors, integrated circuits, transistors, resistors, capacitors, and miscellaneous components. Each zone must contain provision for more pins that are likely to be used on the boards to be tested, with a reasonable allowance for future developments. The zone for integrated circuits will be the largest, and may present problems in the allocation of pins.For general use, a suitable arrangement might be provision for 300 connectors of 16 pins each, 150 of 24 pins, and possibly 50 of 40 pins, 50 of 64 pins and 50 of 100 pins. The actual probe head bodies are made up with the appropriate numbers of pins for the devices to be simulated, but plug into the next suitable larger socket. Thus the 16 pin sockets are used for 16, 14, 12, 10 and 8 pin devices, usually leaving a significant number of unused pins. Back wiring panels with large number of sockets can be connected by using the largest integrated circuit sockets. Connectors or integrated circuits with more pins that the largest interface socket available will have to have their simulating bodies made up with connectors to two interface plugs.

All interface plugs apart from those for twoleaded devices must be handed, Figures 5 and 6, so they can be inserted only one way and the pin 1 connection to each device will always be correctiy made.

Plugs are inserted in an interface frame as the head is made up following the board legend or an assembly drawing. Thus the tester is able to identify all component and pin numbers as called up on the circuit diagram or on a net list. Via holes are not contacted by the tester, are tested only as a portion of a pin to pin interconnection.

The computer controlled tester (not shown) is programmed directly with a net list or interconnection schedule prepared from the circuit diagram, and it should also be programmed with the highest number of the components of each type used and with the numbers of any unused pins on integrated circuit or connector sockets so that only the used pins will be tested.

This type of head, with the probes mounted in large units, is more suitable than a unique probe head for testing boards for surface mounting chip carriers or T.A.B. devices where the very close pitch of the contacts can make the use of individual probes ora translation board very difficult.

Probes for testing surface mounting device pads can be of the normal sprung pin type, but on fine pitches a leaf spring which wipes onto the contact face may be more appropriate.

Component simulating heads are significantly cheaper to assemble and to dismantle than individual probe heads. Integrated circuit packages usually have 14 pins; m.s.i. packs 16 or 24; I.s.i.

packs 24 or 40, and v.l.s.i. packs can have numbers of pins up to 100 or more. Therefore assembly of a test head component by component instead of pin by pin will take one fourteenth (sixteenth, twentyfourth, fortieth etc.) of the time, depending on the mix of packages used. However, a considerable investment in the probe units is necessary, and the tester requires a larger range and more sophisticated programme capability than a randomly connected individual probe machine. If the board test facility has no access to computer aided design information, boards can be tested comparatively (i.e. by testing a "known good board" and storing the pattern found).

Boards for surface mounted devices which carry devices on both sides may have connections which start at a point on one surface only, and run through buried via holes or pillars and internal layer tracks to a point on the other side. Such boards have to be tested between a pair of sprung probe heads.

Claims (13)

1. Apparatus for testing printed circuit boards including a test head comprising a plurality of test probes mounted in carrier blocks such that each carrier block simulates a component to be mounted on the printed circuit board under test, all the probes of each block making simultaneous contact with mounting pads or holes for the component simulated by the block, the test head carrying such component simulating blocks demountably mounted in a support means whereby all probes of all blocks can be brought into simultaneous intimate contact with the printed circuit board under test.

2. Apparatus according to claim 1 including means for generating signals to be applied to and evaluating signals received from the printed circuit board undertest, and connecting means for interconnecting the probes with the signal generating and evaluating means such that the individual probes can be uniquely identified as corresponding to particular component pins as shown on the circuit or logic diagram of the printed circuit board under test.

3. Apparatus according to claim 1 or 2 characterised in that the probes comprise axially sprung electrical contact pins.

4. Apparatus according to claim 1 or 2 characterised in that at least some of the probes comprise electrical contacts carried on leaf springs.

5. Apparatus according to any preceding claim characterised in that the carrier block or blocks are moulded or potted non-conductive plastics bodies in which the probes are mounted.

6. Apparatus according to claim 5 when dependent on claim 2 characterised in that the moulded blocks each have on the rear face thereof shaped portion(s) adapted to secure the block(s) in a main back plate of the support means to leave spaces between the back plate and the main bodies of the blocks to accommodate electrical cables connecting the probes with the connecting means.

7. Apparatus according to claim 6 characterised in that the carrier blocks are assembled within and secured by a frame attached to the main back plate.

8. Apparatus according to any preceding claim characterised in that the probe carrier blocks are each provided with lateral interlock means adapted to cooperate with the interlock means of adjacent blocks when a number of blocks are assembled together.

9. Apparatus according to any preceding claim characterised in that the connecting means for interconnecting the probe carrier blocks with the signal generating and evaluating means comprises an interface socket board into which individual carrier blocks can be plugged, said interface board being divided into zones each zone having sockets for a number of like carrier blocks, the interface board being connected to a programmable tester wherein the test signals to be applied to the printed circuit board are generated and signals received from the board are evaluated.

10. Apparatus according to claim 9 characterised in that the programmable tester can be programmed such that it can apply via the probes test signals to the printed circuit board under test corresponding to the electrical signals for which the board is designed, whereby the board is tested under simulated circuit conditions.

11. Apparatus according to any preceding claim characterised in that two sets of probe carrier blocks are provided for simultaneously testing both sides of a double sided printed circuit board.

12. Apparatus for testing printed circuit boards substantially as hereinbefore described with reference to Figs. 57 of the accompanying drawings.

13. A method of testing printed circuit boards wherein test probes are assembled in probe carrier blocks simulating the components to be mounted on the board, the probe carrying blocks then being applied in contact with the printed circuit board under test and electrical signals applied to the board in the probes to test the board under simulated circuit conditions.