GB2153147A - Threshold switch - Google Patents

Abstract

The invention is a method of operating a semiconductor device having a layer of p-type amorphous or microcrystalline semiconductor in contact with an amorphous or microcrystalline semiconductor material of different conductivity type, and whose electrical properties have been modified by the application of a modifying voltage. The device exhibits threshold switching between lower and higher conductance states provided it is not switched to the maximum conductance or fully-on state. Switching between lower intermediate and higher intermediate states is envisaged. <IMAGE>

Description

SPECIFICATION Treshold switch This invention relates to threshold switching.

Two types of switching are possible with semiconductor devices which can switch states of different conductivity. The device may start in one conductance state, switch to a second conductance state when the voltage applied to it exceeds a given threshold voltage and revert to the first conductance state when the voltage falls below the threshold value.

Such behaviour is known as threshold switching.

In an alternative form of switching the device starts with a given conductance state and as the voltage applied to it is changed, switches to a second conductance state, which it retains when the voltage falls below the value which caused the initial change in conductance. The device is said to have "memory" of the second conductance state, even through the conditions initially responsible for it are no longer present, and the switch is described as a memory switch.

Integrated circuits described as "memories" are used in computers and similar apparatus.

Such memories may be constructed from individual devices having either threshold or memory switching.

There have recently been disclosures of amorphous semiconductor devices showing memory switching based in layers of amorphous semiconductor of differing conductivity type.

IEE Proc., Vol 129, Pt I, Solid State and Electron Devices, No 2, April, 1982, pages 51-54 discloses an electrically programmable non-volatile semiconductor memory device. In its simplest form this contained p and n layers of amorphous silicon deposited onto a conducting stainless steel substrate. The layered structure was conditioned into a memory device by applying a large forward bias which switches the structure into a stable ON state.

This step is known as "forming" and permanently modifies the electrical properties of the device. The forming voltage is approximately 20 to 25 volts. After forming the device was then switched to the alternative OFF state by applying a voltage pulse above a low threshold such as IV with opposite polarity to the original pulse. The OFF state was stable for reverse voltage up to breahdown and forward voltages of of approximately 4-5V. At higher forward voltages it switches to the ON state, i.e. the forward threshold voltage VThF was about 4-5V. The ON state was stable for forward voltages up to breakdown and reverse voltage of about 1 volt. At reverse voltages of greater magnitude it switches to the OFF state i.e. the reverse threshold voltage VThR was IV.

The paper mentions that switching to a high conductivity state can take place through an intermediate state, but no further information is given on the behaviour of this intermediate state.

European patent application No 0095283 discloses a memory device comprising an electrically conducting substrate and layers of and p and/or n type amorphous or microcrystalline semi-conducting material which have been conditioned by the application of a voltage sufficiently large to cause the structure to be permanently modified to reduce the electrical resistance of the layers wherein no p and n layers are adjacent in the device.

Both devices have remarkably fast switching times of less than 100 ns.

App. Phys. Lett. 40(9), 1 May 1982 discloses threshold switching in n + -i-n + sanwich structures of hydrogenated amorphous silicon after an initial forming process. At the threshold voltage, the device switches from a low conductance to a high conductance state.

The switching times available with n + -i-n + structure are slow. The paper explains that as with other amorphous thin-film switches a delay time is observed before switching. For small over voltages above the threshold voltage the delay time before switching is of the order of 1 ms.

The disclosure by den Boer would not en courage the belief that fast threshold switching could be obtained using amorphous seminconductor materials.

We have now found that amorphous or microcrystalline junction semiconductor devices containing a p-layer and which have been subjected to a modifying voltage may be operated as threshold switches.

According to the present invention the method of operating a semiconductor device having an electrically conducting substrate and a layer of p-type amorphous or microcrystalline semiconductor in contact with an amorphous or microcrystalline semiconductor material of different conductivity type and whose electrical properties have been modified by the application of a modifying voltage is characterised by applying to the device, when in a LOWER conductance state, a voltage above a threshold voltage sufficient to switch the device to a HIGHER conductance state, and therefore applying voltages successively below and above the threshold voltage so as to switch between the HIGHER and LOWER states.

The high conductance state found in an amorphous semi-conductor device having a junction between layers of differing conductivity type, and which has been subjected to a sufficiently high 'forming' voltage to transform it into a memory device of the type described in the EE Proc Paper or EP 95283 mentioned above, is referred to in this specification as the ON conductance state.

The low conductance state of the formed memory device is referred to as the OFF conductance state.

A device having a conductance state which is lower than the ON state of a similar device which has been formed into a memory device but above that of the OFF state is in an INTERMEDIATE conductance state.

The HIGHER conductance state of the present invention is an INTERMEDIATE state.

The modifying voltage applied to the device may be sufficiently high to "form" it into a memory device of the type described in the IEE Proc. paper or EP 95283 mentioned above. However the modifying voltage may be only sufficient to transform the device to an INTERMEDIATE conductance state.

The LOWER conductance state may be the OFF state or may be a LOWER INTERMEDI ATE conductance state which is lower than the HIGHER state mentioned above.

Suitable forward bias switching voltages are in the range + 2 to + 10, preferably + 3 to + 6 volts. Such voltages are compatible with CMOS circuitry, unlike the threshold voltages of 10-35 V disclosed in App. Phys. Lett. The voltage applied to the device during threshold switching must not of course be sufficient to put the device into a state corresponding to the ON state of the formed memory device as the ON state is retained even when the applied voltage is reduced substantially below the level responsible for switching to the ON state.

When the voltage is reduced below the threshold, the device reverts to the LOWER conductance state resistance of the device.

The device thus functions as a volatile threshold switch.

The speed of switching from LOWER to HIGHER conductivity states and vice versa is less than 10 ns, compared with delay times of the order of a 1 ms in the devices disclosed in App. Phys. Lett.

Suitable structures include layers having the configuration p-i, p-n, p±n and punt. A further layer can be added to p-n type structures to give p-i-n or p-n-i type structures.

The p, n or i-type amorphous or microcrystaliine semiconductor material is a material which can be doped to provide p or n type conductivity (and in the case of p-and n-type material has been doped). For doping to be practicable the density of states in the gap between the valence band and the conduction band must be reduced to relatively low levels.

The existence of a high density of states has been attributed to the presence of "dangling bonds". Techniques for reducing the density of states in amorphous and microcrystalline semiconductor material e.g. silicon are wellknown. Thus the semiconductor material may be deposited in the presence of hydrogen or may be treated with hydrogen after deposition.

The semiconctor materials used in devices of the present invention may be elements of Group IV of the Periodic Table, eg Si, Ge, and components thereof eg SiC.

The layers of semiconductor material may be such as to produce homojunctions in which there is a junction between layers of the same material thus having the same band gap e.g. silicon. The device may also be a heterojunction device in which there is a junction between different materials having different band gaps e.g. silicon and silicon carbide.

The devices of the present invention are normally two electrode devices in contrast to multielectrode devices such as transistors.

By suitable choice of conditions for the deposition the semiconductor may be deposited in microcrystalline or amorphous form.

Conditions favouring the deposition of amorphous semiconductor are well-known.

Layers of i-silicon can be made by methods known in the art, for example by decomposing silane in a glow discharge. Layers of p and p+ or n and n+ silicon can be made by adding diborane or phosphine respectively in varying quantities to the silane.

The silane and other decomposable gas if present can be in admixture with hydrogen and the total pressure controlled to obtain amorphous silicon.

Glass having an electrically conducting su# face of tin oxide or indium tin oxide or other visible or ultra violet light permeable electrically conducting material is a convenient substrate.

Alternatively the substrate can be similarly treated quartz, or metal layers on a support, or metal sheets. Examples of metals are stainless steel and chromium.

Desirably the device includes one or more electrically conducting areas on the outer surface of the silicon layer remote from the substrate. These areas can conveniently be provided by zones of a metal such as aluminium or a nickel chromium alloy.

The modifying voltages required to produce a device having an INTERMEDIATE conductivity state may be determined by simple tests on samples of the device.

The invention is illustrated by the following Examples and the accompanying drawing.

Example 1 A semiconductor structure was prepared having a-Si doped and intrinsic layers in the sequence p±n-i. The a-Si was deposited by the glow discharge technique, with gas phase doping. A stainless steel substrate was used.

The total thickness of the deposited layers was between 0.5 and 1.0 micron. After completion of the a-Si deposition, a series of NiCr dots was evaporated onto the surface and the top contact was completed either by a probe, or by a thin wire attached to the metal dots by conducting silver paste.

The structure was modified into a device having an INTERMEDIATE state by applying a forward bias of 25 V, the p region being positively biased. The application of the modifying voltage produced the INTERMEDIATE state directly. Its resistance in this state was 3 kilo-ohm measured at 0.1 V.

The device was then tested by applying increasing forward bias volages and measuring the current passed. The current volage characteristics are plotted in Curve A of the accompanying drawing. As the voltage was increased a point was reached (3V) at which the current suddenly switched to a higher range, representing a change to a higher INTERMEDIATE conductance state. A subsequent reduction in voltage caused a reversion to the original INTERMEDIATE state at a somewhat lower voltage (2.8 v) because of hysteresis.

The device was thus initially modified into the LOWER state (in this case a lower INTER MEDIATE state) and was then switched to the HIGHER (in this case a higher INTERMEDI ATE state) by a small forward bias.

The device could be switched between the two INTERMEDIATE conductance states (HIGHER and LOWER) by applying voltages above and below the threshold voltage.

Example 2 Example 1 was repeated with a similar device having a glass substrate and a resistance in the INTERMEDIATE state into which it was first modified of 25 kilo-ohm at 0.1 V.

Current voltage characteristics are plotted in Curve B. A similar effect to that of Example 1 was noted at a threshold voltage of about 6 V.

Thus the device was again first modified into a LOWER (INTERMEDIATE) state and then subsequently switched between this LOWER state and'a HIGHER (INTERMEDI ATE) state of higher conductance.

Claims (3)

1. A method of operating a semiconductor device having an electrically conducting substrate and a layer of p-type amorphous or semiconductor in contact with an amorphous or microcrystalline semiconductor material of different conductivity type and whose electrical properties have been modified by the application of a modifying voltage is characterised by applying to the device in a LOWER conductance state a voltage above a threshold voltage sufficient to switch the device to an HIGHER conductance state and thereafter successively applying voltages below and above the threshold voltage to switch between the HIGHER and LOWER states.

2. A method according to claim 1 wherein the device has been modified by application of a voltage sufficient to transform the device to an INTERMEDIATE conductance state.

3. A method according to either of claims 1 or 2 wherein the device is switched between a LOWER INTERMEDIATE conductance state and a HIGHER INTERMEDIATE conductance state.