GB2141217A - Apparatus and method for vapor sheathed baking of semiconductor wafers - Google Patents
Apparatus and method for vapor sheathed baking of semiconductor wafers Download PDFInfo
- Publication number
- GB2141217A GB2141217A GB08412830A GB8412830A GB2141217A GB 2141217 A GB2141217 A GB 2141217A GB 08412830 A GB08412830 A GB 08412830A GB 8412830 A GB8412830 A GB 8412830A GB 2141217 A GB2141217 A GB 2141217A
- Authority
- GB
- United Kingdom
- Prior art keywords
- plate
- hot plate
- vapor
- baking
- sheathed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 235000012431 wafers Nutrition 0.000 title claims description 41
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000000034 method Methods 0.000 title claims description 12
- 239000007788 liquid Substances 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 239000012159 carrier gas Substances 0.000 claims description 4
- 230000000284 resting effect Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 239000012530 fluid Substances 0.000 claims 4
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 230000008016 vaporization Effects 0.000 claims 1
- 239000000203 mixture Substances 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000011282 treatment Methods 0.000 description 7
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 5
- 238000010276 construction Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 238000010926 purge Methods 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000005587 bubbling Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000004508 fractional distillation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
- 238000010791 quenching Methods 0.000 description 1
- 230000000171 quenching effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
- 238000013022 venting Methods 0.000 description 1
Classifications
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27D—DETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
- F27D7/00—Forming, maintaining, or circulating atmospheres in heating chambers
- F27D7/04—Circulating atmospheres by mechanical means
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27B—FURNACES, KILNS, OVENS, OR RETORTS IN GENERAL; OPEN SINTERING OR LIKE APPARATUS
- F27B19/00—Combinations of furnaces of kinds not covered by a single preceding main group
- F27B19/02—Combinations of furnaces of kinds not covered by a single preceding main group combined in one structure
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Recrystallisation Techniques (AREA)
Description
1 GB 2 141 217 A 1
SPECIFICATION
Apparatus and method for vapor sheathed baking of semiconductor wafers The present invention relates to the baking of semiconductor wafers and more particularly to an apparatus and method for performing such a baking in a vapor sheath which both treats the wafer and removes heat from the environment.
While most baking treatments of semiconductor wafers are typically performed in batch furnaces or in large ovens through which the wafers are transported on belts, it has also been proposed to bake semiconductor wafers by means of smal I local heaters which may be incorporated, on an in-line basis, in a continuous semiconductor fabrication line. For example, two different forms of hot plate constructions, for different purposes, are disclosed in copending, coassigned U.S. Patent Applications Nos. 263,928 and 373, 978. In each of these constructions, however, the process is, to some extent, open to the environment and, accordingly, there is some unavoidable heat loss. As is understood by those skilled in the art, semiconductor fabrication is inherently a precision process and it is typically desired to carefully control all parameters affecting each of the various process steps. It is, therefore, highly undesirable to have a disruptive heat source located within the process area. It has also been found advantageous to perform certain reactive treatments of the wafers simultaneously with the baking and the prior art in-line systems do not facilitate such treatment.
The present invention provides heat treating 100 apparatus for performing vapor sheathed baking of semiconductor wafers, said apparatus comprising: a circular hot plate of a conductive material providing substantially uniform temperature over the diameter of said plate; heater means for bringing said plate to a preselectable controlled temperature; an exhaust chamber around and under said plate and heater means, there being a uniform annular gap between the periphery of said plate and said chamber; and over said hot plate, a cap structure which substantially covers said hot plate while allowing wafers to be brought to and taken from said hot plate and which includes means for providing an outward vapor flow over the surface of a wafer resting on said hot plate, said vapor flow being then drawn into said exhaust chamber through said annular gap.
The apparatus may include means for vaporising a liquid into a carrier gas to form the vapor.
In the method of the invention the liquid includes hexamethy1disilazane and the carrier gas is nitrogen.
A specific embodiment of the present invention in its method and apparatus aspects will now be described by way of example, and not by way of limitation, with reference to the accompanying drawings in which:
Figure 1 is a perspective view of a semiconductor fabrication line employing air track wafer transport and including in-line heat treating apparatus in accordance with the present invention; Figure 2 is a transverse sectional view of the heat treating apparatus; Figure 3 is a top view showing the vapor port arrangement in a cap structure employed in the heat treating apparatus.
Figure 4 is a face view, taken substantially on the line 3-3 of Figure 2 showing a hinge block employed in the heat treating apparatus of Figure 2, which hinge block incorporates a cyclone; and Figure 5 is a top view, with parts broken away, of the hinge block/cyclone construction.
With reference now to the accompanying drawings, corresponding reference characters indicate corresponding parts throughout the several views.
Referring now to Figure 1, there is illustrated a portion of a continuous semiconductor fabrication line of the type which employs air bearing transport of semiconductor wafers from work station to work station. Such in-line fabrication systems are for example sold by the GCA Corporation of Bedford, Massachusetts under the Trademark "Wafertrack". Successive work stations are for example designated by reference characters 11 and 13 with lengths of air bearing track 15-17 being provided for transporting wafers from one work station to the next.
As illustrated, the work station 11 incorporates heating apparatus in accordance with the present invention, and, in particular, the incorporation of a wafer treating hot plate covered by a pivoted cap, designated generally by reference character 21. The baking station is incorporated in a section of the air track 22 which is otherwise similar to the sections 15-17. As is understood by those skilled in the art, such air track sections are typically individually controllable so that semiconductor wafers may be brought to and from each work station on a time controlled sequence in accordance with the desired parameters of the particular fabrication process being implemented.
Referring now to Figure 2, the hot plate itself comprises a circular disc 25 of a metal highly resistant to corrosion. As is understood, corrosion resistance is highly important to avoid the formation of oxidation products which would contaminate the semiconductor wafers themselves. A suitable mate- rial is hastelloy-x manufactured by the Cabot Company of Kokomo, Indiana. A heater block 27 is bonded to the underside of the disk 25. Heater block 27 preferably includes temperature sensors as well as a resistance heater element so that controlled heating of the disk 25 may be provided to maintain any selected temperature.
As may be seen, the disk 25 is set into a corresponding circular opening in the air track section 22 with its surface essentially flush with the track so that wafers may be readily brought in to the heat-treating station by the appropriate operation of the air bearings. An annular gap 29 is provided around the hot plate for venting purposes as described in greater detail hereinafter. Surrounding and underneath the hot plate is an exhaust chamber 33 which connects, through a port 35, to a suitable exhaust blower, indicated diagrammatically by reference character 37.
The cap 21 is pivotally mounted over the hot plate 25 on a hinge structure, designated generally by 2 GB 2 141 217 A 2 reference character 41. As may be seen in Figure 2, the cap 21 comprises an annular metallic rim 42 which holds two circular glass plates 43 and 44with the space between the plates 43 and 44 being maintained by a spacer 47. This layered structure is held together in the rim by a ring 51. While the gap 21 overlies the hot plate in alignment therewith, its lower surface is spaced slightly above the hot plate and the level of the air track 22 so that wafers can be introduced and taken from the work station by the air track system. If desired, the hot plate disk 25 may itself include suitable air bearing ports for facilitating wafer transport, as in prior art devices.
As is explained in greater detail hereinafter, a vapor flow is introduced into the cap through the hinge structure 41. This flow entering the cap through a port 55 which opens into the space between plates 43 and 44. A baff le 45 (Figure 3) starts the vapor on a circular flow in the plenum between the plates. Plate 44 is apertured as illustrated in Figures 2 and 3, there being a 1/4 inch central aperture 57 with a plurality of smaller (1/8 inch) apertures 59 distributed around the central aperture at a distance approximately half way be- tween the aperture 57 and the rim. As will be understood, these apertures or ports allow the vapor flow to pass over the surface of a semiconductor wafer resting on the hot plate 25 so that a uniform distribution and flow of the vapor is obtained over the wafer's surface.
After passing over the surface ofthe wafer, the vapor flow is drawn into the annular gap 29 surrounding the hot plate and into the exhaust chamber 33. In this way, the loss of heat from the hot plate into the environment around the work station 11 is very limited, since the wafer and the hot plate together with its heater are completely sheathed in a vaporflow which carries away the heat generated by the heater.
As may be seen in Figures 4 and 5, the hinge structure 41 comprises a central portion 61 which moves or pivots with the cap 21 together with a pair of stationary blocks or legs 63 and 65. In order to facilitate the reactive treatment of a wafer during baking, the hinge assembly 41 incorporates a cyclone structure for atomizing a reactive liquid constituent into an inert carrier gas.
A preferred reactive material is HIVIDS (hexamethyl-disilazane) which, because of its volatility and flammability, is typically provided in a 50/50 mixture with a quenching material such as freon. Suitable such mixtures are available from the Baker Chemical Company of Hayward, California. While HIVIDS has previously been employed to treat silicon wafers, such treatment has typically been conducted in batch processes where a small amount of HIVIDS is introduced into a vessel, sometimes referred to as a "bomb", with a large number of wafers and the entire assembly is then heated or baked.
While bubbling may be used in some instances to 125 mix a vaporizable liquid into a gas, this is not satisfactory in the case of HMDS/freon mixtures since the differing of those constituents will cause fractional distillation to occur, thereby resulting in a varying concentration of HIVIDS in the vapor stream.
Atornization of the HMDS/freon mixture in the inert gas has been found to be greatly preferable since a metered quantity of HIVIDS may be introduced into the gas flow so that fixed proportions or concentra- tions of the reactive material can be assured.
As may be seen in Figure 4, each of the mixture components can be introduced into the hinge assembly through a respective one of the stationary blocks 63, 65. The central portion 61 of the hinge assembly includes a cyclone chamber 66 and, on each side of the chamber 66, a respective hollow pivot portion 67 and 69 which extends into a respective stationary block 63, 65. O-rings (not shown) are used to provide a rotary seal. The liquid component (HMDS and Freon) is introduced through the block 63 and the port through the pivot 67, designated by reference character 71, is drilled so that it enters the chamber 66 "on-axis" as may be seen in Figure 5. The inert purge gas, typically nitrogen, is introduced through the block 65 and the port through the corresponding pivot portion 69 is drilled, as indicated at73, so that it enters the chamber 66 tangentially. As the volume of purge gas employed will typically be large in comparison with the volume of the reactive liquid composition, it will be understood that a vortex or cyclone will be generated in the chamber 66 and this cyclone action will tend to atomize and vaporize the liquid introduced through the port 71. The vapor mixture is extracted from the central portion of the cyclone chamber 66 through a nozzle structure 75. Due to the centrifugal action of the cyclone atornization, unvaporized droplets are held to the periphery of the chamber 66 and are not swept along with the exiting vapor, thus reducing the chances of any entrained droplet which could spatter on the wafer and degrade the treatment of the surface thereof.
Summarizing, it can be seen that the heat-treating apparatus which has been described with reference to the accompanying drawings facilitates the baking of semiconductor wafers within a vapor sheath. The vapor sheath carries heat away from the wafer and heater assembly so as to cause minimal thermal contamination of the semiconductor fabrication line within which the apparatus is typically incorporated. The vapor sheath can comprise a controlled mixture of a reactive liquid in an inert purge gas so that reactive treatment of the surface of the wafer can take place during the baking. Other advantages are that the apparatus does not release unacceptable quantities of heat into the environment; the apparatus prevents release of reactive vapors into the environment; the apparatus will treat wafers under precisely controllable and repeatable conditions; the apparatus is not wasteful of reactive constituents; the apparatus is highly reliable and is of relatively simple and inexpensive construction.
Claims (9)
1. Heat treating apparatus for performing vapor sheathed baking of semiconductor wafers, said apparatus comprising; a circular hot plate of a conductive material providing substantially uniform temperature over C, f Z 3 GB 2 141 217 A 3 the diameter of said plate; heater means for bringing said plate to a preselectable controlled temperature; an exhaust chamber around and under said plate and heater means, there being a uniform annular gap between the periphery of said plate and said chamber; and over said hot plate, a cap structure which substantially covers said hot plate while allowing wafers to be brought to and taken from said hot plate and which includes means for providing an outward vapor flow over the surface of a wafer resting on said hot plate, said vapor flow being then drawn into said exhaust chamber through said annular gap.
2. Apparatus asset forth in claim 1 wherein said cap structure is pivotally mounted over said hot plate by means of a hinge on one side of said hot plate and wherein said vaporflow is introduced into said cap structure axially through the hinge pivot.
3. Apparatus asset forth in claim 2 wherein said hinge includes a central portion movable with said cap structure and, on each side of said central portion, a stationary block, each block being provided with a fluid inlet and means for coupling fluid flow into said central portion of said hinge.
4. Apparatus asset forth in claim 3 wherein the central portion of said hinge includes means for mixing the fluids introduced through the respective inlets.
5. Apparatus asset forth in claim 4 wherein said mixing means comprises a cyclone for mixing liquid introduced through one of said inlets into a gas introduced through the other of said inlets without the inclusion of droplets in the fluid flow introduced into said cap structure.
6. Heat treating apparatus for performing vapor sheathed baking of semiconductor wafers, said apparatus comprising:
a circular hot plate of a conductive material providing substantially uniform temperature over the diameter of said plate; heater means for heating said plate; an exhaust chamber around and under said plate and heater means, there being an annular gap between the periphery of said plate and said chamber; mixing means for vaporizing a liquid into a carrier gas; and over said hot plate, a cap structure which substantially covers said hot plate while allowing wafers to be brought to and taken from said hot plate and which includes means for providing a radially outward flow of said vapor over the surface of a wafer resting on said plate, said gas flow being then drawn into said exhaust chamber through said annular gap.
7. A method for performing vapor sheathed baking of a semiconductor wafer using an apparatus as claimed in claim 5 or 6 wherein the gas is nitrogen and the liquid includes hexamethy1disilazane.
8. A method for performing vapor sheathed baking of a semiconductor wafer substantially as hereinbefore described with reference to, and as shown in, the accompanying drawings.
9. Heat treating apparatus for performing vapor sheathed baking of semiconductor wafers substan- tially as hereinbefore described with reference to, and as shown in, the accompanying drawings.
Printed in the UK for HMSO, D8818935,10/84,7102. Published by The Patent Office, 25Southampton Buildings, London, WC2A 1AY, from which copies may be obtained.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/496,818 US4556785A (en) | 1983-05-23 | 1983-05-23 | Apparatus for vapor sheathed baking of semiconductor wafers |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8412830D0 GB8412830D0 (en) | 1984-06-27 |
GB2141217A true GB2141217A (en) | 1984-12-12 |
GB2141217B GB2141217B (en) | 1986-09-24 |
Family
ID=23974271
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08412830A Expired GB2141217B (en) | 1983-05-23 | 1984-05-18 | Apparatus and method for vapor sheathed baking of semiconductor wafers |
Country Status (6)
Country | Link |
---|---|
US (1) | US4556785A (en) |
JP (1) | JPS6041214A (en) |
DE (1) | DE3418769A1 (en) |
FR (1) | FR2546619A1 (en) |
GB (1) | GB2141217B (en) |
IT (1) | IT1179927B (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4872835A (en) * | 1986-07-24 | 1989-10-10 | Hewlett-Packard Company | Hot chuck assembly for integrated circuit wafers |
JPH06103665B2 (en) * | 1987-01-29 | 1994-12-14 | 東京エレクトロン株式会社 | Processor |
US4768291A (en) * | 1987-03-12 | 1988-09-06 | Monarch Technologies Corporation | Apparatus for dry processing a semiconductor wafer |
DE3933423C2 (en) * | 1989-10-06 | 1994-12-22 | Nokia Deutschland Gmbh | Device for heat treatment, in particular for LCD substrate plates |
JP2927857B2 (en) * | 1990-01-19 | 1999-07-28 | 株式会社東芝 | Substrate heating device |
US5530223A (en) * | 1993-08-05 | 1996-06-25 | Angelo Po Grandi Cucine S.P.A. | Convection and steam oven with a pre-atomizer |
JPH11168045A (en) * | 1997-12-03 | 1999-06-22 | Mitsubishi Electric Corp | Semiconductor manufacture device and processing method for wafer |
JP3892609B2 (en) * | 1999-02-16 | 2007-03-14 | 株式会社東芝 | Hot plate and method for manufacturing semiconductor device |
US6432207B1 (en) * | 2001-03-07 | 2002-08-13 | Promos Technologies Inc. | Method and structure for baking a wafer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2845080C2 (en) * | 1978-10-17 | 1981-10-08 | Casimir Kast Gmbh & Co Kg, 7562 Gernsbach | Device for heating a fleece |
DE3064754D1 (en) * | 1979-07-09 | 1983-10-13 | Electrovert Ltd | Method and apparatus for vapour phase soldering |
US4518848A (en) * | 1981-05-15 | 1985-05-21 | Gca Corporation | Apparatus for baking resist on semiconductor wafers |
US4436985A (en) * | 1982-05-03 | 1984-03-13 | Gca Corporation | Apparatus for heat treating semiconductor wafers |
-
1983
- 1983-05-23 US US06/496,818 patent/US4556785A/en not_active Expired - Fee Related
-
1984
- 1984-05-18 GB GB08412830A patent/GB2141217B/en not_active Expired
- 1984-05-19 DE DE19843418769 patent/DE3418769A1/en not_active Withdrawn
- 1984-05-22 FR FR8407971A patent/FR2546619A1/en not_active Withdrawn
- 1984-05-22 IT IT67515/84A patent/IT1179927B/en active
- 1984-05-23 JP JP59104380A patent/JPS6041214A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS6041214A (en) | 1985-03-04 |
IT8467515A0 (en) | 1984-05-22 |
GB2141217B (en) | 1986-09-24 |
DE3418769A1 (en) | 1984-12-13 |
FR2546619A1 (en) | 1984-11-30 |
US4556785A (en) | 1985-12-03 |
IT1179927B (en) | 1987-09-16 |
GB8412830D0 (en) | 1984-06-27 |
IT8467515A1 (en) | 1985-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |