GB2138241A - Television system with line standard conversion and data generator and data receiver suitable therefor - Google Patents

Abstract

A television system with line standard conversion which is compatible for high-definition television and standardized television with a lower definition. Before the signal is applied to a transmission or signal storage channel 3 according to the standard, a signal from a source 1 is subjected to decompression which is effected in the data generator in a line standard conversion circuit 2, by means of stores 5,6,7,8 having different write and read rates. Over a four field period cycle the information associated with substantially the total number of lines of the original, high-definition picture is transmitted or stored, respectively. For reconversion, the data receiver comprises a line standard conversion circuit (20) which includes stores (SR1, SR2, SR3, SR4, SR5, SR6) having different write and read rates and each having the capacity to store one field period. <IMAGE>

Description

SPECIFICATION Television system with line standard conversion and data generator and data receiver suitable therefor The invention relates to a television system with line standard conversion, comprising a data generator and at least one data receiver with a transmission or storage channel arranged between the said one data generator and the data receiver, the channel having a more limited bandwidth than the bandwidth of a first signal when produced by a signal source in the data generator having a first predetermined number of lines per picture period, the data generator including between the signal source and the channel a first line standard conversion circuit comprising stores having a different write and read rates for effecting a time expansion on the first signal so as to cause the number of lines per picture period to be reduced to a second predetermined number of form a second signal, the data receiver comprising a second line standard conversion circuit also comprising stores having different write and read rates for restoring the number of lines per picture period to substantially said first predetermined number to form a third signal. The invention also relates to a data generator and data receiver for use with such a system.

Such a television system for more specifically a transmission channel is disclosed in an article in Philips Research Reports 28, 1973, pages 377 to 390, inclusive, entitled "Standards conversion of a TV signal with 625 lines into a video-telephone signal with 313 lines". The article describes a videotelephone standard with 25 frames per second and 313 lines per picture. This standard allows a simple standard conversion from 625 to 313 lines, and vice versa. To that end the line standard conversion is effected using two or three line memory shift registers with different write and read rates. Approximately half the original number of lines is transmitted with their own signal values or with signal values interpolated between the lines, with a line period which is extended by approximately a factor of two because of the decompression.

The invention has for its object to provide a television system with a line standard conversion, which is suitable for high-definition television and is compatible with a television system laid down in a television standard, such as for example the 525, 625 or 819-line standard.

The invention provides a television system of the type described in the opening paragraph which is characterised in that the first conversion circuit in the data generator produces a signal which over a cycle of two picture periods contains the information from substantially the total number of lines in the first signal, each store in the second conversion circuit in the data receiver having a capacity to store a quantity of information corresponding to that of one field period in the second signal.

A data generator suitable for use in the above television system may be characterised in that the first conversion circuit comprises at least two stores and produces over said two picture period cycle the second signal containing the information from sub stantiallythe total number of lines in the first signal.

A data receiver suitable for use in the above television system may be characterised in that the second conversion circuit comprises at least four stores each having the said one field period capacity.

The invention will now be described in greater detail by way of example with reference to the accompanying drawings, in which Figure 1 shows an embodiment of a data generator suitable for use in a television system according to the invention, Figure 2 serves to illustrate the operation of the data generator of Figure 1 with some signal variations as a function of time, Figure 3 shows an embodiment of a data receiver suitable for use in combination with the data generator of Figure 1, Figure 4 serves to illustrate the operation of the data receiver shown in Figure 3 by means of some signal variations as a function of time, Figure 5 shows a further embodiment of a data generator, Figure 6shows some signal variations associated with the further data generator of Figure 5, and Figure 7 shows some signal variations associated with a data receiver having a construction similar to that of the receiver shown in Figure 3, butcompris- ing four instead of six stores.

In Figure 1 reference numeral 1 denotes in a data generator a signal source which is connected to a transmission or signal storage channel 3, respectively via a line standard conversion circuit 2. The channel 3 may form part of a transmission channel of a standardized black-and-white or colour television system. Based on a standardized system using interlace, the number mH shown at the channel 3 denotes the number of lines of a television picture and TH denotes a line period for that channel. By way of example m may be chosen to be equal to 525, 625 or 819. The line period TH may, for example, be equal or substantially equal to 64as for 525 or 625 line systems. According to the standard, the number of lines mH is present in two field periods TV which together form a picture period.The field period TV is, for example, equal to 16.66 or 20 ms for the 525 or 625/819 line systems respectively. The bandwidth of the channel 3 may be as high as, for example, 5 MHz.

At the signal source 1 a number of lines 2 mH is denoted for its picture period and a line period is indicated by 1/2 TH. From the even number of lines 2 mH per picture period 2 TV it follows that the signal source 1 operates to produce a non-interlaced picture. The signal source 1 may then be in the form of a television camera, a cine-television conversion device (telecine) or a video signal source of a different construction. A synchronizing signal SO whose signal variation versus the time tis plotted in Figure 2, is applied to the signal source 1. The signal SO and signal S1, S2 etc. to S8, still further to be described, are plotted schematically in Figure 2.The signal SO of Figure 2 shows that under the control thereof the signal source 1 supplies information in the picture period 2 TV in consecutive line periods H1, H2, H3 ... H2m, in which picture period the number of lines 2 mH is present. The specific construction of the signal source 1 is not relevant to the invention, it only being important that the source 1 supplies information which on display on a display screen is associated with a non-interlaced picture having 2 mH lines in a picture period 2 TV, the line period being equal to 1/2 TH. The signal source 1 produces a signal up to, for example, a bandwidth of 120 MHz, which signal on display would result in a high-definition television picture.This signal cannot be transmitted or stored respectively in the channel 3 having a bandwidth up to, for example, 5 MHz, without further measures being taken. In orderto adapt the signal to be produced by the signal source 1 to the channel 3, with a more limited frequency, the data generator shown in Figure 1 is provided with the line standard conversion circuit 2.

The conversion circuit 2 comprises an analogueto-digital converter (A/D) 4which is connected to the output of the signal source 1. The output of the converter 4 is connected to inputs of four stores 5, 6, 7 and 8 of a type having different write and read rates. These stores may, for example, be in the form of serial shift registers SR. The specific construction of the stores 5,6,7 and 8 is not relevant to the invention and they may be, for example, in the form of random access memories, it only being assumed that the stores 5,6,7 and 8 are digital memories capable of operating with different write and read rates.

Information can be written into the stores 5, 6,7 and 8 under the control for four respective changeover circuits 9, 10, 11 and 12 and information can be read under the control of four further change-over circuits 13,14, 15 and 16. The change-over circuits 9 to 16, inclusive are shown in the drawing as mechanical switches having switching contacts T1 and T2, but in practice they will be in the form of electronic change-over circuits. The signals S1 to S8 are applied as switching signals to the respective change-over circuits 9 to 16. In Figure 2 two signal levels are denoted at the switching signals S1 to S8, inclusive by T1 and T2, which levels correspond to the similarly denoted change-over contacts when they are interconnected.

In each of the change-over circuits 9 to 16 the contacts T2 are not themselves externally connected. When connected by the moving contact to these contacts, the stores 5, 6, 7 and 8 are disabled for writing or reading.The contacts T1 of the change-over circuits 9,10,11 and 12 are externally interconnected and a clock pulse signal having a clock pulse frequency 2 fc is applied to them.

Similarly, the contacts Ti of the change-over circuits 13,14, 15 and 16 are externally interconnected and a clock pulse signal having a clock pulse frequency fc is applied to them. Under the control of the respective clock pulse signal having a frequency 2 fc and fc the write rate at the stores 5,6,7 and 8 is twice as high as the read rate. As a result thereof, the signal occurring at the store output is subjected to a time decompression by a factor of two, which is accompanied buy a halving of the signal bandwidth.

Outputs of the stores 5,6,7 and 8 are connected to an input of a digital-to-analogue converter (D/A) 17, an output of which is connected to the channel 3. In the event channel 3 is not a channel for analogue signal processing but a channel for digital processing the converter 17 will be omitted.

The mode of operation of the conversion circuit 2 of Figure 1 will be described in greater detail with reference to the signals SO, S1 to S8, inclusive. In the picture period 2 TV shown in Figure 2, the stores 5 and 6 are alternately in the writing mode once in every four line periods TH TH underthe control of the change-over signals S1 and S2 shown. The information from the lines H1, H5, H9 etc. is written into the store 5 and the information from the lines H3, H7, H11 etc. is written into the store 6. The positions shown in Figure 1 ofthechange-overcircuits9to 16, inclusive are, for example, associated with the line H1.

In the picture period following the picture period 2 TV shown in Figure 2 the data of the lines H2, H6, H10 etc. are written into the store 7 and those of the lines H4, H8, H12 etc. are written into the store 8 underthe control of the switching signals S3 and S4.

Simultaneously, in the first half of this following picture period (the field period TV) the store 5 is read under the control of the signal S5, as a result of which the data of consecutive lines Hi', H5', H9' etc, from that store appear at the output. Because of the fact that the read rate is halved, these lines occur with the line period TH, mH lines being present in the field period TV. Thereafter, in the second half of the picture period, the store 6 is read under the control of the signal S6, so that at that store's output the data of consecutive lines H3', H7', H11' etc.

occur. In the subsequent picture period the stores 7 and 8 are read in a similar way under the control of the signals S7 and S8, so that data of the consecutive lines H2', H6', H10' etc. and H4', H8', H12' etc. occur sequentially at the store outputs. Simultaneously, information is now written in the stores 5 and 6. The Figure shows that the data associated with fhe consecutive lines H1, H2, H3 to H2m, inclusive (the signal SO shown in Figure 2) ofthe original picture become available in a cycle of field periods 4 TV in the line sequence H1', H5' ... (firstfield); H3', H7' ...

(second field); H2', H6'... (third field); H4', H8'...

(fourth field) (signals S5, S6, S7 and S8 shown in Figure 2). This data stream is denoed in Figure 1 by 11, which is further plotted in Figure 4 as a function of the time t. In (digital or) analogue form the data stream Ii is suitable for transmission or storage, respectively in channel 3.

The time diagrams shown in Figure 4 are associated with an embodiment of a data receiver according to the invention shown schematically in Figure 3.

Figure 3 shows again the channel 3 of the Figure 1.

The channel 3 is coupled for reconversion via a line standard conversion circuit 20 to a display device 21 suitable for high-definition display with (2m + 1 )H lines, in two interlaced field periods TV, with the line period of approximately 1/2 TH. Compared to the standardized line period TH, the exact value m/(2m + 1)TH is obtained for the high-definition line period.If a display device according to the standard were directly connected to the channel 3 of Figure 3 then it would be supplied with a data stream in accordance with the standard, as the data stream 11 of Figure 4 is of the standardized structure, but then the situation would be such that the data associated with the original lines H1, H5 etc. and H3, H7 etc., respectively of the first and second fields coincide during display in accordance with the standard with the data of the lines H2, H6 etc. and H4, H8 etc., respectively of the third and fourth fields, which follows from the data stream 11 of Figure 4. This coincidence is acceptable in every respect for the picture quality for that standard, so that the high-definition television system according to the invention is compatible with the standarized television systems which have a poorer picture definition.

In the line standard conversion circuit 20 the output of the channel 3 is connected to an input of an analogue-to-digital converter 22. An output of the converter 22, is connected to a contact of a changeover circuit 23, which comprises six change-over contacts. The six change-over contacts of the change-over circuit 23 are connected to a changeover contact of six respective change-over circuits 24 to 29 which each have three change-over contacts.

The switching contact of the change-over circuit 24 is connected to an input of a store SR1 which is in the form of a shift register SR and has different write and read rates. The output of the store SR1 is connected to a further change-over contact of the change-over circuit 24 whose remaining change-over contact is disconnected. Similarly, the change-over circuits 25 to 29 are respectively connected to stores SR2 to SR6 in a manner similar to that of change-over circuit 24 and store SR1. The outputs of the stores SR1 to SR6, inclusive are further connected to six change-over contacts of a change-over circuit 30, the switching contact of which is connected to the high-definition display device 21 via a digital-to-analogue converter 31.During a field period two of the six change-over contacts of the change-over circuit 30 are always alternately connected to the converter 31, with the line period 1/2 TH. A data stream 12 whose time diagram is shown in Figure 4 is applied to the display device 21. In Figure 4 change-over signals SR1 to SR6, inclusive are plotted which are associated with the similarly indicated stores SR of Figure 3. The writing-in of information effected at the stores SR of Figure 3 is indicated for the signals SR1 to SR6, inclusive of Figure 4 by means of an arrow at the beginning of a pulse. Writing this information H' is effected under the control of a clock pulse signal having the clock pulse frequency fc. This is followed by reading at twice the rate (arrow at the end of the pulse) and a rewrite operation (arrow at the beginning of the pulse) with the clock pulse frequency of approximately 2 fc.Thereafter a single reading operation is effected with the clock pulse frequency of approximately 2 fc. The single reading operation and reading and rewriting, respectively take place only during the lines shown in the drawing (for example H1, H5 etc.). For the approximately twice higher clock pulse frequency it follows that it has the exact value (2m + 1)/m fc. It is apparent that the number of lines mH present in the field period TV at the data stream Ii is converted into a number of lines of approximately mH at the data stream 12 associated with the high-definition display.In Figure 4the data combination to be effected in a cycle of four field periods to form the data stream 12 from the data stream Ii are illustrated by means of lines provided with arrowtips joining the Ii and 12 diagrams. The switching positions of the changeover circuits 23 to 30, inclusive of Figure 3 are associated with the first field period of this cycle. At the display device 21 shown in Figure 3, an interlaced picture is built-up according to the data stream 12 of Figure 4 with the lines H1, H3 etc. and H2, H4 etc., being repeated in adjacent picture periods. This interlaced picture when displayed by the display device 21 is derived from an originally noninterlaced picture which would be obtained if the signal from the source 1 of Figure 1 were directly displayed, as described for the signal SO to Figure 2.

For this conversion the line standard conversion circuit 2 of Figure 1 must comprise the stores 5 to 8, inclusive, each having the capacity to store one quarter of the information contained within a picture period for the high definition non-interlaced system which corresponds to the information contained in a field period forthe lower definition standardized interlaced system. For the construction shown in Figure 3 when the stores SR1 to SR6, inclusive form, as shown in Figure 3, a series shift register SR, then all six stores must be present and each have a capacity corresponding to that of stores 5 to 8 in Figure 1.

Figure 5 shows schematically a data generator which comprises a data source 40 for producing a high definition interlaced picture signal, as is shown by means of an odd number of lines (2m + 1) H. In Figure 6 a synchronizing signal SlO to be applied thereto, which results in a line sequence H1, H3, H5 etc. corresponding to the first field and a line sequence H2, H4, H6 etc. corresponding to the second field is plotted as a function of the time t. The signal source 40 is coupled to the transmission or signal storage channel 3, via a line standard conversion circuit 41.In the circuit 41 the signal source 40 is connected via analogue-to-digital converter 42 to stores 43 and 44 which in the manner described with reference to Figure 1 are connected to change-over circuits 45 and 46 for writing at a clock pulse frequency of approximately 2 fc and change-over circuits 47 and 48 for reading at a clock pulse frequency fc. The outputs of the stores 43 and 44 are connected to the channel 3 via a digital-to-analogue converter 49. The change-over circuits 45, 46, 47 and 48 are operative under the control of the respective switching signals S11,S12,S13 and S14, whose time diagrams are plotted in Figure 6. From the signals S11,S13 and S12, S14, respectively of Figure 6 it follows that the stores 43 and 44 have the capacity to store information contained in one line period for the high definition system and not, as required for the circuit 2 of Figure 1, the field period capacity for the standardised system, although two stores of that type might here also be used. Figure 6 shows that the line sequences H1, H3, H5 etc. and H2, H4, H6 etc.

are converted into a data stream 13 for the channel 3 with the line sequence H1', H5', H9' ...(lust field period), H2', H6', H10' (2nd field period), H3', H7', H11'... (3rd field period), H4', H8', H12' ... (4th field period). It is apparent that in the case of the data generator shown in Figure 5 the conversion circuit 41 also supplies a signal with in a cycle of four field periods 4 TV, the data stream 13 having all lines but one of the number of lines (2m + 1) H of the signal source 40. The position shown in Figure 5 of the change-over circuits 45,46,47 and 48 is associated with, for example, writing the information of the line H9 into the store 43 and reading the information of the extended line H5' from the store 44.

For the reconversion the line standard conversion circuit 20 of Figure 3 can be used, it being possible forthe stores SR5 and SR6 to be disabled orto be absent with an appropriate reorganisation of the switching. In Figure 7 the switching signals associated with the stores SR1, SR2, SR3 and SR4 of Figure 3 are plotted, the signals being denoted by the same references as the stores. The data stream 13 is converted in the manner described with reference to Figure 2 into a data stream 14 suitable for highdefinition display in the display device 21 of Figure 3.

When the field period shift register stores SR which are also used for the time compression are used, a conversion circuit 20 comprising at least four stores is obtained.

Display of the data stream 13 on a display screen of a standarized display device results, compared to the original picture in the data of the lines H1', H5', etc.

and H2', H6' etc., respectively coinciding with the data of the lines H3', H7', etc. and H4', H8' etc., respectively. In this case compatibility with an acceptable picture quality is also obtained.

In the foregoing, relative to the standarized number of lines mH per picture period, the number of lines 2 mH and (2m + 1) H were mentioned as examples of the high-definition picture. A further example is the use of an even or odd number of lines approximately equal to 1.5 mH. Then a data stream can be transmitted or stored in the channel 3 with the line sequence H1', H4', H7' ... (lstfield),H2',H5', H8' ... (2ndfield),H1',H4',H7' ... (3rd field), H3', H6', H9' ... (4th field). On display on a display screen of a standardized display device the data associated with the lines H2', H5', H8' etc. and H3', H6', H9' etc.

coincide.

Claims (10)

1. Atelevision system with line standard conversion, comprising a data generator and at least one data receiver with a transmission or storage channel arranged between the data generator and the said one data receiver, the channel having a more limited bandwidth than the bandwidth of a first signal when produced by a signal source in the data generator having a first predetermined number of lines per picture period, the data generator including between the signal source and the channel a first line standard conversion circuit comprising stores having different write and read rates for effecting a time expansion on the first signal so as to cause the number of lines per picture period to be reduced to a second predetermined number to form a second signal, the data receiver comprising a second line standard conversion circuit also comprising stores having different write and read rates for restoring the number of lines per picture period to substantially said first predetermined number to form a third signal, characterised in that the first conversion circuit in the data generator produces a signal which over a cycle of two picture periods contains the information from substantially the total number of lines in the first signal, each store in the second conversion circuit in the data receiver having a capacity to store a quantity of information corresponding to that of one field period in the second signal.

2. Atelevision system as claimed in Claim 1, characterised in that the second conversion circuit comprises at least four stores each having the said one field period capacity.

3. A television system as claimed in Claim 1 or 2, characterised in that when said first signal contains an even number of lines per picture period, the first conversion circuit in the data generator comprises four stores each having the said one field period capacity whilst the second conversion circuit comprises six stores each having the said one field period capacity.

4. A data generator suitable for use in a television system as claimed in any of the preceding Claims, characterised in that the first conversion circuit comprises at least two stores and produces over said two picture period cycle the second signal containing the information from substantially the total number of lines in the first signal.

5. A data generator as claimed in Claim 4, suitable for use in a television system as claimed in Claim 3, characterised in that the first conversion circuit comprises four stores each having the said one field period capacity.

6. A data receiver suitable for use in a television system as claimed in Claim 1,2 or 3, characterised in that the second conversion circuit comprises at least four stores each having the said one field period capacity.

7. A data receiver as claimed in Claim 6, suitable for use in a television system as claimed in Claim 3, characterised in that the second conversion circuit comprises six stores each having the said one field period capacity.

8. A television system with line standard conversion substantially as herein described with reference to the accompanying drawings.

9. A data generator substantially as herein described with reference to the accompanying drawings.

10. A data receiver substantially as herein described with reference to the accompanying drawings.