GB2132841A - Method and apparatus for the digitalization and storage of ultrasonic information - Google Patents

Abstract

For the logarithmization and digitalization of analog signal voltages, these voltages are generated cyclically as recurring real-time images (A- images). The signal voltages are amplified 5 and compared 6 with a preselected threshold voltage. The resulting digital values are fed to a shift register 8. On expiry of each real-time image, the shift register contents are transferred to a memory 9. The amplification is reduced between the recurring real-time images, in a logarithmic graduation from one cycle to the next. The process stops when a flip-flop 10 fails to detect non-zero digital values from register 8. <IMAGE>

Description

SPECIFICATION Method and apparatus for the digitalization and storage of ultrasonic information In non-destructive testing of materials, the analog electrical voltage-time function containing the ultrasonic information may be converted to electrical digital values by comparison with a thresold voltage in a series of cycles, the threshold being increased stepwise between each cycle and the next. The time coordinate is divided up into consecutive time segments and the digital values at any time are stored and summed within the time segments.

To store ultrasonic signals in the form of an A-scan display it is advantageous to use digital memories.

The term "A-scan" denotes a display of ultrasonic signals of voltage against time (hereinafter referred to briefly as a signal voltage) on a display means, e.g. the screen of a cathode ray tube (CRT). For storage purposes the ultrasonic information received as analog signal voltages must be converted into digital form. To reconstruct the digitalized A-scans, the memory contents are subjected to digital/analog reconversion. Alternatively, the stored digital values can be summed within the time segments and the memory contents allocated to the time segments on the thus digitalized time line can be displayed on the screen. A method of this kind is known from German Patent 29 33 070, but this has the great disadvantage that as a result of the linear method of operation the most that can be processed is an approximately 30 dB dynamic range of the signal voltage for display.If, for example, the maximum value of a signal voltage just completely fills the CRT screen, a signal voltage/time value of -30 dB is displayed in only 3% of the screen height.

To enable the necessary information to be taken from an A-scan even in the case of relatively small signal voltage values, dynamic ranges above 100 dB must be displayed, i.e. on a linear scale voltage differences of more than 105 1 To display such a dynamic range requires logarithmization of the signal voltage. The known method is unsuitable for logarithmization of the signal voltage and hence the processing of such a wide dynamic range, because the threshold voltage for the comparator can at best be changed in a ratio of three powers often. A comparator of th is kind operates only in a range of approximately 5 mV to 5 V. Therefore disturbing inaccuracies for the voltage comparison already exist at 5 mV.With this known method, therefore, it is impossible to obtain logarithmization of the signal voltage in a range of more than 3 powers often by changing the threshold voltage in logarithmic stages.

A method disclosed by German Offenlegungsschrift DE-OS 26 23 522 uses a logarithmic amplifier and a high-speed analog/digital converter. Logarithmic amplifiers and high-speed analog/digital converters are very expensive and complex. Logarithmic amplifiers of this kind also have the basic disadvantage that they can be designed only for a fixed dynamic range.

Proposed herein is a simple and cheap method of logarithmization and digital conversion of the analog signal voltage without having to use a logarithmic amplifier and a high-speed analog/digital converter, and apparatus for performing the method.

The method will be explained with reference to an example and Figures 1 to 7 while the apparatus will be explained with reference to Figure 8.

Referring to the drawings: Figure la shows an analog A-scan with three signal voltage maxima.

Figure ib is the digitalized A-scan produced by the method proposed herein, with an enlarged detail of the curves indicating the stepped shape thereof as a result of digitalization.

Figures 2 to 6, suffix a, show the analog A-scans at different cycles of the method, together with the threshold voltage selected, and Figures2to 6, suffix b show the digital values produced in the cycles of the method in relation to Figures 2a to 6a.

Figure 7is an A-scan logarithmized according to the present proposal with an evaluation threshold at 52 dB below the largest relative maximum.

Figure 8 is a preferred design of equipment for performing the method.

Figure la illustrates an analog A-scan of the kind displayed for example on a CRT screen when an ultrasonic tester is set to its operational settings. The largest of the three maxima 32 illustrated for the signal voltage is required to utilize the screen height of the CRTto 100%. A second relative maximum 42 and a third 52 have an amplitude of 50% and 5% respectively of the screen height. After the method herein proposed has been performed, the analog A-scan of Figure la gives digital values which are stored in a digital memory and which are called and displayed on the screen of the CRTto give the reconstruction of the now logarithmized A-scan in digital form as shown in Figure 1 b. In this the display 31 is the reconstruction of the logarithmized display 32 and the reconstructions 41 and 51 are equivalent to the logarithmized analog displays 42 and 52 respectively.The stepped configuration shown as an enlargement in the detail in Figure 1 b is intended only to indicate that the reconstructions are formed from digital values added within discrete times.

The method according to the invention is based on the assumption that an appropriate number of consecutive real-time images, approximately 100 in this example, are identical and represent the voltage-time function. If, for example, 500 scans per second are produced by the ultrasonic tester, the A-scan must remain constant within 0.2 seconds.

Given a steel test piece of a thickness of 180mm for example, the duration of a real-time A-scan, i.e. the sweep time for the CRT line deflection, would be 60 s. It must be remembered that the ultrasonic pulse must traverse the sonic path from the place of impingement of the sound to a reflector and then back to the place of impingement, which is then also the place of reception. The speed of propagation of sound in this example is taken at the rounded-off value of 6000 m/s. The duration of the A-scan, i.e. 60 ps in this case, is now divided up into time segments, e.g. 256 segments. Each segment is a shift step in a shift register.For display in the form of an A-scan the received ultrasonic pulses are converted into electrical voltage values so that an electrical voltage-time function (signal voltage) is formed for the duration of the A-scan. This signal voltage is fed to an amplifier, which also contains setting means for manual amplifier setting and an attenuator controllable by binary signals. A suitable controllable attenuator is disclosed in German Offenlegungsschrift DE-OS 27 32 754.

In a first cycle of the method, the attenuator adjustable by binary signals of a binary counter and hereinafter referred to just as the "attenuator", is set to the smallest attenuator stage to give the maximum amplification. In Figure 2a, the analog A-scan of Figure 1a is shown as a real-time image for this first step of the method after undergoing basic amplification, which in this example is 105 : A threshold voltage is also shown in the form of line 61, and is selected, for example, at 52 dB below the peak of the maximum 32 (e.g. 0.5 V). When this line 61 is displayed at 10% screen height the three maxima 32, 42, 52 are situated in the overshoot zone.

In this case the maximum 32 would have its peak at 400 times the threshold voltage (0.5 V) and hence be 200 V, maximum 42 would be at 200 times (100 V) and maximum 52 at 20 times (10 V) the threshold voltage (0.5 V). In this illustration noise is already visible on zero line 62.

During the intervals of time when the signal voltage exceeds the threshold voltage, comparison of these two voltages, e.g. in a comparator, gives digital values of the kind shown in Figure 2b. It is immaterial whether the digital values are in H or L form as a result of the signal voltage exceeding the threshold voltage. These digital values are received by a shift register which for this purpose is controlled by shift pulses in synchronism to the ultrasonic pulse generated, i.e. the A-image, and the shift frequency of which in this example is 256/60 ps = 4,266,667 Hz. After the real-time of the A-scan has elapsed, the contents of the shift register in the intervening period until the next ultrasonic pulse is transmitted are received in a memory which was erased before the first cycle.In this example an A-scan lasts 60 Fs and with 500 A-scans per second a total time of 2,000 ps is available per A-scan cycle so that an interim period of 1940 As is available for transfer to the memory. In connection with the generation of the next ultrasonic pulse, the amplification is reduced by one stage by means of the attenuator for the second cycle of the method, preferably before the next ultrasonic pulse is transmitted, so that the increased signal voltage is reduced in comparison with the first cycle, the reduction being equivalent to this increased attenuation. The attenuator is so adjusted that with each cycle signal a binary counter gives an appropriately coded adjustment signal to the attenuator. The digital signal formed in this cycle now contains the times during which the signal voltage exceeds the threshold voltage.After the shift register shift operation has been carried out, the shift register transfers its contents to the memory in which the new digital signals are added, in each of the time portions, to the digital signals already present from the first cycle.

For a subsequent cycle in the method, e.g. the sixth cycle, as shown in Figure 3a the attenuated amplitudes 32,42, 52 are compared with the threshold voltage 61 and the comparison gives the digital signal shown in Figure 3b. It has been assumed that the amplitude 52 is 10 times higher. If the attenuator is attenuated from one cycle to the next via the binary counter, the attenuation advantageously being logarithmic, e.g. 1 dB attenuation per cycle, then each maximum has fallen to half its original value in this sixth cycle as shown in Figure 3a. The maximum 32 is now 200 times greater, the maximum 42 100 times greater and the maximum 52 10 times greater than the threshold voltage. In a 20th cycle, for example, as shown in Figure 4a, the attenuation is then 20 dB and the digital signal shown in Figure 4b is obtained.

Figure 5a shows the 40th cycle in which there is therefore an attenuation of 40 dB. The maximum 52 is now below the threshold voltage 61 and does not generate a digital signal as shown in Figure 5b. In the 46th cycle the maximum 42 just reaches the threshold as shown in Figure 6a and generates its last digital value (Figure 6b). In this example, the maximum 32 generates the last digital value in the 52nd cycle, although this is not shown in the drawings. The method can now traverse all the preset cycles, e.g. 100 cycles for 100 dB. This would be required if the threshold 61 had been selected at a corresponding depth, i.e. for example 100 dB below the largest relative maximum, in this case maximum 32, as used as a basis for Figure 1 b as well.

Advantageously, however, the method is terminated when no more digital signals are generated. For our example this would give a reconstruction of the analog A-scan shown in Figure 7. The method consequently also has the advantage that information below the threshold voltage is not processed.

The threshold voltage can therefore also be used as an evaluation threshold for the ultrasonic signals.

Since, in this method, the digital values from the shift register are added to the existing contents in the store at each time segment between the individual cycles, the digitalized A-scan is stored in the memory after the last cycle. It can be called for reconstruction as shown in Figures 1 b and 7 or can alternatively be transferred to a long-time store so that the memory is free for a new analog/digital conversion operation.

An example of apparatus by means of which this method can be performed, more particularly with preferably logarithmization and digitalization, will be described in connection with Figure 8 which illustrates a probe 1 having separate transducers for transmission and reception of the ultrasonic pulses.

Any other type of probe may be used, however. This probe is triggered by an ultrasonic transmitter 2 to transmit the ultrasonic pulses. The ultrasonic transmitter is triggered via a pulse delay stage 15 by means of clock pulses on line 73, these pulses being generated by a clock which in this example is part of a microprocessor 11. The pulse delay stage 15 advantageously enables the system to be adjusted for the method by means of the clock pulses on the lines 73, the adjustment being made more particularly to the attenuator, after which the pulse is fed to the transmitter 2 to generate the real-time A-scan. This ensures that the system is already set if there is echo information available immediately after the pulse has been transmitted.In this example the ultrasonic waves are reflected both on the reflector 3a, which is two-dimensional for example, the reflector 3b, which is for example porous, and the back wall of the test piece 4, and are received by the probe 1. The relative maxima 32,42, 52 in Figure 1 a are intended to represent these three echo pulses. The received ultrasonic information is fed as a signal voltage to the amplifier 5. The latter has a pre-amplifier 5b with a setting means for basic adjustment of the amplification and an attenuator 5a adjustable by electrical signals, e.g. in a binary code, and is advantageously an amplifier with a linear amplification characteristic.The attenuator 5a of this amplifier is set to maximum attenuation by a binary counter 18 before the first cycle and is adjusted towards greater attenuation with each clock pulse, preferably in dB-linear stages. The reset and clock pulses are fed to the binary counter for this purpose via lines 72 and 73. A comparator 6 is connected to amplifier 5 via its final amplifier Sc and its comparison voltage can be selected by means of an adjustment device 7, e.g. a potentiometer. This comparison voltage is the equivalent of the threshold voltage 61 in the description of the method. The comparator outputs to a shift register 8 which receives its shift pulses from a pulse generator 13, which in turn receives its start command from the clock pulses of microprocessor 11 via line 73.A delay network 14 preceding the pulse generator 13 enables the start of the shift operation to be selected and a specific time relationship to be established for the transmission pulse emission. A counter 12 counts the shift pulses and stops the pulse generator when a predetermined number of shift operations generally corresponding to the depth of the shift register (256 shift operations in this case) has been reached. This counter is reset between the cycles via the reset line 71. A memory 9 is connected to the shift register and receives the shift register contents between the ultrasonic pulse transmissions.Memory 9 is erased by means of reset line 72 before the first cycle, contains a memory place for each shift stage, i.e. for each time portion, and adds the contents in the individual memory places, these contents being transferred from the shift register between the pulse transmissions. A flip-flop 10 is also connected to the shift register output. It is reset after each cycle via reset line 71 and triggers the clock pulses in the microprocessor 11 if it detects a change of the digital states on transfer of the sift register contents to the store. If the flip-flop does not detect any change in the digital states it is not set and the microprocessor 11 is then advantageously no longer actuated for a new cycle.

The microprocessor 11 then sets the binary counter 18 to the basic position via the reset line 72, and although this is not shown, then transfers the contents of the memory 9 to a long-time storage if required and erases the memory 9 via the reset line 72. The equipment is thus cleared for a new logarithmization and analog/digital conversion process. The equipment also includes a selector switch 17 whereby the threshold voltage set by setting means 7 can be mixed in on the screen of the CR oscilloscope 16, e.g. between the transmission pulses, so that the screen displays both the received A-scan and the threshold voltage. The storage contents can be passed to the CRT 16 via a selector switch 19 in order to display the reconstruction of the logaristhmixed and digitalized A-image.

The method according to the invention thus enables analog signals, particulary for ultrasonic pulse technology, to be converted to digital values by cyclically attenuating consecutive real-time Ascans and comparing them in each cycle with a constant threshold voltage. If this stepwise attenuation is effected preferaly in dB-linear steps, logarith mization of the A-image information is effected simultaneously with the analog-digital conversion.

Claims (6)

1. A method of converting analog electrical signal voltages into digital electrical signal values in non-destructive material testing using ultrasonic pulses, wherein the analog electrical voltage-time function containing the ultrasonic information is cyclically converted to electrical digital values by comparison with a threshold voltage which is increased stepwise each cycle, the time coordinate is divided up into consecutive time segments, the digital values at any time are stored and summed within the time segments, the voltages are amplified with a preselected maximum amplification and compared with a preset threshold voltage in each cycle, and the amplification of the signal voltages for each subsequent cycle is reduced according to a logarithmic graduation.

2. A method according to claim 1, characterised in that the threshold voltage is adjustable.

3. A method according to claim 1, characterised in that the repetition is terminated after the cycle in which the analog signal voltage has no longer exceeded the threshold voltage.

4. Apparatus for converting analog electrical signal voltages into digital electrical signal values comprising: a controllable-gain amplifier coupled to receive signal voltages for logarithmization and digitalization; a microprocessorforgenerating pulses used in the control of the amplifier; a binary counter coupled to the controllable amplifier and to the microprocessor so as to receive the control pulses; a comparator having its inputs coupled to the amplifier and to a potentiometer for producing a threshold voltage; a shift register coupled to the output of the comparator and to a pulse generator for receiving shift pulses therefrom, a counter being provided to stop the pulse generator after a predetermined number of shift pulses has been counted; a memory coupled to the shift register to cyclically receive the shift register contents; ; a flip-flop connected to the connection between the shift register and the memory; the microprocessor being connected to the counter, to the memory, the flip-flop and a delay network, which latter is connected to the pulse generator;

5. A method substantially as hereinbefore described with reference to the drawings hereof with the exception of Figure 8.

6. Apparatus substantially as shown in Figure 8.