GB2131209A - Switch mode power supply - Google Patents

Abstract

A power supply for providing from an a.c. supply a d.c. voltage which is constant irrespective of load, produces a number of different d.c. voltage levels using a single transformer/inverter 4,5. The power supply uses semi-conductor switches in the form of field effect transistors 51-56 which operate at high frequency, eg. 100 kHz. A first regulated output voltage 7 is obtained by feedback control of the FET's 51-56 through an optocoupler 8. Further regulated voltages 110-113 are derived from a winding 43 connected through rectifiers 80-83 to individually-controlled d.c. chopper circuits. A further output can be used to charge a standby battery 141. An HF transformer for use with the circuit includes concentric cylindrical coils with connections at radially extending tabs. <IMAGE>

Description

SPECIFICATION Power supply This invention relates to an electrical power supply.

More particularly, the invention relates to a switch mode power supply for providing from an a.c.

supply a number of different d.c. voltage levels which remain constant irrespective of load. Such units have application in computer systems wherein there is a requirement for number of different d.c.

voltage levels to operate different component parts of the system. In a typical system it is not unusual to find that seven d.c. voltage levels are required e.g.

+5v, + and -12v, + and -24vand + and -48v. Each of these d.c. voltage levels must be accurately controlled irrespective of load and hitherto separate power supply units were provided for each voltage level, each supply unit having its own transformer, inverter and control unit.

According to the present invention there is provided a switch mode power supply comprising a rectifier stage to provide a high level rectified voltage from an a.c. input, an inverter/transformer for generating a controlled low level d.c. voltage from said rectified high level voltage, said high level voltage being fedto said transformer through controlled semi-conductor switches, a low level d.c.

reference voltage control unit for generating a control signal representative of the low level d.c.

voltage output, and a switching control unit responsive to said control signal for switching said semiconductor switches, whereby said low level output d.c. voltage remains constant irrespective of load conditions.

Preferably, said semi-conductor switches are field effect transistors (F.E.T.s).

Preferably also the switching frequency of said switching control unit is 100 KHz.

According to a further aspect of the present invention there is provided multi-level switch mode power supply comprising a rectifier stage to provide a high level rectified voltage from an a.c. input, a single transformer/inverter to generate a master d.c.

voltage, said rectified voltage being supplied to said transformer/inverter through controlled semiconductor switches, and a plurality of d.c. level output stages for generating a plurality of different d.c. voltage levels, each output stage having a d.c.

chopper circuit to derive the desired d.c. level from said master voltage.

Preferably said semi-conductor switches are F.E.T.'s operating at a switching frequency of 100 KHz.

Preferably also, each of said d.c. chopper circuits comprises means for generating a control signal representative of the d.c. voltage output of its respective stage, and switching means responsive to said control signal for controlling a semi-conductor switch in the output of the stage thus to maintain constant the output d.c. level.

Preferably also, said output semi-conductor switch is a F.E.T. operating a switching frequency of 100 KHz.

In the switch mode power supplies of the present invention, the F.E.T.s which control the switching of the input to the inverter/transformer operate at 100 KHz resulting in benefits in the other electronic components of the system. However, operation of a transformer at such high frequencies results in unacceptably low efficiency due to inductive losses at these high frequencies.

Thus, in accordance with yet another aspect of the present invention there is provided a high frequency transformer comprising a core, a primary winding wound on said core, and a secondary winding surrounding said primary winding, said secondary winding being in the form of a number of concentric substantially cylindrical coils formed of strips of electrically conductive material and terminating in radially extending tabs, an insulating layer being provided between adjacent coils and the tab forming the end of one coil being electrically connected to the tab forming the start of an adjacent coil.

Preferably, two coils are provided, the tab forming the start of one coil having a diode mounted directly thereon, the tab forming the end of said one coil being connected electrically to the tab forming the start of the other coil, and the tab forming the end of the other coil having a diode mounted directly thereon, thus to form a high frequency transformer/ rectifier unit.

The novel transformer of the last two preceding paragraphs has application in the switch mode power supply of the present invention.

Embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a general circuit diagram of one embodiment of a switch mode power supply providing a number of different d.c. levels and made in accordance with the present invention; Figure2 is a more detailed circuit diagram showing a switch mode power supply for a single low level d.c. voltage; Figure 3 shows a d.c. chopper circuit for providing a controlled d.c. voltage from a higher level master d.c. voltage; Figure 4 is an end elevational view of a novel high frequency transformer forming part of the present invention; Figure 5 is an side elevational view of the transformer of Figure 4; and Figure 6 is a top plan view of the transformer of Figures 4 and 5.

Referring to Figure 1 of the drawings a switch mode power supply comprises an input 1 for connection to an a.c. power supply. The a.c. voltage is passed through a filter 2 to a rectifier 3. The rectifier 3 includes a voltage selection switch 31 to allow the rectifier to operate at either 240 volts or 120 volts in which case a voltage doubling configuration is used.

The output of the rectifier 3 is a 340 volt high level rectifier voltage which is fed to the primary 41 of an inverter/transformer 4. The supply of the high level rectified voltage to the primary 41 of the transformer 4 is controlled by a bank of semi-conductor switches 5. The semi-conductor switches are field effect transistors (F.E.T.s) 51 to 56, these being devices which exhibit suitable impedance matching characteristics and which are capable of operating adequately at 100kHz being the operation frequency for which the switch mode power supply of the present invention is designed.

The F.E.T.s 5 are controlled by a switching control unit 6 which switches ON the appropriate F.E.T.s for a predetermined length oftime in order that the voltage induced across the secondary 42 of the transformer 4 is at the desired d.c. level, in this case +5 volts. This voltage is available at the +5v outputs 7 which is connected directly to diodes 44 at the centre tapped secondary 42 via smoothing chokes 71 and 72.

The switching control unit 6 is connected via an optocoupler 8 to a low level d.c. reference voltage control unit 10 which generates a control signal representative of the voltage at the output 7.

Accordingly, should the load on the output 7 increase causing a tendency for the voltage across output 7 to decrease, an error signal is generated by the control unit 10 which, in turn, passes a signal via the opto-coupler 8 to the switching control unit 6.

This results in the bank of F.E.T.s 51,52,53 controlling the positive portion of the rectified voltage fed to the primary 41 of the transformer 4 to be switched ON for a longer period of time resulting in a higher voltage being induced in the secondary 42. In this way, the voltage on the output 7 is maintained constant at the preset level. Similarly, in the event of the voltage at the output 7 tending to increase due to a decrease in load, the bank of F.E.T.s 54, 55, 56 is switched ON for a longer period to cause a lower voltage to be induced in the secondary 42.

The transformer 4 includes a further secondary 43 for generating a master d.c. voltage for use in providing other d.c. levels. Generally the other levels that are required are + and - 12 volts and + and 24 volts. In this case, the master d.c. voltage will be in the region of 50 to 70 volts, its precise level being determined by the voltage applied to the primary 41 which is controlled by changes in the 5 volt control circuit.

The master d.c. voltage is applied to a 24 volt channel and a 12 volt channel, positive going pulses being passed by diodes 80 and 81 and negative going pulses being passed by diodes 82 and 83. The master voltage induced in the secondary 43 is reduced to the desired level by chopper circuits 90, 92 and 93 which control respective F.E.T.s 100 and 101, 102 and 103 to provide, via respective smoothing chokes 120,121,122 and 123, the required d.c.

voltage on outputs 110, 111, 112 and 113 in a manner described in more detail with reference to Figure 4.

The output of the +12v d.c. chopper 92 is used to drive a battery charger 140 for a battery module 141.

The battery module 141 provides a +5v standby supply via a suitable regulator 142.

Referring now to Figure 2 there is shown in detail a switch made power supply for a single low level d.c.

voltage, in this case +5v. The unit comprises an input stage 201 having an inverter/transformer210 to the primary 211 of which there is supplied a 340v rectified voltage derived from an a.c. power supply.

This rectified voltage is supplied to the primary 211, under the control of semi-conductor switches in the form of F.E.T.s 212 and 213, the F.E.T. 212 controlling the positive portion and the F.E.T. 213 controlling the negative portion. The voltage supplied to the primary 211 is induced in a secondary 214 of the transformer 210, this voltage being fed to a 5v d.c.

output 207 through smoothing chokes 230 and 231 which are connected to diodes 215,216 mounted on a centre tapped secondary 214 of the transformer 210.

The F.EtT.s 212 and 213 are controlled by a switching control unit 206 which switches the F.E.T.s at 100 KHz and at a mark space ratio such that the voltage induced across the secondary 214 of the transformer 210 is at the desired d.c. level of +5v.

The switching signal for the switching control unit 206 is derived from an switching signal generator unit 205 which includes an oscillator unit 251 which generates the required 100 KHz clock signal which is fed to output gates 252 and 253 through latch circuits 254 and 255. The signals to the gate 253 are derived from the non-inverting output of the latch circuit 254 through a resistor/diode pair 257 which serves to ensure that there is no overlap between the output of gate 253 and the output of gate 252 which is derived from the inverting output of latch circuit 254 through a similar resistor/diode pair 258. The output of the logic gates 252 and 253 is a square wave which has a precise mark-space ratio such as to ensure the correct voltage across the secondary 214 of the transformer 210.The output of the logic gate 253 is fed to the F.E.T. 213through a pair of logic gates 353 and an output pair of F.E.T.s 363. The output from the gate 252 is fed to its respective F.E.T. 212 via a controlling F.E.T. 353 which drives an isolating transformer 372 the secondary of which feeds the F.E.T. 212 through a logic gate 363 and F.E.T. 364.

The mark-space ratio of the signals from gates 252 and 253 are determined by a control signal fed from an opto-coupler 208 which generates an output signal representative of the d.c. voltage at the output 207. More particularly the output signal from the opto-coupler 208 indicates tendencies of the voltage at the output 207 to decrease or increase.

The opto-coupler 208 is driven by a low level d.c.

reference voltage control unit 203 which compares the voltage at the output 207 with a reference voltage determined by diode 232. Any variation of the voltage at output 207 results in an error signal being generated by amplifier 234 the output of which is connected to the opto-coupler 208. Thus, should the voltage across 207 tend to decrease as a result of an increase in load the signal to the inverting input of the amplifier 234 decreases, this voltage being derived from the voltage induced in resistors 235 which results in a higher voltage across the optocoupler input which in turn results in a higher control signal being passed to the unit 205. This signal manifests itself as an increased voltage across resistor 256 which adjusts the mark-space ratio of the signals from output gates 252 and 253 such as to effectively increase the voltage across the primary 211 of the transformer 210. This will increase the voltage induced in the secondary and thus restore the output 207 to the desired level.

Excess current sensing means is provided in the control unit 203 by means of the smoothing choke 231 which is encapsulated with a diode 238. Excess current through the smoothing coke 231 causes the diode 238 to activate the amplifier 239 to cause an inhibiting signal to be passed to the unit 205.

Referring now to Figure 3 there is shown a d.c.

chopper circuit for providing a controlled d.c. voltage from a higher level master d.c. voltage.

The circuit has an input 301 to which there is supplied the higher level master d.c. voltage generally in the range of 50 to 70v to provide, for example, a +24v d.c. supply at the output 302.

The chopper circuit has an output F.E.T. 303 which is switched in accordance with a control signal to vary the mark space ratio of the input voltage to provide at the output 302 the desired low level voltage via a smoothing choke 304. A signal representing the output voltage at 302 is derived at point 305 and passed to the inverting input of amplifier 310. A reference voltage, generated for example across a zener diode, is fed to the non-inverting input of the amplifier 310.

In the event that the voltage at output 302 decreases due, for example, to increase in load, an error signal appears at the output of the amplifier 310 which is summed with a 100 KHz clock signal in gate 320. The output of the gate 320 drives a F.E.T.

321 which passes a square wave to controlling amplifiers 330 which control the F.E.T. 303 in the output line.

A current sensing resistor 340 feeds a current level signal to an amplifier 341 which can generate an inhibit signal in the event of excess current.

Figures 4 to 6 illustrate a high frequency transformer/rectifier unit made in accordance with the present invention.

The transformer comprises a central core 11 around which there is wound a wire primary 12 in a conventional manner.

In accordance with the invention the secondary comprises a number of concentric substantially cylindrical coils formed of strips of electrically conductive material such as copper.

In the embodiment illustrated two such coils 13 and 14 are shown, the coil 13 is located around the coil 14 and is insulated from the coil 14 by glass tape 15 orthe like.

The coil 13 terminates in an lower radially extending tab 13A and an upper radially extending tab 13B, thetab 13Aforming the start ofthe coil 13 and the tab 13B forming the end.

Similarly, the coil 14 terminates in an upper radially extending tab 14A and a lower radially extending tab 14B, the tab 14A forming the start of the coil 14 and the tab 14B forming the end.

The tabs 13B and 14A are electrically connected together by means of a nut and bolt 17 passing through an aperture 16 whereas the tabs 13Aand 148 are bent outwardly and are provided with apertures 13C and 14C on which output diodes can be mounted directly. The direct mounting of the diodes minimises inductive losses when the transformer is used at high frequencies and thus a low-loss high frequency transformer/rectifier unit is provided.

Additional windings may be provided on the core within the cylindrical coils, the assembly being mechanically held together by means of a through bolt 180 passing through a insulating nylon bush 181 located in apertures 18 in the radially extending tabs of the coils.

Modifications and improvements may be incorporated without departing from the scope of the invention.

Claims (12)

1. A switch mode power supply comprising a rectifier stage to provide a high level rectified voltage from an a.c. input, an inverter/transformer for generating a controlled low level d.c. voltage from said rectified high level voltage, said high level voltage being fed to said transformer through controlled semi-conductor switches, a low level d.c.

reference voltage control unit for generating a control signal representative ofthe low level d.c.

voltage output, and a switching control unit responsive to said control signal for switching said semiconductor switches, whereby said low level output d.c. voltage remains constant irrespective of load conditions.

2. A multi-level switch mode power supply comprising a rectifier stage to provide a high level rectified voltage from an a.c. input, a single transformer/inverter to generate a master d.c. voltage, said rectified voltage being supplied to said transformer/ inverter through controlled semi-conductor switches, and a plurality of d.c. level output stages for generating a plurality of different d.c. voltage levels, each output stage having a d.c. chopper circuit to derive the desired d.c. level from said master voltage.

3. A switch mode power supply as claimed in either claim 1 or 2, wherein said semi-conductor switches are field effect transistors.

4. A switch mode power supply as claimed in any preceding claim wherein the switching frequency of said switching control unit is 100 KHz.

5. A switch mode power supply as claimed in any one of claims 2 to 4, wherein each of said d.c.

chopper circuits comprises means for generating a control signal representative of the d.c. voltage output of its respective stage, and switching means responsive to said control signal for controlling an output semi-conductor switch in the output of the stage thus to maintain constant the output d.c. level.

6. A switch mode power supply as claimed in claim 5, wherein said output semi-conductor switch is a F.E.T.

7. A switch mode power supply as claimed in either claim 5 or 6, wherein said switching means operates at a switching frequency of 100 KHz.

8. A high frequency transformer comprising a core, a primary winding wound on said core, and a secondary winding surrounding said primary winding, said secondary winding being in the form of a number of concentric substantially cylindrical coils formed of strips of electrically conductive material and terminating in radially extending tabs, an insulating layer being provided between adjacent coils and the tab forming the end of one coil being electrically connected to the tab forming the start of an adjacent coil.

9. A high frequency transformer as claimed in claim 8, wherein two coils are provided, the tab forming the start of one coil having a diode mounted directly thereon, the tab forming the end of said one coil being connected electrically to the tab forming the start of the other coil, and the tab forming the end of the other coil having a diode mounted directly thereon, thus to form a high frequency transformer/ rectifier unit.

10. A high frequency transformer substantially as hereinbefore described with reference to Figures 4to 6 ofthe accompanying drawings.

11. A switch mode power supply incorporating a high frequency transformer as claimed in any one of claims 8 to 10.

12. A switch mode power supply substantially as hereinbefore described with reference to Figures 1 to 3 of the accompanying drawings.