GB2129651A - Video processors - Google Patents
Video processors Download PDFInfo
- Publication number
- GB2129651A GB2129651A GB08328456A GB8328456A GB2129651A GB 2129651 A GB2129651 A GB 2129651A GB 08328456 A GB08328456 A GB 08328456A GB 8328456 A GB8328456 A GB 8328456A GB 2129651 A GB2129651 A GB 2129651A
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- Prior art keywords
- video signals
- field
- incoming
- fields
- outgoing
- Prior art date
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
- H04N7/0137—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes dependent on presence/absence of motion, e.g. of motion zones
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
A video signal processor for effecting field or frame rate conversion comprises a number of framestores 30-33 connected in series to receive incoming video signals under the control of a first generator 35, which signals are available from the respective field stores under the control of a second generator 36. The presence of respective one line delays 38-41 allow two adjacent lines from the same field to be available for use by respective multipliers and thence to an adder 50. A comparator 52 determines if significant movement is present and modified co-efficients to the multipliers 42-49, made available from a coefficient control 53, so as to allow a single field to pass to the output. Otherwise the output field is generated from a plurality of incoming fields. <IMAGE>
Description
SPECIFICATION
Video processors
This invention relates to a video signal processor for
achieving frame or field rate conversion.
In television standards converters there is a require mentto change the number offields or frames per second from one standard rate to another, orto changethe numberof lines perfield or frame from one
standard rate to another, orto change both. One requirementwhich arises frequently is that of chang
ing from a 525 lines per frame/60 fields per second
standard to a 625 lines perframe/50fields per second
standard, orvice versa, both standards having a 2:1
interlace. The present invention is concerned with a processorforchanging the field or frame rate.
Figure 1 shows a selection offields (a) to (d)
reproduced from a sequence of video signals having a 60Hz field rate and 2:1 interlacing, and a selection of fields (e) to (g) from video signals representing the same scene, but having a 50Hz field rate, also with 2:1 interlacing. The scene is shown as including an object (h) which moves to take up different positions in successive fields. Periodically one ofthe 60Hz fields and one of the 50Hzfields substantially correspond, so as to represent the scene at substantially the same time. Two such 'coincident' fields are depicted at (a) and (e) and the nexttwo at (d) and (g).If thefields(a) lfthefields (a) and (e) are both odd line fields, then (assuming the 60 and 50Hz field rates as stated) the fields (d) and (g) are odd and even line fields respectively, the next two coincidentfields are again odd line fields and soon.
Between the pairs of coincident fields, each 50Hz field represents the scene at a time between two 60Hz fields, the time differentials changing from field to field in a regular manner. This is illustrated by the two 60Hzfields (b) and (c) and the 50Hz field (f) which represents the scene at a time between (b) and (c). In field (f) the moving object should occupy a position between the positions occupied in fields (b) and (c).
However, no video signals are available in the nearest 60Hz field periods, positioned correctly to represent the object (h) as required forfield (f).
This kind of difficulty is encountered generally in field rate conversion and it is aggravated by the fact that when generating, say, an odd line field at the converted rate the incoming field with the least positional error may be either an odd line field or an even linefield. One approach to the problem is merely to produce signals of the desired field rate by selecting for each outgoing field signals from the incoming fields for which the time differential is least. However, if there is substantial movement in the scene the movement becomes disturbingly uneven after the conversion due to the unequal time differentials.
In order to reduce disturbing effects of uneven movement, it has been proposed to employ so called 'persistence' techniques and Figure 2 illustrates a
known arrangement employing this technique. As
illustrated in Figure 2the incoming video signals which will again be assumed to be digital signals of a 60Hz field rate, are applied to a recursive loop including an adder 11 and a framestore 12. During each frame period, the incoming signals are applied to the adder 11 by way a multiplier 10, which multiplies the incoming signals by a co-efficient K (less than unity).The produce is applied to one input terminal ofthe adder 11 and simultaneously there is derived from the framestore 12 corresponding signals resulting from the processing during the previous incoming frame and they are applied to a second multiplier 13 which multiplies the signal by (I-K) and applies the product to the adder 11 to be added to the incoming signal multiplied by K. The resultant sum is in turn fed into theframestore 12. An output portfor the framestore allows the stored signals to be read out at the desired outgoing field rate, 50Hz in this example, to provide the converted signals.With this arrangement, new signals applied to the framestore 11 comprise a proportion ofthe signals from the current frame ofthe incoming signals together with progressively decreasing proportions of corresponding signals from preceding frames. If the original scene included movement, the operation of the arrangement diminishes the visibility of uneven movement after field rate conversion. However, the recursive technique gives rise to an unpleasant smearing when movement is present.
Another priorartapproach to reducingthevisibility ofthe uneven movement is illustrated in Figure 3.
According to this figure afield store 21 is associated with two multiplying circuits 22 and 23 and an adder 24. Incoming digital video signals are applied in parallel to the field store 21 and a multiplying circuit 22. Signals in the field store are retained for reading out in the nextfield period when they are applied to the multiplier 23. In the multiplier 22 the incoming signals are multiplied by a predetermined co-efficient
KA and the product is applied to one input of the adder 24. Coincidently, the signals read from the fieldstore are applied to the other multiplier 23 to be multiplied by a co-efficient K5 which may be equal to (1 -KA), and the product is applied to a second input ofthe adder 24.Each signal read out from the store is arranged to be the signal in the line immediately above (or below) the signal read into the field store at the particular time. The arrangement is not recursive and gives an improved result over the Figure 2 arrangements.
Nevertheless, when there is movement in the scene being televised some smearing still occurs and the combination signals from adjacent lines in two fields reduces the resolution ofthe system. In practical applications of the Figure 3 arrangement, the video signals are fed to the multiplier circuits 22 and 23 at the appropriate rate for producing the converted field rate but the means for producing the field rate convertion is not shown in the Figure. It should also be noted that neither Figure 1 or Figure 2 illustrates means for achieving line rate conversion.
One object of the present invention is to provide an improved video signal processor and method for effecting frame or field rate conversion, with a view to reducing the visibility of uneveness which tends to be introduced when the video signals portray a moving scene.
According to the present invention there is provided a video signal processor for effecting field or frame rate conversion comprising, storage means having the capacity to store video signals in a plurality of incoming fields oftelevision signals, input means for writing applied signals in said storage means at a field rate to make video signals in a plurality of said incoming fields available for processing, processing meansfor deriving video signals from said storage means at a second and dissimilarfield rate to generate a plurality of outgoing fields of video signals, said processing means having a first mode of operation in which the video signals forming an outgoing field are derived from video signals taken into said storage means from a single incorning field, said processing means having another mode of operation in which the video signals forming an outgoing field are derived by combining video signals taken into said storage means from a plurality of incoming fields, means for comparing video signals in different fields to indicate whether or notthere was substantial movement in the televised scene, meansforselectingthefirst mode of operation of said processing means in response to an indication of no substantial movementfrom said comparing means, and means for selecting the other mode of operation of said processing means in response to an indication of substantial movement from said comparing means.
Further according to the invention there is provided a video signal processor for effecting scan rate conversion comprising, storage means having the capacity to store video signals in the plurality of area scans of a scene, input means forwriting applied signals in said storage means at a first area scan rate to make video signals in a plurality of area scans available for processing, processing meansforderiv- ing video signals from said storage means at a second and dissimilar area scan rate to generate a plurality of outgoing area scans of video signals, said processing means having a first mode of operation in which the videosignalsforming an outgoing area scan are derived from video signals taken into said storage means from a single incoming area scan, said processing means having another mode of operation in which the video signals forming an outgoing area scan are derived by combining video signals taken into said storage means from a plurality of incoming area scans, means for comparing video signals in different area scans to indicate whether or not there was substantial movement in the scene, means for selecting thefirst mode of operation of said processing means in response to an indication of no substantial movementfrom said comparing means,
and meansforselecting the other mode of operation
of said processing means in response to an indication
of substantial movementfrom said comparing means.
According to a further aspect of the invention there
is provided a method of processing video signals for
effecting field or frame rate conversion comprising,
storing video signals incoming at a first field rate to
make video signals in.a plurality of incoming fields
available for processing, deriving video signals from
said storage means at a second and dissimilarfield rate to generate a plurality of outgoing fields of video signals, in eitheroftwo modes, in one ofwhich an outgoing field is derived from video signals stored from a single incoming field, and in the otherfield of which an outgoing field is derived by combining video signals stored from a plurality of incoming fields, comparing video signals in differentfieldsto indicate whether or notthere was substantial movement in the scene, selecting said first mode of operation in response to an indication of no substantial movement from said comparison and selecting said other mode of operation in response to an indication of substantial movement from said comparison.
The invention will now be described byway of example with reference to the accompanying drawings in which:
Figure 1 shows images reproduced from thetelevi- sion signals having different field rates;
Figure 2 shows one known arrangement utilised in frame rate conversion;
Figure 3 shows an alternative known arrangement; Figure4showsan embodimentofa processor according to the present invention.
The processor illustrated in Figure 4 comprises four field stores 30-33 and successive fields of incoming video signals are written into the store so as to be available for use by respective ones ofeightmulti- pliers 42-49. The outputs ofthe multipliers are fed to a single adder 50, the output of which provides the signals ofthe converted field rate. As shown, the output of each field store is applied to two respective multipliers, in one case directly and in the other case via a one-line period delay, as denoted by the references 38-41. Therefore video signals can be applied concurrentlytothe adder 50 from two adjacent lines in the field of signals stored in the respective store at any one time, to synthesise one interlaced line of an alternate field.The multipliers 42-49 multiplythevideo signals applied to them by respective co-efficients denoted in the drawings as K to K8. The two co-efficientsforanyonefield store, for example K1 and K2forfield store 30, achieve an averaging effectwhen it is desired to synthesise an interlaced lined as referred to above.
In practice,thevalues ofthe co-efficients K1 to K8 used at anytime are chosen in dependence on the time differentials between the outgoing field being manipulated and the incoming fields from which it is being synthesised. The rate at which data is written into the stores 30-33 is controlled in a generator 35 which produced write clock pulses and is locked to incoming syncs. The read out rate from the stores 30-33 is, in turn, determined by the generator 36 which
produces read clock pulses and is locked to local
reference syncs.
A comparator 52 is provided which compares video signals output from field store 30 with video signals from field store 32 and co-operates with co-efficient
control 53 which may include a look-up table for
values of K, to selectthe one or more co-efficients K1 to
K8 depending on whetherthe comparator 52 detects
interframe movement or not. Typically, when no
interframe movement is detected, one co-efficient K is
made equal to 1 and the remaining co-efficients are made equal to zero. In n this case the outputfrom the adder 50 is solely derived from the field store for which the co-efficient K is unity. If interframe movement is occu ring, co-efficients K are selected to interpolate between two incoming fields producing an output field which simulates the scene atthe appropriate time between the two incoming fields.Averaging is effected bythe one line delay (say 38) and the two multipliers (say 42 and 43) for one of the two field stores used for interpolation, when picture movement is present, so that the interpolation is carried out between lines ofthe kind (odd or even) required for the outgoing field. The effectofthe averaging, together with any smearing due to the interpolation is less objectionable to the human eye when the scene contains movement, than the uneven movement which is more noticeable otherwise. Slight softening of the picture reproduced from the signals coming from the adder 50 will however occur due to the averaging effect. Interpolation of more than two fields may be allowed for, if desired, by increasing the number of field-stores and relating circuit elements.
The circuit illustrated has the advantage of flexibility and byway of example one mode of converting from a field rate of 60Hz to one of 50Hz will be described. It will be assumed that the video signals in a 60Hz field are in process of being written into field store 30 and that video signals from preceding 60Hzfields are held in field stores 31,32 and 33. Assume also, in the first instance, that no substantial movement in the scene is detected by the comparator 52.
On these assumptions, video signals are read at the 50Hzfield rate from field store 31 or 32, say store 31, the co-efficient K3 being selectedto be unity by the control 53, and all other co-efficients being zero. If, however, substantial movement has been detected by the comparator 52 the video signals at the 50Hz rate are generated by interpolation between field stores 31 and 32. To achieve this the control 52 again selects the co-efficient K4to be zero but now selects K3 to have a value appropriate to the time differential between the S0Hzfield being synthesised and the 60Hz field in the store 31. The control 53 also selects the co-efficients K5 and K6to be each one half ofthe complement of K3.
Interpolation is carried out between the signal elements ofthe lines in store 31 and the signal elements ofthe equivalent lines synthesised by averaging the lines immediately above and below in field store 32.
The store (31 or 32), of which the output is averaged, depends on which one contains the same lines (odd or even) as the field to be synthesised. Before the synthesis of the 50Hz field is completed, a new60Hz field may start and this new field is read into field store 33 leaving the signals in 30 and 31 availablefor synthesising the next 60Hz field. Preferably the co-efficient control 53 is set up to store a range of co-efficients for the multipliers 42-49 sufficient to cover the range oftime differentials which may occur
between the 50Hzfields and the 60Hz fields from which they are interpolated, the control 53 being arranged to selectthe co-efficient and its complement, corresponding to the time differentialsforthefield
being generated.The appropriate time differential for
each field can be evaluated by comparing the incom
ing syncswith the local referencesyncs.
When there is substantial coincidence between a 60Hz field and a 50Hz field, interpolation is dispensed with even ifthere is movement in the scene, since the co-efficient Kwould b unity. Averaging may, however, be affected if one of these fields is an odd line field and the other an even line field.
If line rate conversion is also required, as will usually be the case, suitable means for performing this conversion may be connected to the arrangements shown in Figure4, operating on either the incoming signals or the outgoing signals. The invention is not confined to converting the field rate from 60Hzto 50Hz; it can also be employed for the inverse conversion and for other conversions from onefield rate to another. It will be understoodthatthere will be a time lag between the incoming fields and the respective outgoing fields and indeed the arrangement need not operate in real time. The references herein to time differential referto the time interval between different views of the original scene being televised.
The invention could also be applied ifthe field stores such as 30 to 33 are replaced byframestores.
Claims (8)
1. Avideo signal processorforeffecting field or frame rate conversion comprising:
storage means having the capacityto store video signals in a plurality of incoming fields of television signals;
input means for writing applied signals in said storage means at a first field rate to make video signals in a plurality of said incoming fields available for processing;
processing means for deriving video signals from said storage means at a second and dissimilarfield rate to generate a plurality of outgoing fields of video signals;
said processing means having a first mode of operation in which the video signals forming an outgoing field are derived from video signalstaken into said storage means from a single incoming field;;
said processing means having another mode of operation in which the video signalsforming an outgoing field are derived by combining video signals taken into said storage means from a plurality of incoming fields;
means for comparing video signals in different fields to indicate whether or not there was substantial movement in the televised scene;
means for selecting the first mode of operation of said processing means in response to an indication of no substantial movementfrom said comparing means; and
means for selecting the other mode of operation of said processing means in response to an indication of substantial movement from said comparing means.
2. A processor as claimed in Claim 1, wherein said processing means, in said other mode, is arranged to derive the video signals forming an outgoing field by combining video signals in two lines of one incoming field, with video signals in the interlaced line in an adjacent incoming field.
3. Aprocessorasclaimed in Claim 1,wherein said processing means comprises means for multiplying video signalstaken into the storage meansfrom different incoming fields by respective co-efficients, meansfor adding the products, and means from which co-efficients of different values, including zero, can be selected to change the mode of operation of said processing means in response to indications given by said comparing means.
4. A processor as claimed in Claim 1,wherein selected co-efficients are related to the time differentials between the outgoing field and the respective incoming fields.
5. A video signal processor for effecting scan rate conversion comprising :
storage means having the capacity to store video signals in the plurality of area scans of a scene;
input means for writing applied signals in said storage means at a first area scan rate to make video signals in a plurality of area scans available for processing;
processing means for deriving video signals from said storage means at a second and dissimilar area scan rate to generate a plurality of outgoing area scans of video signals;
said processing means having a first mode of operation in which the video signals forming an outgoing area scan are derived from video signals taken into said storage means from a single incoming area scan;;
said processing means having another mode of operation in which the video signals forming an outgoing area scan are derived by combining video signals taken into said storage means from a plurality of incoming area scans;
means for comparing video signals in differentarea scansto indicate whether or notthere was substantial movement in the scene; meansforselecting the first mode of operation of said processing means in response to an indication of no substantial movementfrom said comparing means; and
means for selecting the other mode of operation of said processing means in response to an indication of substantial movementfrom said comparing means.
6. A method of processing videosignalsfor effecting field orframe rate conversion comprising: storing video signals incoming at a firstfield rateto make video signals in a plurality of incoming fields availablefor processing;
deriving video signals from said storage means at a second and dissimilarfield rate to generate a plurality of outgoing fields of video signals, in either of two modes;
in one of which an outgoing field is derived from video signals stored from a single incoming field, and in the other of which an outgoing field is derived by combining video signals stored from a plurality of incoming fields;
comparing video signals in differentfieldsto indicate whether or notthere was substantial movement in the scene; ;
selecting said first mode of operation in response to an indication of no substantial movement from said comparison; and
selecting said other mode of operaton in response to an indication of substantial movement from said comparison.
7. Avideo signal processor for effecting field or frame rate conversion substantially as described hereir .ldwith reference to Figure 4 of the accom- panying drawings.
8. A method of processing video signaisfor effecting field or frame rate conversion as claimed in
Claim 6 and substantially as described herein.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08328456A GB2129651B (en) | 1982-10-28 | 1983-10-25 | Video processors |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8230877 | 1982-10-28 | ||
GB08328456A GB2129651B (en) | 1982-10-28 | 1983-10-25 | Video processors |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8328456D0 GB8328456D0 (en) | 1983-11-23 |
GB2129651A true GB2129651A (en) | 1984-05-16 |
GB2129651B GB2129651B (en) | 1986-08-06 |
Family
ID=26284251
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08328456A Expired GB2129651B (en) | 1982-10-28 | 1983-10-25 | Video processors |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2129651B (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0187641A1 (en) * | 1985-01-07 | 1986-07-16 | Nippon Hoso Kyokai | TV system conversion apparatus |
EP0264966A2 (en) * | 1986-10-24 | 1988-04-27 | The Grass Valley Group, Inc. | Interpolator for television special effects system |
GB2205707A (en) * | 1987-06-09 | 1988-12-14 | Sony Corp | Television standards converters |
EP0311268A1 (en) * | 1987-09-26 | 1989-04-12 | Quantel Limited | Method and apparatus for producing slow motion television pictures |
WO1991006182A1 (en) * | 1989-10-20 | 1991-05-02 | Snell & Wilcox Limited | Digital television standards conversion |
WO1994016526A1 (en) * | 1993-01-14 | 1994-07-21 | Rca Thomson Licensing Corporation | Field elimination apparatus for a video compression/decompression system |
FR2702914A1 (en) * | 1993-03-17 | 1994-09-23 | Philips Laboratoire Electroniq | Device for coding series of images consisting of film-type images and of video-type images, and corresponding decoding device |
GB2305804A (en) * | 1995-09-30 | 1997-04-16 | Samsung Electronics Co Ltd | Interpolating pixels for video signal scanning format conversion |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0018856A1 (en) * | 1979-05-08 | 1980-11-12 | British Broadcasting Corporation | Television display system |
GB2113942A (en) * | 1982-01-25 | 1983-08-10 | British Broadcasting Corp | Television display system |
-
1983
- 1983-10-25 GB GB08328456A patent/GB2129651B/en not_active Expired
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0018856A1 (en) * | 1979-05-08 | 1980-11-12 | British Broadcasting Corporation | Television display system |
GB2050109A (en) * | 1979-05-08 | 1980-12-31 | British Broadcasting Corp | Television display system |
GB2113942A (en) * | 1982-01-25 | 1983-08-10 | British Broadcasting Corp | Television display system |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4663665A (en) * | 1985-01-07 | 1987-05-05 | Nippon Hoso Kyokai | TV system conversion apparatus |
EP0187641A1 (en) * | 1985-01-07 | 1986-07-16 | Nippon Hoso Kyokai | TV system conversion apparatus |
EP0264966A2 (en) * | 1986-10-24 | 1988-04-27 | The Grass Valley Group, Inc. | Interpolator for television special effects system |
EP0264966A3 (en) * | 1986-10-24 | 1991-02-13 | The Grass Valley Group, Inc. | Interpolator for television special effects system |
GB2205707B (en) * | 1987-06-09 | 1991-09-04 | Sony Corp | Television standards converters |
GB2205707A (en) * | 1987-06-09 | 1988-12-14 | Sony Corp | Television standards converters |
US5105313A (en) * | 1987-09-26 | 1992-04-14 | Quantel Limited | Method and apparatus for producing slow motion television pictures |
EP0311268A1 (en) * | 1987-09-26 | 1989-04-12 | Quantel Limited | Method and apparatus for producing slow motion television pictures |
WO1991006182A1 (en) * | 1989-10-20 | 1991-05-02 | Snell & Wilcox Limited | Digital television standards conversion |
US5255091A (en) * | 1989-10-20 | 1993-10-19 | Snell & Wilcox Limited | Digital television standards conversion |
AU648759B2 (en) * | 1989-10-20 | 1994-05-05 | Snell & Wilcox Limited | Digital television standards conversion |
WO1994016526A1 (en) * | 1993-01-14 | 1994-07-21 | Rca Thomson Licensing Corporation | Field elimination apparatus for a video compression/decompression system |
TR27398A (en) * | 1993-01-14 | 1995-02-28 | Rca Thomson Licensing Corp | Area extraction device for a video compression / decompression system. |
FR2702914A1 (en) * | 1993-03-17 | 1994-09-23 | Philips Laboratoire Electroniq | Device for coding series of images consisting of film-type images and of video-type images, and corresponding decoding device |
GB2305804A (en) * | 1995-09-30 | 1997-04-16 | Samsung Electronics Co Ltd | Interpolating pixels for video signal scanning format conversion |
GB2305804B (en) * | 1995-09-30 | 1997-08-20 | Samsung Electronics Co Ltd | Method and apparatus for interpolating pixels for format conversion |
US5808688A (en) * | 1995-09-30 | 1998-09-15 | Samsung Electronics Co., Ltd. | Method and apparatus for interpolating pixels for format conversion |
Also Published As
Publication number | Publication date |
---|---|
GB2129651B (en) | 1986-08-06 |
GB8328456D0 (en) | 1983-11-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PE20 | Patent expired after termination of 20 years |
Effective date: 20031024 |