GB2128456A - Improvements in or relating to data transmission and receiving systems - Google Patents

Improvements in or relating to data transmission and receiving systems Download PDF

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Publication number
GB2128456A
GB2128456A GB08228081A GB8228081A GB2128456A GB 2128456 A GB2128456 A GB 2128456A GB 08228081 A GB08228081 A GB 08228081A GB 8228081 A GB8228081 A GB 8228081A GB 2128456 A GB2128456 A GB 2128456A
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Prior art keywords
receiver
test pattern
setting
data
response
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GB08228081A
Inventor
Sudhir Sharan Dikshit
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STC PLC
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Standard Telephone and Cables PLC
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Priority to GB08228081A priority Critical patent/GB2128456A/en
Publication of GB2128456A publication Critical patent/GB2128456A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/04Control of transmission; Equalising
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03012Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03133Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a non-recursive structure

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

A data transmission and receiving system employs an arrangement for rapidly setting up a receiver equaliser to conform with the response characteristics of the transmission channel. The arrangement utilizes correlation (14) and corrective circuits (15) in the receiver (11) which serve to set the equalization circuits (not shown) in accordance with the channel response. Prior to the transmission of normal data a test pattern signal with a short second segment representing a leaning pattern of pseudo-random digital pulses is transmitted, stored at the receiver, and correlated (14) with a fixed training pattern to produce an estimate of the channel response. If the channel is reasonably good or setting up time is restricted this response may be used to set the equaliser. Otherwise the response is corrected (15) to produce a more accurate representation of the channel response before being used to set the equaliser. The first segment of the learning pattern is used to set the receiver a.g.c. and timing circuits. <IMAGE>

Description

SPECIFICATION Improvements in or relating to data transmission and receiving systems The present invention relates in general to data transmission and receiving systems and more particularly to a method of and arrangement for rapidly setting a receiver to conform with the response characteristics of a channel linking the receiver to a transmitter prior to the normal transmission of data.
The ;nvention has particular, but not sole, application in high speed PSK data modem systems where the communications channel is a telephone line.
In various data transmission and receiving systems where signals are transmitted over some distance, it is essential to provide equalization means in the receiver to compensate for distortion in the communications channel. Various techniques have been adopted in the past which involve sending pulses along the channel and setting the equalization means analytically. Problems arise however where the channel is very noisy and the time necessary to set the taps on the equalization means affects the efficiency of the system. A general object of the present invention is to provide an improved arrangement for, and method of, setting the receiver in accordance with the channel response characteristics.
The present invention is characterized by an extremely rapid correlation process which utilizes a learning test pattern digital signal train and a training pattern correlated therewith. The learning test pattern is preferably a series of random or pseudo-random digital elements transmitted at the normal transmission rate of the system just prior to the normal transmission of data. The correlation process can provide a useful simulation of the channel response which can in itself be utilized in setting up the equalization means as an approximation. This may suffice where the channel imposes low distortion or where a relatively large number of bits is present in the learning pattern. Otherwise, it is preferred to introduce a corrective process based on stored data or algorithms to provide a more accurate output for the equalization means.This corrective process can then mitigate errors due to the rapidity of the learning pattern. A test pattern signal can be utilized which is composed of two sequential segments; namely a first segment of regular digitial pulses used for setting up at least the agc and timing control circuits of the receiver and a second segment which is composed of a random or pseudo-random learning pattern sequence of digital pulses which is correlated with said known training pattern. By correctly setting up the a.g.c., timing synchronization and detection circuits, for example, using the first segment the subsequent part of the signal used for correlation purposes can produce a reasonably accurate estimate of the channel response despite expected errors of up to two symbols or elements when the correlation process starts.A typical learning pattern sequence would contain perhaps fifteen binary digits although longer learning patterns can be employed.
In one aspect the present invention provides in a data transmission and receiving system a fastacting arrangement for setting the receiver to conform with the response of a communications channel linking the receiver to a transmitter prior to the normal transmission of data; said arrangement comprising test pattern responsive control means for receiving a test pattern digitial signal generated at the transmitter and for correlating at least part of said received test pattern signal with a known training pattern to produce an output utilized in setting equalization means in the receiver prior to said normal transmission of data.
In another aspect the present invention provides in a data transmission and receiving system a method of rapidly setting the receiver to conform with the response of a communications channel linking the receiver to the transmitter prior to the normal transmission of data; said method comprising transmitting a test pattern digital signal over the channel to the receiver and correlating at least part of the received test pattern signal with a known training pattern to provide an output utilized in setting equalization means in the receiver prior to said normal transmission of data.
The invention may be understood more readily and various features of the invention may become apparent from consideration of the following description.
An embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, wherein: Figure 1 is a block schematic diagram depicting a data transmission and receiving system constnicted in accordance with the invention; Figure 2 is a block schematic diagram depicting part of the transmitter of Figure 1; Figure 3 is a block schematic diagram depicting part of the receiver of Figure 1; Figure 4 depicts the test pattern signal waveform provided by the pattern generator of the transmitter; Figure 5 is a flow diagram depicting the operative sequence in which the receiver responds to the test pattern signal; Figure 6 depicts a typical response function produced in the receiver; Figure 7 is an equivalent circuit representation of distortion produced in a transmission channel;; Figure 8 is a block schematic diagram depicting the correlation means of the receiver; and Figure 9 is a block schematic diagram depicting the correction means of the receiver.
Figure 1 depicts a data transmission and receiving system where the transmitter is designated 10, the receiver is designated 11 and a transmission channel 12 establishes communication therebetween.
The transmitter 10 receives at input A a sequence of digital data provided by some terminal device while the receiver reproduces the data at output B desirably without error. The channel 12 can take a variety of forms but is typically a base-band channel represented in the other Figures of the drawings as a two-cable transmission line 4, 4', 6, 6'. Various ancilliary devices such as digital shaping and low pass filters, modulators and demodulators, digital-to-analog and analog-to-digital converters, encoders and decoders, analog shaping and low-pass fiiters, timing synchronizing and control, equalization circuits and a.g.c. would normally be incorporated in the overall system.In accordance with the invention, the transmitter 10 is provided with pattern generator means 13 (Figure 2), while the receiver 11 is provided with a corresponding test pattern response control means with correlation and corrective means 14, 1 5 (Figures 3, 8 and 9) responsive to a test or learning pattern signal produced by the generator means.
As shown in Figure 2, the generator means 1 3 is composed of a generator 1 6 providing the test pattern signal TS, a digital switch 1 7 and a control device 1 8 which serves to operate the switch 1 7.
Figure 2 shows the digital switch 1 7 in the state when the generator 1 6 is in operation. Channel input line 4 is thus connected to the output 3 from the generator 1 6 carrying the test pattern signal TS, while channel input line 4' is connected via line 3' to earth. The switch 17 is set via a line 5 from the control device 1 8 in response to a timing signal P. The generator 1 6 is also connected via a line to the device 1 8 so as to reset the switch 1 7 once the test pattern signal TS has been transmitted over the line 4. The control device 1 8 sets the switch 1 7 in the state depicted in Figure 2 in response to the timing signal P whenever the transmitter 10 is first energized.Once the test pattern signal TS has been transmitted, the switch 1 7 connects the input channel lines 4, 4' to the transmitter lines 2, 2' (Xl, XQ) so that the normal transmission of data can take place. Figure 4 depicts the waveform of the test pattern signal TS. This signal TS is composed of a sequence of digital pulses which occur at the normal symbol transmission rate of the system. The test pattern signal waveform is essentially composed of two sequential segments; nameiy a first segment S1 with n1 phase reversals, i.e. simple alternate binary transistions +1 and -1 and a second segment S2 with n2 pseudo-random binary pulses. Typical values for n1 and n2 would be 14 and 1 5 respectively. The generator 16 per se can be of known design.
Figure 5 depicts the sequence in which the receiver 11 extracts information from, and responds to, the test pattern signal TS. The segment S1 typically causes the a.g.c. circuit, carrier detection and the synchronization of timing or clock pulses to be tested and set while the segment S2 provides a learning pattern which tests the impulse response of the receiver 11 to the channel 12 for setting the necessary equalization circuit in the receiver 11.
Figure 3 depicts the test pattern responsive control means in the receiver 11 responsive to the test pattern signal TS. As shown, this control means is composed of a correlation or convolution means 14, a correction means 1 5 and setting means 1 6 for setting the a.g.c., timing and equalization control circuits of the receiver 11. In a similar manner to the generator means 13 of the transmitter 10, a digital switch 17 is controlled via a line 12 by a control device 1 8. Figure 3 represents the switch 1 7 in the state where the test control means is in operation.Channel output line 6 (Yl), corresponds to the input line 4, is thence connected to the correlation means 14 via an input line 8 while channel output line 6', corresponding to the input line 4', is connected to the correlation means 1 4 via an input line 8'. The correlation means 14 feeds the correction means 1 5 via lines 10, 10' and an enable/disable control signal line also connects the correlation means 14 to the correction means 1 5. The correction means 1 5 connects Vi3 lines 11, 11' with a control unit 1 9 including the setting means 1 6. The control unit 1 9 represents the a.g.c., timing and equalization control circuits of the receiver 11.When the test pattern signal TS is initially received, the switch 17 by-passes the correlation and correction means 14, 1 5 and connects the channel output lines 6, 6' directly to the control unit 1 9 for setting the a.g.c. and timing control circuits during the first segment S1 of the test pattern signal TS. When the segment S1 has been completed an enable signal passes from the unit 1 9 to the device 1 8 to cause the switch 1 7 to assume the state represented in Figure 3 with the output lines 6, 6' now feeding the correlation and correction means 14, 1 5. During the segment S2 of the test pattern signal TS the channel response is rapidly evaluated and the equalization circuits set in accordance with this evaluation.Atypical response function for the channel using PSK modulation is shown in Figure 6 with the equivalent circuit denoting inter-symbol and cross-symbol distortion shown in Figure 7. The correlation means 14 receives the learning pattern symbol sequence of segment S2 of the test pattern signal TS and produces a corresponding output representing the impulse response sample estimates.
Figure 8 depicts one form for the correlation means 1 4. Although conventional correlation techniques utilize multiplication operations because binary data is processed, the correlation means 14 of Figure 1 employs additive and subtractive operations. As represented in Figure 8 the input lines 8, 8' to the correlation means 14 feed two parallel data store sets ST1, ST2. The sets ST1, ST2 act as shift registers and data progresses along the individual stores Yl1-Yl29 and YQ15-YG29 at the received symbol rate under the control of clock pulses from a clock 82. Each set ST1, ST2 contains a total number of stores corresponding to the value n2 in the segment S2 of the test pattern signal TS. In the example given, n2 is 1 5 but this is merely representative. In general, the correction means 1 5 will receive the correlated sampled output on lines 10, 10' and an enable signal from a control device 83 when the samples Yl ni + n2 and Yon1 + n2 appear at store locations a and b, respectively signifying the sets ST1, ST2 have become full. Each set ST1, ST2 feeds data bus 1 and data bus 2 via resistors R1.
Data bus 1 and 2 for each set ST1, ST2 drive operational amplifiers 80, 81 connected in series to the lines 10, 10'.
If the desired response learning pattern is represented as Xn1 + 1 Xn1 ..... X,1 + n2 the resistor connections from the individual stores to data bus 1 and 2 of each set ST1, ST2 will be as follows: If Xn1 + i = -1 then the connection (!) from the stores Yl15,YQ15 is made to data bus 2 as shown but otherwise to data bus 1 for all values of i 1 < i # n2.
If a number g of impulse response samples is desired, the correlation process will progress until data samples Yl29 + 9 ~ 1 and YQ29 + 9 ~ 1 appear at the store locations a and b, respectively. Each time a shift pulse is received and clocked, the previous stored samples in locations c and d are lost. The input to the correction means 15 will be disabled when samples YZ1 + n2 + and YQn1 + n2 + g appear at the store locations a and b respectively giving the desired g response samples.
Figure 9 depicts one form for the correction means 1 5 having as an input the sampled output on lines 10, 10' from the correlation means 14. The correction means 15 employs muitipliers denoted 0,- enabling devices E, summing devices 90, 91, 92, a clock 93, a counter 94, a decoder 95 and further data store sets ST5, ST6. The correction means 15 feeds the equalization circuits via output lines 11, 11'.
The I and Q correlated line response sample estimates obtained on the lines 10 and 1 0' are denoted by hi and pi respectively, and the corrected I and Q line response samples obtained from lines 11 and 11' by h'j and p' respectively, where 1 # i # g. When the input to the correction means 15 is disabled after g estimates on each line, the input on the lines 10, 10' is disabled, at which time the two data store sets ST1, ST2 have become full of impulse response sample estimates. The data store ST5 in Figure 9 consists of 2g-1 storage locations whose contents can be shifted under control of clock pulses.The data store ST6 consists of g storage locations whose contents are permanently stored. The contents-of the data store ST5 are set from a ROM which contains the values of R'1, R'2... R'g g-1 each time the transmitter 10 goes 'on-line'. The values of the various constants, such as R', for 1 # i # g - 1 and R0j for 0 < j # g - 1, are dependent on the length and type of impulse response training pattern, and are, therefore, design parameters already decided for a particular system at the design stage. The selection of these constants will be described hereinafter later.When the data stores ST1 and ST2 of Figure 8 becomes full, the correction means 15 is validated and the decoder 95 enables the store R0,0 for an initial setting of the counter 94. The following output is then obtained on lines 11 and 11':
and
The first clock pulse from the clock 93 is now applied to the counter and decoder 94, 95 to enable store R0.1 while disabling R0 for i + 1.This clock pulse also shifts left by one place the contents of data store ST5 and the following output is obtained from lines 11 and 11':
and
Similarly when the second clock pulse is applied, the following output is obtained from lines 11 and 1 1':
and
Generalizing the above equations for (i-1 )th clock pulse, the following output is obtained from the lines 11 and 11':
and
for 1 # i # g where Rto = O, ho = 0, Po = 0, and h'i and p1 are the corrected impulse response samples obtained from the lines 11 and 11'.
After g-1 clock cycles from the instant the correction means output is enabled the correct estimate of the channel impulse response becomes available for utilization as tap setting algorithms by the equalization circuits networks.
The values of the constants R'l and R0.1 are obtained as follows: If the desired response training pattern is again represented by xn1 + 1' xn1 + 2' ..., xn1 + n2' then its autocorrelation functions can be determined as
Defining Toeplitz matrix RT as follows:
where Ri = 0 for i n2 - 1 Then the inverse of matrix RT can be found which will be
such that RT RT-1 = I where I represents a unit matrix.
From Equation (11) it will be apparent that the various constants R'1 and R' , are in fact elements of the inverse matrix of RT. Furthermore since RT is symmetric positive definite matrix, its inverse will always exist, and, therefore, an appropriate solution can always be realized.The diagonal elements of the matrix RT1 have a further property, such that: g Ro,i-1 = Ro.g-i for 1 # i # - if g is even Equ. (12) 2 or g + 1 Ro.i-1 = Ro.g-i for 1 # i # - if g is odd Equ. (13) 2 Normally, the length and pattern of the elements of the impulse response learning sequence will be fixed during the design stage of the receiver, and so would the maximum length 'g' of the impulse response likely to occur. The values of the constants R'i and- Rto will, therefore, be fixed and known during the construction of the correction means, If the receiver 11 is intended to operate on reasonably good transmission lines and/or the time taken by the correction means 1 5 to operate is not acceptable, i.e. for ultra-fast start-up of the system, the correction means 15 can be by-passed by appropriate by-pass means and approximate estimates of the channel characteristics can be obtained by linking the lines 10 and 10' to the lines 11 and 11' respectively. In such circumstances however a longer training pattern should be used, a typical figure being 31 symbol elements or more.

Claims (12)

1. In or for a data transmission and receiving system a fast-acting arrangement for setting the receiver to conform with the response of a communications channel linking the receiver to a transmitter prior to the normal transmission of data; said arrangement comprising test pattern responsive control means for receiving a test pattern digital signal generated at the transmitter and for correlating at least part of said received test pattern signal with a known training pattern to produce an output utilized in setting equalization means in the receiver prior to said normal transmission of data.
2. An arrangement according to claim 1, wherein the correlation means provides only a sampled estimation of the channel response and there is provided correction or compensation means which provides a more accurate correct output directly utilized by said equalization means.
3. An arrangement according to claim 1 and 2, wherein said test pattern signal includes a first segment of regular digital pulses used for setting up at least the agc and timing control circuits of the receiver and a second segment which is composed of a random or pseudo-random learning pattern sequence of digital pulses which is correlated with said known training pattern.
4. An arrangement according to claim 1, 2 or 3, wherein the correlation means is adapted to perform sequential additive and subtractive operations on the test pattern signal which is received and stored.
5. A data transmission and receiving system incorporating an arrangement according to any one of the preceding claims.
6. A system according to claim 6, wherein the transmitter incorporates generating means for generating said test pattern signal and there is provided switching control means for selectively operating the generating means and the correlation means when the transmitter is first energized for operation prior to the normal transmission of data and for isolating said generating means and the correlation means from the communications channel once the test pattern signal has terminated.
7. A system according to claim 5 or 6, and incorporating an arrangement according to claim 2, wherein there is further provided means for selectively by-passing the correction means.
8. In or for a data transmission and receiving system a method rapidly setting the receiver to conform with the response of a communications channel linking the receiver to the transmitter prior to the normal transmission of data; said method comprising transmitting a test pattern digital signal over the channel to the receiver and correlating at least part of the received test pattern signal with a known training pattern to provide an output utilized in setting equalization means in the receiver prior to said normal transmission of data.
9. A method according to claim 8, wherein the test pattern signal includes a first segment of regular digital pulses used for setting up at least the a.g.c. and timing control circuits of the receiver and a second segment which is composed of a random or pseudo-random learning pattern sequence of digital pulses which is correlated with said known training pattern.
10. A method according to claim 8 or 9, wherein the correlation process is followed by a corrective process which converts a sampled estimate of the channel response into a more accurate output directly utilized by said equalization means.
1 A method of setting a receiver of a data transmission and receiving system substantially as described herein.
12. A data transmission and receiving system or a setting arrangement usable therein substantially as described with reference to, and as illustrated in, any one or more of the Figures of the accompanying drawings.
GB08228081A 1982-10-01 1982-10-01 Improvements in or relating to data transmission and receiving systems Withdrawn GB2128456A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430531A2 (en) * 1989-11-30 1991-06-05 AT&T Corp. Technique for determining signal dispersion characteristics in communications systems
GB2268371A (en) * 1992-04-10 1994-01-05 Roke Manor Research Reducing Interference in Radio communication systems
GB2296636A (en) * 1994-12-20 1996-07-03 Fujitsu Ltd Non-Nyquist transmission training method and apparatus
WO1997007622A2 (en) * 1995-08-15 1997-02-27 Stefan Hahn Process and device for recognising selection pulses during a telephone conversation

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1503083A (en) * 1975-07-10 1978-03-08 Ibm Data transmission system
GB1535850A (en) * 1975-12-30 1978-12-13 Ibm Apparatus for determining the initial values of the coefficients of a coupled transversal equalizer
GB2009570A (en) * 1977-11-30 1979-06-13 Cit Alcatel Self-adapting equaliser
GB1549634A (en) * 1975-07-23 1979-08-08 Codex Corp Data communications receiver
GB1597365A (en) * 1976-11-11 1981-09-09 Harris Corp Apparatus for communicating an information signal over a bandwidth constrained channel
EP0052362A1 (en) * 1980-11-17 1982-05-26 Nec Corporation Fast start-up system for transversal equalizers

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1503083A (en) * 1975-07-10 1978-03-08 Ibm Data transmission system
GB1549634A (en) * 1975-07-23 1979-08-08 Codex Corp Data communications receiver
GB1535850A (en) * 1975-12-30 1978-12-13 Ibm Apparatus for determining the initial values of the coefficients of a coupled transversal equalizer
GB1597365A (en) * 1976-11-11 1981-09-09 Harris Corp Apparatus for communicating an information signal over a bandwidth constrained channel
GB2009570A (en) * 1977-11-30 1979-06-13 Cit Alcatel Self-adapting equaliser
EP0052362A1 (en) * 1980-11-17 1982-05-26 Nec Corporation Fast start-up system for transversal equalizers

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430531A2 (en) * 1989-11-30 1991-06-05 AT&T Corp. Technique for determining signal dispersion characteristics in communications systems
EP0430531A3 (en) * 1989-11-30 1991-12-11 American Telephone And Telegraph Company Technique for determining signal dispersion characteristics in communications systems
GB2268371A (en) * 1992-04-10 1994-01-05 Roke Manor Research Reducing Interference in Radio communication systems
GB2268371B (en) * 1992-04-10 1995-09-20 Roke Manor Research Radio communication systems
GB2296636A (en) * 1994-12-20 1996-07-03 Fujitsu Ltd Non-Nyquist transmission training method and apparatus
GB2296636B (en) * 1994-12-20 1999-09-29 Fujitsu Ltd Non-nyquist transmission training method and apparatus
US6021160A (en) * 1994-12-20 2000-02-01 Fujitsu Limited Training method for non-nyquist transmission system and training data transmission apparatus for non-nyquist transmission system
WO1997007622A2 (en) * 1995-08-15 1997-02-27 Stefan Hahn Process and device for recognising selection pulses during a telephone conversation
WO1997007622A3 (en) * 1995-08-15 1997-03-20 Stefan Hahn Process and device for recognising selection pulses during a telephone conversation

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