GB2127637A

GB2127637A - Improvements in or relating to pulse rebalanced servomechanisms

Info

Publication number: GB2127637A
Application number: GB8224585A
Authority: GB
Inventors: John Albert Geen
Original assignee: British Aerospace PLC
Current assignee: BAE Systems PLC
Priority date: 1982-08-26
Filing date: 1982-08-26
Publication date: 1984-04-11
Also published as: FR2532445A1; GB2127637B

Abstract

A pulse rebalanced servomechanism for converting a variable input EI into a digital output signal EO has integrator means (2), a feedback loop (5) applying a first train of pulses representative of the output of the integrator means to the input of the integrator means, whereby the integrator means is responsive to the difference between the variable input and the first train of pulses, and interpolating means (9) for producing a second train of pulses corresponding to the output of the integrator means (2), the pulse duration of the second train of pulses being less than the pulse duration of the first train of pulses so that the second train of pulses provides a finer resolution of the input than the first train of pulses, and combining means (15) for combining the first train of pulses with the second train of pulses to produce said digital output signal corresponding to the variable input. <IMAGE>

Description

SPECIFICATION Improvements in or relating to pulse rebalanced servomechanisms This invention relates to pulse rebalanced servomechanisms which are devices employing the feedback of rebalancing pulses to provide digital output signals representative of variable inputs. The invention is particularly applicable to such servomechanisms known as delta-sigma modulators which convert analogue electrical input signals into digital output signals. The invention is also applicable to pulse rebalanced servomechanisms used in navigation, for example with gyroscopes and accelerometers.

In many applications, of which inertial navigation is a particular example, it is important that the conversion of analogue signals to digital representation be such that the accumulated sum of the digital output corresponds very accurately to the time integral of the analogue signal. An analogue-to-digital (A/D) convertor conforming to this requirement is said to have low bias.

One means of achieving low bias is by the technique called "delta-sigma modulation" which is well known to those skilled in the art as a method which is least demanding of numbers of precision components.

In a delta-sigma modulator, an analogue integrator is used to accumulate the difference between the input signal and precisely defined feedback pulses of alternating polarity, each corresponding to an an output digit. When that difference has grown sufficiently large, an extra output digit of either positive or negative polarity is produced in such a way as partially to cancel the difference. The effect of the modulator is essentially level-to-frequency conversion and its action is illustrated in Figure 1 of the accompanying drawings.

Referring to Figure 1, the known delta-sigma modulator has difference means in the form of a difference junction 1, an integrator 2, a level detector 3, control logic 4 to which clock pulses are applied, and a feedback loop 5. The feedback loop 5 includes a switch 6 linked to sources 7 and 8 of positive and negative pulses, respectively. An analogue input signal Ej is applied as one input to the difference junction 1, the other input of which is a first train of pulses supplied by the feedback loop 5. The output of the difference junction 1, representing the difference between an analogue input signal Ej and the first train of pulses, is applied to the input of the integrator 2.

The output of the control logic 4 is an output signal E0 which is a stream of pulses the pulse repetition rate (or frequency) of which is representative of the amplitude of the input signal Ej, but the accuracy of the output signal E0 is limited, for reasons to be explained.

As a refinement, the level detector 3 may have two levels of detection such that when the output of the integrator 2 lies between those levels neither polarity of pulse is fed to the difference junction 1. This means that for zero input there are no output digits, rather than alternating positive and negative ones. The object of this refinement is to improve the bias for very low levels of input at the expense of increasing complexity and introducing a non-linearity which degrades the bias in situations where there is significant input noise or high signal levels. Such a modulator is often called three-state because there are three possible output states for the level detector 3. The corresponding description for a modulator without this refinement is two-state.

In either two- or three-state case, the effective bias accuracy of an A/D convertor based on the delta-sigma principle is limited by the matching of the positive pulses to the negative pulses. At the input to the integrator 2, the effect of these pulses depends on their current amplitude multiplied by their duration in time so it is important to maintain the stability of both amplitude and duration in order to keep a good match between positive and negative pulses. There are a number of standard approaches to this problem of which the following are examples:- (i) The same current source may be used for both positive and negative pulses, the switch 6 being a reversing type and reliance being placed on producing identical durations for hath positive and negative pulses.

(ii) The amplitudes of the positive and negative current sources 7 and 8 may be compared in an independent circuit and one or both controlled to give equality of amplitudes. Again the durations of the pulses need to be maintained as nearly identical as possible.

(iii) An independent circuit may be used to compare a reference with the effective values of pulses switched into that circuit when not demanded by the integrator 2 so that an associated controller compensates for variation in both amplitude and duration. However, the problem remains that the switch should produce identical durations for pulses routed into the control circuits and for pulses routed into the integrator.

In each case, the problem is not merely one of producing a fast or well defined shape to the pulse edges but also of positioning those edges very precisely in time, which depends on the accumulated edge uncertainties of the controlling logic and driving clocks. In other words, the state of the art in switching technology places a lower bound on the absolute duration errors achievable.

Therefore, for a given bias specification there is a minimum useable pulse duration.

However, the one-to-one relationship between output digits and feedback pulses implies that a longer pulse duration corresponds to a poorer resolution of A/D conversion in the sense that the digital output must be sampled for a longer time to obtain a given accuracy. In many applications requiring low bias the corresponding sampling time is unacceptable.

The present invention is a means of exploiting the bias of a servomechanism such as a deltasigma modulator using long duration rebalance pulses without sacrificing short term resolution.

According to the invention a pulse rebalanced servomechanism for converting a variable input into a digital output signal comprises integrator means, a feedback loop applying a first train of pulses representative of the output of the integrator means to or towards the input of the integrator means whereby the integrator means is responsive to the difference between the variable input and the first train of pulses, and interpolating means for producing a second train of pulses corresponding to the output of the integrator means, the pulse duration of the second train of pulses being less than the pulse duration of the first train of pulses so that the second train of pulses provides a finer resolution of the input than the first train of pulses, and combining means for combining the first train of pulses with the second train of pulses to produce said digital output signal corresponding to the variable input.

The interpolating means may comprise an analogue-to-digital converter, for example a digital-to-analogue converter with a digital feedback loop, and in this case the A/D converter means is conveniently added to a conventional delta-sigma modulator in such a way that the A/D converter means produces a digital signal (i.e. the second train of pulses) corresponding to the output of the integrator means and finely resolved with respect to the range of the integrator means.

This digital signal corresponds to the accumulated difference between the first train of pulses (i.e. the feedback pulses in the conventional feedback loop of the delta-sigma modulator) and the input signal.

In the preferred embodiments to be described, the digits of the first train of pulses are divided into a stream of smaller pulses with the same duration as those of the output of the interpolating means. The divided digits are then combined with the output of the interpolating means (i.e. with the second train of pulses) using logic circuits so as to give an overall output stream, the pulse rate of which corresponds directly to the analogue input level but with much finer resolution than that afforded by the known deita-sigma modulator alone.

The interpolating means should be configured such that the sum of its output is bounded; that is, for successive returns of its input to a given level its accumulated output should return to zero. This means that it has an ever diminishing contribution to the long term accuracy of the overall conversion, the ability of the servomechanism to maintain the bias accuracy remaining unperturbed. Any scale factor inaccuracy of the interpolating means appears as a noise component of the output with no net bias contribution.

The invention can be used to improve the resolution against accuracy compromise of any pulse rebalanced servomechanism incorporating suitable integrator means.

Of particular interest are pulse rebalanced gyroscopes and accelerometers in which the analogue inputs are changes in spatial orientation, or acceleration rather than electrical signals. The output of a pulse rebalanced instrument is convenient in being a digital pulse stream, that is, an electrical signal directly suitable for accumulation and digital processing without need for a separate analogue-to-digital converter.

In such an electromechanical servomechanism the problem of accurately maintaining the value of the individual feedback pulses is similar to that in a delta-sigma modulator but is worsened by the difficulty of rapidly switching an inductive load. Again, a solution is to extend the pulse duration to the limit imposed by the integrator linearity and retain resolution by the use of interpolating means.

In such circumstances the integrator is the physical inertia of the sensing body and the feedback pulses are of mechanical impulse in the technical sense, i.e. force-time product produced via, for example, torquing coils. The limits of the integrator linearity are in this case the maximum permissible excursions of the sensing inertia.

The algebraic summation of the input signal and the feedback results from the linear summation of the mechanical forces acting on an inertia rather than the linear summation of currents at a circuit node.

The interpolating means functions in an identical way to that in the delta-sigma modulator but using the analogue output of a pick-off apparatus as its signal source. The pick-off, which senses the position of the inertial body, may take many possible forms well known to the designers of such instruments. For example, a differential capacitance sensor is a popular means of sensing the motion of an accelerometer pendulum. A level detector which determines the feedback polarity would also use the pick-off output as its signal source.

The preferred embodiments of the invention will now be described, by way of example, with reference to Figures 2 to 4 of the accompanying drawings, in which: Figure 2 is a circuit diagram of a delta-sigma modulator according to the invention, Figure 3 is a schematic diagram (idealised) of a pulse rebalanced accelerometer according to the invention, and Figure 4 illustrates one specific form of a component of Figure 3.

In Figure 2, components equivalent to those of Figure 1 have been given the same reference numerals. It will be seen that the delta-sigma modulator of Figure 2 has components 1 to 8, in common with the known delta-sigma modulator of Figure 1. However, unlike Figure 1 , the modulator of Figure 2 has interpolating means 9 which is fed by the output of the integrator 2 and which produces a second train of pulses on lead 10 giving a finer resolution of the analogue input signal Ej as will be described.

The interpolating means 9 comprise a comparator 12 a first input of which is the output of the integrator 2. The output of the comparator 1 2 is fed back through a feedback loop having an up/down counter 1 3 (clocked at an harmonic of the clock frequency applied to the latch 4) and a digital-to-analogue converter 14, to a second input of the comparator 12. The output of the comparator 12 (on lead 10) is the second train of pulses which has a pulse duration less than that of the first train of pulses applied by the feedback loop 5 to the difference junction 1.

The second train of pulses on the lead 10 is applied to a combining logic circuit 15 to which is also applied a pulse stream on lead 1 6 derived from the control logic 4. The control logic 4 of Figure 2 does differ from the control logic 4 of Figure 1 in one respect: in the control logic 4 of Figure 2 the digits forming the signal in the feedback loop 5 are divided into a pulse stream on 1 6 having the same pulse duration as the second train of pulses, and it is this divided pulse stream on the lead 1 6 which is combined in the combining logic 1 5 with the second train of pulses on the lead 1 0. Alternatively, this division of the pulses may be accomplished in the logic 1 5 before the two trains of pulses are combined.In any event, the digital output signal E0 has a pulse frequency which is an accurate representation of the amplitude of the analogue input signal Ei, with much finer resolution than in the known modulator shown in Figure 1.

In some applications the analogue input amplitude is dominated by noise or alternating components which have bounded time integrals.

Aircraft inertial navigation is such an application; most of the output from the navigation sensors being induced by vibration. In these circumstances, the circuit of Figure 2 is even more advantageous in reducing bias. The reason is that it enables the use of feedback pulses with long duration and smaller current than would otherwise be needed. The rapidly alternating component of the input is absorbed in the integrator 2 instead of being balanced continually by large current feedback pulses. The interpolating means 9 supplies the information which would otherwise be lost by this procedure.

The advantage of small current feedback is that a given relative accuracy of current achieves a small absolute match of positive and negative pulses, resulting in better bias performance.

Hence, in the embodiment of Figure 2, the interpolating means 9 track the integrator output to enhance the resolution of the delta-sigma modulator. The invention can be applied to two-or three state delta-sigma modulators with active or passive integrators, with single or multiple sources of feedback pulses or with stabilising servos for the feedback pulses. The use of the interpolating means provides a means for shifting the design compromises of a deltasigma modulator towards lower bias than would otherwise be practicable with the given components.

The difference junction 1 and the integrator 2 may be realised by an operational amplifier. In this case, the polarity of the first stream of pulses in the feedback loop 5 is reversed before this stream is applied, with the analogue input signal, to the summing junction of the operational amplifier.

Figure 3 shows a pulse rebaianced servomechanism in the form of a pulse rebalanced accelerometer. The accelerometer comprises a horse-shoe permanent magnet 1 7 between the spaced side limbs of which extend a flexible central limb 18 carrying on its extremity a body 1 9 disposed between the poles of the permanent magnet 17. The central limb 1 8 is a compliant support allowing the body 1 9 to be displaced from its normal position mid-way between the poles under the influence of the acceleration which the accelerometer is intended to measure.

Around the body 19 is wound an electromagnetic coil 20 which acts as a rebalancing coil.

Displacement of the body 1 9 is detected by pick-off means in the form of a differential capacitor 22 having two spaced plates 23 fixed with respect to the permanent magnet 1 7 and an intermediate movable plate 24 secured to the body 19. The differential capacitor 22 can be made to yield information about the displacement of the body 1 9; for example, by applying antiphase signals from a high frequency source 25 to the fixed plates and feeding the induced signal from the movable plate to a phase sensitive detector 26 using the same high frequency source as reference. The output of the phase sensitive detector 26 is applied through a level detector 27 and a latch 28, and thence around a feedback loop 29, to a source 30 of feedback pulses. The source 30 provides a first train of pulses which is applied to the rebalancing coil 20.

Velocity of the body 1 9 is dependent upon the time integral of the difference between four forces of which two are arranged to dominate the motion. The first of the two is the force applied to the body 1 9 in consequence of the acceleration to be measured, and the second is the force applied to the body 19 as a result of the interaction between the electric current in the coil 20 and the permanent magnet poles. Hence, the inertial mass of the body can be regarded as being equivalent in effect to the difference junction 1 and the integrator 2 of the embodiment of Figure 2. The output of the phase sensitive detector 26 is proportional to displacement rather than velocity so it is necessary to insert a time differentiating means 31 between the phase sensitive detector and subsequent components. The output 31 to 27, being proportional to velocity (that is the integral of the acceleration to be measured less the feedback pulses), is used to determine the polarity of the feedback signal 29 in a way analogous to the use of the integrator output in the embodiment of Figure 2, components 27 and 28 corresponding to 3 and 4, respectively.

The output of the differentiating means 31 is also fed into the interpolating means, indicated generally by the reference numeral 32. As before, the interpolating means 32 produces on a lead 33 a second train of pulses which is combined with the divided pulses on a lead 34 from the feedback loop in a combining logic 35 the output of which is the digital output signal E0 of the accelerometer. A clock 36 supplies clock pulses to the interpolating means 32 and to the latch 28.

As will be apparent to those skilled in the art, this form of mechanical servomechanism requires additional feedback means in order to produce completely satisfactory behaviour. In particular, it is necessary to compensate for the effects of the other forces acting on the inertial body 1 9, namely the spring constant of the mount 1 8 and any mechanical damping in the system. The spring constant of the mount 1 8 causes a dead zone in which a small input acceleration change produces no change in output pulse pattern and also causes a doubling of the output pulses, reducing the effective resolution. This effect is, however, easily compensated by feeding back to the coil 20 a current which is proportional to the phase sensitive detector output, that is the displacement of the body 1 9.This current needs be temperature compensated for changes in spring constant and magnet strength.

In precision applications it is usual to make the mechanical damping small and damp the motion of the mass of the body 1 9 by the more well defined electrical feedback to the coil 20. This feedback need to be proportional to the velocity of the mass of the body 1 9. Furthermore, the signals to 27 and 32 need to be compensated for the damping by addition of a component proportional to the displacement of the body 1 9, thereby preventing a low frequency drift of the body 19.

All these additional functions are conveniently and economically produced in the same electronic block 31 as the differentiator and hence the feedback path from 31 to 30 in Figure 3.

An illustrative example of the form of the time differentiating means 31 is given in Figure 4. This example uses a dual operational amplifier 37, 38 for economy, but there are many other amplifier configurations capable of impiementing this function. Functions shown in Figure 4 which are representative of components of Figure 3 have been accorded similar reference numerals.In addition, Figure 4 has been marked with certain letters to illustrate the function of the arrangement, the definitions of these letters being as follows:- m=mass A=externally applied acceleration pulse feedback current W=force per unit current from the magnet coils F=netforne on the mass f=analogue force feedback to cancel spring constant and apply electronic damping R=effective resistance of magnet coils (determined by feedback resistor of drive amplifier) t=time D=mechanical damping k=mechanical spring constant B=transfer function of pick-off and phase sensitive detector

x=displacement of mass c=capacitor value determining electronic damping r=resistor value to suit amplifier type e=analogue feedback voltage (fed to 30) K=scaling factor ( < 1) chosen for convenience of implementation u=voltage determining polarity of pulse feedback (fed to 27 and 32) N=inverting gain of amplifier stage with output u.

Examination of the circuit 31 will show that: dx e=B(Kx-cr-) dt so if R is adjusted to be K kWB then: k dx f=kx-cr (-) K dt as required to cancel the effect of the spring and apply further damping to give: crk dx F=mA~IW(D+ ) - K dt It follows that: dx crk J(mAilW) dt=m + (D+ )x, dt K whence u will be of the correct form, proportional to -,)'(mAtIW)dt if N satisfies the condition:- D+cr k/K N-(N+1)K m (N+1)cr

Claims

1. A pulse rebalanced servomechanism for converting a variable input into a digital output signal the servomechanism having integrator means, a feedback loop applying a first train of pulses representative of the output of the integrator means to or towards the input of the integrator means whereby the integrator means is responsive to the difference between the variable input and the first train of pulses, and interpolating means for producing a second train of pulses corresponding to the output of the integrator means, the pulse duration of the second train of pulses being less than the pulse duration of the first train of pulses so that the second train of pulses provides a finer resolution of the input than the first train of pulses, and combining means for combining the first train of pulses with the second train of pulses to produce said digital output signal corresponding to the variable input.

2. A servomechanism according to claim 1, wherein the interpolating means comprises analogue-to-digital converter means having a feedback loop.

3. A servomechanism according to claim 2, wherein the analogue-to-digital converter means comprise a level detector or comparator responsive to the output of the integrator means, the output of the level detector or comparator being fed back to its input through an up/down counter and a digital-to-analogue counter, the second pulse train being the output signal of the level detector or comparator.

4. A servomechanism according to any of the preceding claims, wherein the combining means divide the pulses of the first pulse train into pulses of a duration matching that of the second pulse train before the two pulse trains are combined.

5. A servomechanism according to any of the preceding claims, wherein the pulse rate of the first pulse train is modulated by the amplitude of the variable input, and the pulse rate of the second pulse train is modulated by the amplitude of the output signal of the integrator means, the digital output signal being an output stream of pulses having a pulse rate representative of the amplitude of the variable input.

6. A servomechanism according to any of the preceding claims, wherein the variable input is an analogue electrical signal and the integrator means is an electrical integrator, the servomechanism having difference means to which the input signal is applied as one input, the integrator being connected to the output of the difference means, with the feedback loop being fed by the output of the integrator and being connected to provide a second input to the difference means, the feedback loop applying the first train of pulses to the difference means, whereby the integrator accumulates the difference between the input signal and the first train of pulses.

7. A servomechanism according to claim 6, wherein the difference means and the integrator are constituted by an operational amplifier and wherein means are provided for reversing the polarity of the first train of pulses which is then applied, together with the input signal, to the summing junction of the operational amplifier.

8. A servomechanism according to any of the preceding claims and in the form of a delta-sigma modulator.

9. A servomechanism according to any of claims 1 to 5, wherein the variable input is the variation in position, velocity or acceleration of a movable body the inertial mass of. which constitutes the integrator means.

10. A servomechanism according to claim 9, wherein the variation in position, velocity or acceleration of the movable body is detected by pick-off means the output of which is converted into said first train of pulses.

11. A servomechanism according to claim 1 0.

wherein the pick-off means is constituted by a differential capacitor having a movable plate movable with the movable body.

12. A servomechanism according to any of claims 9 to 11, wherein the first train of pulses is applied to an electromagnetic coil which cooperates with magnetic poles to tend to null the displacement of the movable body.

13. A servomechanism according to claim 10 and any claim appended thereto, wherein the output of the pick-off means is applied to phase sensitive device the output of which is in turn applied to time differentiating means.

1 4. A servomechanism according to any of claims 9 to 13, and in the form of a pulse rebalanced gyroscope or accelerometer.

1 5. A pulse rebalanced servomechanism in the form of a delta-sigma modulator substantially as herein particularly described with reference to Figure 2 of the accompanying drawings.

1 6. A pulse rebalanced accelerometer substantially as herein particularly described with reference to Figure 3, or Figure 3 as modified by Figure 4, of the accompanying drawings.