GB2124060A - Improvements in or relating to circuit arrangements for automatic selection of television sound frequency - Google Patents

Improvements in or relating to circuit arrangements for automatic selection of television sound frequency Download PDF

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Publication number
GB2124060A
GB2124060A GB08220216A GB8220216A GB2124060A GB 2124060 A GB2124060 A GB 2124060A GB 08220216 A GB08220216 A GB 08220216A GB 8220216 A GB8220216 A GB 8220216A GB 2124060 A GB2124060 A GB 2124060A
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Prior art keywords
output
circuit arrangement
sound
outputs
inputs
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GB08220216A
Inventor
George Anthony Lacey
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SPT VIDEO Ltd
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SPT VIDEO Ltd
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Priority to GB08220216A priority Critical patent/GB2124060A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)

Abstract

A circuit arrangement is provided to permit automatic selection of television sound frequency, such as sound intercarrier frequency, in a television receiver for receiving television signals of different systems or standards. The arrangement comprises a plurality of band pass filters 12 to 15 tuned to the different sound intercarrier frequencies. The levels of the outputs of the filters are determined by level detecting means 20 to 23 and supplied to a circuit arrangement 24, 25 for detecting the highest level of the detected signals. Selection controlling means 19 and 26 then selects the frequency of the highest level, and drives the sound demodulator of the television set. <IMAGE>

Description

SPECIFICATION Improvements in or relating to circuit arrangements for automatic selection of television sound frequency The present invention relates to a circuit arrangement for automatic selection of television sound frequency. Such a circuit arrangement may be provided in a television receiver capable of operating according to different television standards and systems.
There are many television systems in general use throughout the world. In each of these systems, video signals including colour information are modulated on a vision carrier and sound signals are modulated on a sound carrier whose frequency differs from the vision carrier by an amount which depends on the television system and on the local standard of the system. Also, more systems transmit FM sound signals, although one SECAM system transmits AM sound.
With the systems and standards presently in use, the spacing between the vision and sound carriers is 4.5 MHz, 5.5 MHz, 6.0 MHz or 6.5 MHz depending on the television system and standard. Also, spacings of 5.7 MHz and 6.2 MHz are coming into use for stereo TV sound. This frequency spacing is preserved during conversion to the intermediate frequency (IF) in a television receiver, and is converted to the sound intercarrier by balanced demodulation of the sound IF signal by the vision carrier signal filtered from the vision IF signal. Thus, the carrier frequency of the sound intercarrier signal supplied to the sound demodulator has one of the values mentioned above.
In conventional television receivers, the sound IF stages and the sound demodulator contain filters and tuned circuits whose resonant frequencies are adapted to the system and standard for which the receiver is designed. Also, the vision IF stages contain resonant traps for preventing sound-on-vision interference, and the resonant frequencies of these traps are similarly adapted to the system and standard in use. Thus, a television receiver designed for use on one system or standard is incapable of reproducing the sound signal of any other system or standard.
It is desirable for television receivers whose location is not fixed, for instance installed in ships or other vehicles, to be able to receive television signals of different systems or standards. The need for such compatible receivers is likely to increase substantially with the introduction of satelite TV broadcasting, because the service areas or "footprints" of such satellites tend to overlap substantially so that reception of television signals of one system or standard will, in some areas, be receivable in countries which are standardised on a different system or standard.
It may also be desirable for a television receiver to be able to receive FM radio signals, for which the standard intermediate frequency is 10.7 MHz.
According to the invention, there is provided a circuit arrangement for automatic selection of television sound frequency, comprising a plurality of filters for receiving a television sound signal and arranged to pass signals of frequencies corresponding to respective expected sound frequencies, level detecting means for detecting levels of the signals passed by the filters, means for selecting the highest level thus detected, and means for controlling selection of frequency of operation of a television receiver sound stage in response to the selecting means.
The provision of such a circuit arrangement in a television receiver allows the receiver to be used for reception of sound signals of different systems or standards. The arrangement provides for automatic selection of the correct sound frequency, such as sound intercarrier frequency, so that no selection or adjustment is required by the user of the television receiver.
The invention will be further described, by way of example, with reference to the accompanying drawing which is a block circuit diagram of a television sound stage incorporating a circuit arrangement constituting a preferred embodiment of the invention.
The television receiver stage shown in the drawing comprises a band pass filter 1 whose input is connected to the intermediate frequency output of the tuner of a television receiver.
The output of the filter is connected to the input of a variable gain amplifier 2 for amplifying the sound IF signal and performing automatic gain control thereof. The output of the amplifier 2 is connected to one input of a balanced modulator 3, whose other input is connected to the output of another band pass filter 4, having a pass band centered on the vision carrier. The input of the filter 4 receives the vision carrier IF signal and the filter serves to remove transient phase modulation of the vision carrier.
The output of the balanced modulator 3 is supplied via a band pass filter 5 having a pass band extending from approximately 3.5 MHz to 7.5 MHz and an amplifier 6 to the inputs of four band pass filters 12, 13, 14 and 1 5.
The resonant frequencies of the filters 1 2 to 15 are 6.5 MHz, 6 MHz, 5.5 MHz, and 4.5 MHz, respectively, and each filter has a pass band of approximately 0.5 MHz with very good out of band rejection. For instance, each of these filters may comprise a ceramic filter.
The centre frequencies of these filters correspond to the four standard intercarrier frequencies in common use in the various systems and standards throughout the world.
The outputs of the filters 1 2 to 1 5 are connected to second, fourth, sixth, and eighth inputs of an eight-to-one multiplexing switch 16, operation of which is controlled by a multiplexing counter 7. The counter 7 is of the divide-by-eight type and receives line frequency pulses from the line circuits of the television receiver as clock input. The output of the multiplexer 1 6 is connected to the input of a high pass filter 20 having a turnover frequency of approximately 3 MHz for rejecting the multiplexing frequency switching commutations. The output of the filter 20 is connected via an amplifier 21 to the input of an envelope detector 22 in the form of a simple peak detector.The output of the envelope detector 22 is connected to the input of a threshold setting buffer 23 which converts the input signals to full logic level signals and thus ignores very low level signals.
The filter 20, the amplifier 21, the envelope detector 22, and the buffer 23 form a level detecting circuit whose output is connected via a resistor R1 to the input of a one-to-eight demultiplexer 17, which is controlled synchronously with the multiplexer 1 6 by the counter 7. The second, fourth, sixth, and eighth outputs of the demultiplexer 1 7 are connected to the inputs of sample-and-hold integrators 24, each of which comprises an inverting amplifier and a feedback capacitor. The value of the feedback capacitor, together with the input resistor R 1, determines the time constant of each integrator, the capacitors having the same values.The outputs of the ingetrators 24 are connected to the non-inverting inputs of respective comparators 25, whose inverting inputs are connected together and to the tapping point of a potential divider comprising resistors R2 and R3 of equal value.
The outputs of the comparators 25 are connected to inputs of a logic circuit 26 comprising two input AND gates having first inputs connected to the outputs of the comparators 25, respectively. The outputs of the gates are connected to the input of a further gate, whose output constitutes the output of the logic circuit 26.
The outputs of the comparators are connected to a further logic circuit 27 comprising an AND gate whose output is connected to a further input of the OR gate of logic circuit 26, and whose first input is connected via an inverter to the output of an OR gate whose inputs receive the output signals from the comparators 25.
The second- inputs of the AND gates of the logic circuit 26 are connected to respective outputs of an output selecting counter 19, the second input of the AND gate of the further logic circuit 27 being connected to the second input of one of the AND gates of the logic circuit 26. The outputs of the counter 19 are also connected to outputs A and B of the circuit arrangement.
The counter 19 has a count enable input connected to the output of the logic circuit 26, which is also connected to an output C for muting of the audio stages of the television receiver. The counter 1 9 has a clock input connected to the output of the buffer 23 of the level detecting circuit.
The outputs of the counter 19 are further connected to control inputs of an output selector switch 11, whose four inputs are connected to the outputs of respective filters 1 2 to 1 5. The output of the switch 11 is connected via amplifier 8 to the input of the sound demodulator stage of the television receiver via a terminal D. The output of the amplifier 8 is also connected to the input of an envelope detector 9 having a timing capacitor C1 and supplying an output signal to an automatic gain control (AGC) generator 10.
The generator 10 supplies an AGC voltage to the control input of the amplifier 2. The output of the buffer 23 is also connected to the input of a duty cycle monitoring circuit 18, whose output is connected to another control input of the AGC generator 10.
Operation of the sound stage and circuit arrangement shown in the drawing is as follows. The sound IF signal from the tuner is filtered by the band pass filter 1 and amplified in the amplifier 2 before being supplied to the balanced modulator 3. The vision IF carrier from the vision IF stages of television receiver is filtered by the band pass filter 4 so as to remove transient phase modulation and is supplied to the balanced modulator 3, the output of which is therefore the sound intercarrier signal, which is filtered by the filter 5 and amplified by the amplifier 6. The output of the amplifier 6 is supplied to the filters 1 2 to 14, whose outputs are sampled in turn by the multiplexer 1 6 under control of the counter 7.Because only alternate inputs of the multiplexer 1 6 are connected to the outputs of the band pass filters 1 2 to 15, guard intervals are provided between sampling of the consecutive filter outputs.
The filter 20 removes low frequency switch ing commutations caused by the multiplexing operation, and the filtered signal is amplified and envelope detected by the detector 22.
The output signal of the detector 22 is then buffered to logic levels by the buffer 23.
The output of the buffer 23 is supplied via the resistor R1 to the input of the demulti plexer 17, which supplies the level signal to the input of the integrator 24 corresponding to the filter output currently being sampled by the multiplexer 16. The integrators provide a high degree of noise immunity to the circuit arrangement and give enhanced descrimination between their static outputs, even under difficult reception conditions. The outputs of the integrators are supplied to the respective comparators 25 which perform further des crimination between the four static status levels. In this respect, the reference voltage supplied by the resistors R2 and R3 is made equal to the mid-point of the dynamic range of each of the integrators 24.
The parts thus described essentially perform a spectral analysis of the received sound intercarrier signal divided into disjoint frequency bands by the band pass filters 1 2 to 1 5.
The outputs of the comparators 25 and the outputs of the counter 1 9 are compared in the logic circuit 26 and the counter 1 9 is inhibited from further counting when its output state corresponds to a high logic level on the output of the corresponding comparator. In this respect, the sequence of pulses on the outputs of the counter 1 9 is such that the output level of the band pass filter 1 2 of highest frequency is first checked, followed by the other band pass filters in descending order of centre frequency, this operation continuing cyclically under control of the multiplexing counter 7.As only one of the outputs of the counter 1 9 can be energized at any time, absolute descrimination is provided between the four static status outputs so as to provide negligible selection confusion under difficult reception conditions or in the absence of signals.
By using the output of the buffer 23 to clock the counter 19, the system aquisition settling period does not cause a short tone burst in the sound output of the television receiver because the buffer output is partially random during the settling period. However, as soon as a stable state of parity between the output of the counter and the state of the logic circuit 26 is established, further clocking of the counter 1 9 is inhibited.
The outputs of the counter 1 9 also control the selection of the correct intercarrier signal from the appropriate band pass filter through the output selector switch 11 and thence to the sound demodulator of the television receiver. The AGC generator 10 and envelope detector 9 thus provide an AGC voltage corresponding to the correct sound intercarrier signal.
During settling of the circuit arrangement, the duty cycle monitoring circuit 1 8 monitors the duty cycle of pulses produced at the output of the buffer 23. If the duty cycle is excessive, then the monitoring circuit 18 controls the generator 10 so as to vary the AGC voltage. This adjusts the gain of the amplifier 2 so that, once the control loop has settled, the output signal of only one of the filters 1 2 to 1 5 has a level sufficient to actuate the corresponding comparator 25, thereby selecting the correct sound intercarrier frequency.
Absence of an intercarrier signal is detected by the logic circuit 27, which forces the counter 19 to select an intercarrier frequency of 6.5 MHz. The signal at the terminal C also un-mutes the audio output of the television receiver to give the television operator an awareness of the volume control setting by the emission of noise. Thus, a sudden surprise outburst of sound due to a maladjusted volume control can be avoided.
The output A of the circuit arrangement is connected so as to switch the frequency of operation of the sound demodulator of the television receiver. The output B of the arrangement is connected to the vision circuits of the television receiver so as to switch the frequency of the sound-off-vision filtering.
The circuit arrangement thus permits the automatic selection of sound frequency in a manner which is imperceptible to a television subscriber. The arrangement provides fast selection of the correct sound frequency and copes with noisy and distorted signals. No alignment of the circuit arrangement is required, and the circuit arrangement is compatible for both FM and AM. The circuit arrangement may thus be provided in a "universal" or "multi-standard" television receiver capable of operating on any of the television signals currently in use. Such a receiver is particularly useful on board ship or in other vehicles, where television signals of different systems and standards may be received from time to time. Such a receiver will also be increasingly desirable in view of the introduction of satelite television broadcasting systems, in which a transmitted signal of one system may well spill over into the reception area of a country operating a different system.
The cost of such a television receiver need not be substantially increased as virtually the whole of the circuit shown in the drawing may be made into a single integrated circuit for mass production.
The circuit arrangement may be modified to permit selection from any number of sound frequencies, for instance including S.7 MHz and 6.2 MHz stero TV sound intercarriers, and to permit reception of F.M. radio, for instance adopting the standard 10.7 MHz intermediate frequency.

Claims (23)

1. A circuit arrangement for automatic selection of television sound frequency, comprising a plurality of filters for receiving a television sound signal and arranged to pass signals of frequencies corresponding to respective expected sound frequencies, level detecting means for detecting the levels of the signals passed by the filters, means for selecting the highest level thus detected, and means for controlling selection of frequency of operation of a television receiver sound stage in response to the selecting means.
2. A circuit arrangement as claimed in claim 1, in which the filters comprise band pass filters whose centre frequencies are the respective carrier frequencies of the sound intercarrier signals.
3. A circuit arrangement as claimed in claim 2, in which there are four bandpass filters tuned to 4.5 MHz, 5.5 MHz, 6.0 MHz and 6.5 MHz, respectively.
4. A circuit arrangement as claimed in any one of the preceding claims, in which the outputs of the filters are connected to the inputs of a multiplexer for time division multiplexing to a single output of the multiplexer.
5. A circuit arrangement as claimed in claim 4, in which the level detecting means comprises an envelope detector whose input is connected to the output of a high pass filter for rejecting the multiplexing frequency from the output of the multiplexer.
6. A circuit arrangement as claimed in claim 5, in which the high pass filter has a turnover frequency substantially equal to 3 MHz.
7. A circuit arrangement as claimed in any one of claims 4 to 6, in which the output of the level detecting means is connected to the input of a demultiplexer arranged to operate synchronously with the multiplexer.
8. A circuit arrangement as claimed in claim 7, in which the selecting means comprises a plurality of integrators whose inputs are connected to respective outputs of the demultiplexer, and a plurality of level comparators having first inputs connected to the outputs of the respective integrators and second inputs connected to a common reference voltage source.
9. A circuit arrangement as claimed in any one of claims 4 to 8, including a multiplexing counter arranged to control the multiplexer and, when present, the demultiplexer, and to be clocked by line frequency pulses from the television receiver.
10. A circuit arrangement as claimed in claim 9, when dependent on claim 3, in which the multiplexing counter is a divide-byeight counter and the multiplexer and demultiplexer are eight-to-one and one-to-eight, respectively, with alternate inputs and outputs, respectively, having no connection.
11. A circuit arrangement as claimed in claim 8 or in claim 9 or 10 when dependent on claim 8, in which the selecting means further comprises an output selecting counter whose outputs form the output of the circuit arrangement and are connected to first inputs of respective AND gates whose second inputs are connected to the outputs of the respective comparators, the output selecting counter having count inhibiting input connected to the output of an OR gate whose inputs are connected to the outputs of the AND gates.
12. A circuit arrangement as claimed in claim 11, in which the outputs of the comparators are connected to the inputs of a NOR gate whose output is connected to a first input of a further AND gate, whose second input is connected to one of the outputs of the output selecting counter and whose output is connected to a further input of the OR gate.
1 3. A circuit arrangement as claimed in claim 11 or 12, in which the output of the OR gate is connected to a sound muting output terminal of the arrangement.
14. A circuit arrangement as claimed in any one of claims 11 to 13, in which the clock input of the output selecting counter is connected to the output of the level detecting means.
1 5. A circuit arrangement as claimed in any one of claims 11 to 14, in which the outputs of the filters are connected to inputs of an output selector switch having control inputs connected to the outputs of the output selecting counter and an output for supplying the selected sound intercarrier signal to the television receiver.
1 6. A circuit arrangement as claimed in claim 15, in which an automatic gain control generating circuit is connected to the output of the output selector switch for supplying a control voltage for controlling the gain of a sound IF stage of the television receiver.
1 7. A circuit arrangement as claimed in claim 16, in which a duty cycle monitor is connected between the output of the level detecting means and an input of the automatic gain control generating circuit for causing a reduction of IF gain in response to excessive duty cycle.
1 8. A circuit arrangement as claimed in any one of the preceding claims, in which the inputs of the filters are connected to the output of a bandpass filter having a passband sufficiently wide to pass signals of all the expected sound frequencies.
1 9. A circuit arrangement for automatic selection of television sound frequency, substantially as hereinbefore described with reference to and as illustrated in the accompanying drawing.
20. A television receiver sound stage including a circuit arrangement as claimed in any one of the preceding claims.
21. A sound stage as claimed in claim 20, including a demodulator whose frequency of operation is controlled by the circuit arrangement.
22. A television receiver including a sound stage as claimed in claim 20 or 21.
23. A television receiver as claimed in claim 22, including a vision stage having sound-off-vision filtering means whose frequency of operation is controlled by the circuit arrangement.
GB08220216A 1982-07-12 1982-07-12 Improvements in or relating to circuit arrangements for automatic selection of television sound frequency Withdrawn GB2124060A (en)

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GB08220216A GB2124060A (en) 1982-07-12 1982-07-12 Improvements in or relating to circuit arrangements for automatic selection of television sound frequency

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Application Number Priority Date Filing Date Title
GB08220216A GB2124060A (en) 1982-07-12 1982-07-12 Improvements in or relating to circuit arrangements for automatic selection of television sound frequency

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GB2124060A true GB2124060A (en) 1984-02-08

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989010671A1 (en) * 1988-04-28 1989-11-02 Ferguson Limited Switching circuitry
EP0626786A1 (en) * 1993-05-24 1994-11-30 Deutsche Thomson-Brandt Gmbh Circuit for recognising the sound standard in a television receiver
GB2262868B (en) * 1991-12-16 1995-09-06 Gold Star Co Circuit for automatically tuning audio signals of multiplex broadcasting systems
EP0724359A2 (en) * 1995-01-25 1996-07-31 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus
US6002451A (en) * 1995-01-25 1999-12-14 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus for a video tape recorder

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB990135A (en) * 1960-05-13 1965-04-28 Henry Parks Hutchinson Improvements in or relating to communications systems
GB1074722A (en) * 1965-02-15 1967-07-05 Motorola Inc Frequency-diversity radio communication system
GB1137498A (en) * 1965-09-13 1968-12-18 Rucker Co Improvements in or relating to communications systems
GB1328595A (en) * 1970-08-25 1973-08-30 Siemens Ag Carrier frequency telecommunications systems

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB990135A (en) * 1960-05-13 1965-04-28 Henry Parks Hutchinson Improvements in or relating to communications systems
GB1074722A (en) * 1965-02-15 1967-07-05 Motorola Inc Frequency-diversity radio communication system
GB1137498A (en) * 1965-09-13 1968-12-18 Rucker Co Improvements in or relating to communications systems
GB1328595A (en) * 1970-08-25 1973-08-30 Siemens Ag Carrier frequency telecommunications systems

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989010671A1 (en) * 1988-04-28 1989-11-02 Ferguson Limited Switching circuitry
EP0344905A1 (en) * 1988-04-28 1989-12-06 Ferguson Limited Switching circuitry
GB2262868B (en) * 1991-12-16 1995-09-06 Gold Star Co Circuit for automatically tuning audio signals of multiplex broadcasting systems
EP0626786A1 (en) * 1993-05-24 1994-11-30 Deutsche Thomson-Brandt Gmbh Circuit for recognising the sound standard in a television receiver
EP0724359A2 (en) * 1995-01-25 1996-07-31 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus
EP0724359A3 (en) * 1995-01-25 1999-07-07 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus
US6002451A (en) * 1995-01-25 1999-12-14 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus for a video tape recorder
US6034743A (en) * 1995-01-25 2000-03-07 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus for a video tape recorder
US6108052A (en) * 1995-01-25 2000-08-22 Mitsubishi Denki Kabushiki Kaisha Automatic tuning apparatus for a video tape recorder

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