GB2118006A

GB2118006A - Transmission systems

Info

Publication number: GB2118006A
Application number: GB08307750A
Authority: GB
Inventors: Richard Munro Dorward
Original assignee: General Electric Co PLC
Current assignee: General Electric Co PLC
Priority date: 1982-03-19
Filing date: 1983-03-21
Publication date: 1983-10-19
Also published as: GB2118006B; GB8307750D0

Abstract

Error monitoring in a transmission system arranged to transmit a digitally encoded data signal is carried out by decoding the signal to provide a digital data stream which is analysed on a segment by segment basis. Each segment comprises an equal plurality of digits of the data stream and a count is updated in dependence upon the value of each segment in turn. If the count exceeds predetermined upper or lower values an error in the transmission of the data is indicated.

Description

SPECIFICATION Transmission systems The present invention relates to transmission systems and in particular to such systems used for the transmission of digitally coded data.

In transmission systems in which digitally coded data is transmitted it is well known to use line codes in which the running digital sum is strictly limited. For example some codes using ternary data of the form + 1, O,1 are arranged such that an approximately equal number of "+1" and "-1" digits are transmitted and the running digital sum (the accumulation of all the data digit values) is bounded if the code is considered over an infinite period of time.

In such codes the running digital sum will vary about zero within limited positive and negative values at all times if the code is being correctly transmitted.

One such ternary code is described in our Patent Nos.1,481,008 and 1,481,009.

Such codes have the advantage of removing D.C. and low frequency components from the transmitted spectrum and permit simpler filtering and A.C. coupling than other codes not so constrained. Such codes also provide a simpler solution to monitoring of the transmitted signal for errors.

In a simple form a ternary code may be monitored by incrementing a counter each time a positive pulse is received and decrementing the counter each time a negative pulse is received. If a 'zero' is received no subtraction or addition takes place. Should the counter reach or exceed a predetermined positive or negative value errors in the transmission of the coded data are indicated.

The technique may also be used in monitoring balanced two level (binary) codes such as the code described in our Patent No. 1,489,177. In monitoring binary codes the counter is incremented each time a binary '1' is received and decremented each time a binary '0' is received.

The 'no-change' state of the counter is not used.

However, it will be appreciated that in binary codes the digit rate must be faster than the digit rate in a ternary code if the same amount of information is to be transmitted in a similar period of time.

Thus if a similar information rate as can be achieved with a ternary code is used in a binary code the counter to be used for error monitoring must be considerably faster. Furthermore, since there may be a greater range of digital sum variation in the case of a binary code (although over an infinite perior of time the digital sum is still bounded) a larger counter (having more stages) may be required.

It is an object of the present invention to provide a method of error monitoring of transmission systems using a binary code in which a slower and/or smaller counter may be used.

According to the present invention in a method of error monitoring in transmission systems transmitting digitally encoded data signals, an incoming data stream is divided into segments each of which has an equal plurality of digits of the data stream, a count is decremented, incremented of unaffected in dependence upon the respective total value of the digits in each of the segments in turn and if the value of the count equals or exceeds either a predetermined lower value or a predetermined upper value an error in the transmission of the data stream is indicated.

Preferably the incoming data stream is binary encoded and each segment has two bits.

If the two bits in a segment are of opposite values (i.e. '01' or '10') the count is unaffected whilst if the two bits of a segment are of equal value (i.e. '00' or '11') the count is decremented in one case and incremented in the other.

The count may be arranged to cease incrementing if the value of the count reaches the predetermined positive value and to cease decrementing if the value of the count reaches the predetermined negative value.

Alternatively the count may be commenced at a point within the range of predetermined minimum and maximum values with an error being indicated if either the predetermined minimum value or the predetermined maximum value is reached.

Error monitoring apparatus using the method of the invention will be described by way of example with reference to the accompanying drawings of which: Figure 1 is a block schematic diagram of a transmission system; Figure 2 is a block schematic diagram of error monitoring apparatus of the system shown in Figure 1; and Figure 3 is a block schematic diagram of an alternative error monitoring apparatus.

Referring to Figure 1 a typical transmission system comprises a transmission line 1 having a number of repeater stations, 2, 2' 2"' which amplify the signal on the line. Each repeater station 2 to 2"' has an associated error monitoring circuit 3, 3'-3"' which monitors the signal transmitted by its respective repeater to the transmission line 1. If the error monitoring circuit 3 detects an apparent malfunction of the repeater 1 it is arranged to supply an error signal to one of the channels being transmitted on the transmission line 1. The error signal may then be used to provide an indication of a fault at a manned monitoring station (not shown).

Referring now to Figure 2 the error monitoring circuit 3 comprises a number of threshold detectors in a circuit 4 arranged to provide an output on one of lines 5, 6 and 7 for each two bits transmitted on the line 1 'The lines 5, 6 and 7 are connected respectively to the decrement, stay and increment inputs of a counter 8 which is arranged to provide a signal at an output 10 if its preset maximum count is reached or a signal at an output 9 if a preset minimum or negative count is reached.

The two outputs 9 and 10 are connected to an OR gate 11 so that if the maximum or minimum count of the counter 8 is reached an error output signal is provided on a line 12.

The circuit functions in the following manner.

Each data bit on the line 1 is compared in the threshold detectors circuit 4 in dependence on whether it is the first or second of a pair of bits. If it is the first bit of a pair it is compared with a preset threshold in a first threshold detector to determine whether it is a binary '0' or a binary '1'.

If it is a binary '0' the threshold detector circuit 4 is set to examine the next bit in a second threshold detector which will cause an output on the line 5 or the line 6 in dependence upon the following data bit. If the first bit received is a binary '1' then the circuit 4 is set to examine the next bit in a third threshold detector arranged to provide an output on the line 6 or the line 7 in dependence upon the following data bit.

When the second data bit of a pair is received it is compared with a respective preset threshold in either the second or third threshold detector. If the comparison is carried out in the second threshold detector (i.e. first bit '0') and the second bit is a binary '0' then a signal is provided at the output 5 whilst if the second data bit is a binary '1'then a signal is provided at the output 6.

In the third threshold detector if the data bit is a binary '0' then a signal is provided at the output 6 whilst a binary '1' causes a signal at the output 7.

Thus if a two bit segment of the transmitted signal is '00' then a signal is present at output 5.

If the two bit segment is '01' or '10' then a signal is present at output 6 whilst if the segment is '11' a signal is present at the output 7.

Accordingly the counter 8 is arranged to subtract one from its previous value if '00' is received and to add one to its previous value if '11' is received. If opposite values of data bit are received the value of the counter is unaltered.

If will be realised that if a counter having only 'up' and 'down' inputs is used there is no requirement for the output 6 and corresponding connection which may then be omitted from the error monitoring circuit 3.

After receipt of the second data bit the threshold detector circuit 4 is reset to examine the next data bit with the first threshold detector.

Signals on the lead 12 may be used to provide a local indication of a build-up of transmission errors. Alternatively signals on the lead 12 may be transmitted in a suitable form by one of the channels carried by the transmission line 1.

Referring to Figure 3 the counter and OR gate 11 function in the same manner as that previously described to provide an error signal at the lead 12.

In this error monitoring circuit 3 a clock signal derived from clock signals transmitted in a channel of the transmission line 1 is provided to a serial to parallel converter 14 for every two clock pulses applied on the transmission line.

Each time two data bits are received their respective values are provided on lines 1 5 and 1 6 to the inputs of a NOR gate 17, an EXCLUSIVE OR gate 18 and an AND gate 19.

Thus if the two data bits of a pair are both binary '0' the NOR gate 17 provides a signal on the line 5 whilst the EXOR gate 1 8 and the AND gate 1 9 provide no output signals and the counter 8 will decrement. Similarly if the two data bits are both binary '1' the AND gate 19 provides a signal on the line 7 and if the data bits are of opposite value ('01' or '10') the EXOR gate 18 provides a signal on the line 6.

It will be realised that if a counter having 'up' and 'down' inputs only is used the EXOR gate 1 8 and the connection 6 may be omitted.

The counter 8 is arranged such that if a further count is present on either of the lines 5 or 7 when the respective minimum or maximum value of the count is reached, the count is not implemented.

This ensures that when the cause of an error is rectified the counter is corrected to the count which it should have had if an error-free data stream had been received.

The error monitoring apparatus of Figure 2 may alternatively be arranged so that the counter 8 only supplies a signal to the output 10 when the counter is at its maximum count and there is a further increment signal on line 7 while the counter supplies a signal to the output 9 when the counter is at its minimum count and there is a further decrement signal on line 5.

Claims

1. A method of error monitoring in transmission systems transmitting digitally encoded data signals wherein an incoming data stream is divided into segments each of which has an equal plurality of digits of the data stream, a count is updated in dependence upon the respective total value of the digits in each of the segments in turn and, if the value of the count exceeds either a predetermined lower value or a predetermined upper value an error in the transmission of the data stream is indicated.

2. A method of error monitoring according to Claim 1 wherein the digitally encoded data is binary data.

3. A method of error monitoring according to Claim 2 wherein each of the segments of the data stream has two bits.

4. A method of error monitoring according to Claim 3 wherein said count is unaltered in respect of a particular segment if the two bits of that segment are of different values.

5. A method of error monitoring according to Claim 3 or Claim 4 wherein the count is incremented in respect of a particular segment if the two bits of that segment are of an equal value of one polarity and the count is decremented in respect of that segment if the two bits thereof are of an equal value of the other polarity.

6. A method of error monitoring according to any preceding claim wherein incrementing of said count is inhibited if said count reaches said predetermined upper value.

7. A method of error monitoring according to any preceding claim wherein decrementing of said count is inhibited if said count reaches said predetermined lower value.

8. A method of error monitoring according to any preceding claim wherein said predetermined upper value is a predetermined positive value of the count and said predetermined lower value is a predetermined negative value of the count.

9. A method of error monitoring in a transmission system substantially as hereinbefore described with reference to the accompanying drawings.

1 0. Apparatus for error monitoring in a transmission system substantially as hereinbefore described with reference to the accompanying drawings.

New claims or amendments to claims filed on 27th June 1983.

Superseded claim 1 New or amended claims:

1. A method of error monitoring in transmission systems transmitting digitally encoded data signals wherein an incoming data stream is divided into segments each of-which has an equal plurality of digits of the data stream, a count is updated in dependence upon the respective total value of the digits in each of the segments in turn and, if updating of the count would cause it either to equal or to exceed either a predetermined lower value or a predetermined upper value an error in the transmission of the data stream is indicated.