GB2112545A - Process controller - Google Patents

Abstract

A process controller comprises a microprocessor associated with memory holding an operating program, memory holding data identifying a sequence of process states, and a plurality of input/output interfaces. The data consists of a sequence of words specific to states of a process, and each word includes data identifying the input control signals required to move the controller to the next state and data identifying the control signals that it must output to the process for that next state. The microprocessor conducts a repetitive matching to determine if existing input control signals correspond with the data of any stored word of that process. <IMAGE>

Description

SPECIFICATION Process controller Instrumentation and control systems are frequently required to carry out a sequence of simple tasks.

Such a sequence may be initiated for example by a "START" signal from an operator, or an automatic "ALARM" signal from a sensor. The sequence will continue, checking other input signals and responding to them by operating the necessary control.

Time delays between control functions are often necessary.

Although the tasks or controls may be individually simple, for example "OPEN VALVE V4û7", or "START MOTOR 32", and although the sensor signals may also be simple, such sequences as a whole may be very complicated. In a great many cases the necessary instrumentation requires not only expensive and specialized electronic equipment, but also a lengthy and expensive design period in which to translate the specification into either slectronic components of special computer programs.

Existing techniques of design and implementation may be listed as follows: ti) Custom-designed relay logic systems.

;iiE Custom-designed semiconductor logic systems.

(iii) Custom-designed computer or microprocessor systems with special programs.

(iv) General purpose computer systems which may be "configured" to a special purpose.

These techniques are discussed beiow: (1) Mechanical relays may be used for switching and timing. Difficulties arise in providing long time delays, which need expensive special timers either pneumatic or electronic. Mechanical relay logic is mainly confined to very simple systems not involving long time delays. The resulting systems are bulky, acousitcally noisy, subject to mechanical wear, and require a large power supply. There are certain advantages to mechanical relay systems.

They can provide high-power control (in fact relays will be necessary on most motor control systems for the power control circuits) and they are resistant to quite gross electrical interference. In general, however, relay logic is the least attractive alternative.

(2) Sequence control may be provided by semiconductor logic elements such as combinational logic gates and bistables. In principle, any defined sequence may be provided by special circuits using elements of this type.

The design process is usually lengthy and notor iously error-prone. It requires skill not only in electronics, but also the techniques of sequential circuit design to avoid "races" and "hazards". After a lengthy special-purpose design a special-purpose design board must be constructed.

This is expensive and time consuming, particularly in relation to simple sequences.

(3) A number of manufacturers offer sofeware packages in their process control equipment which enable sophisticated sequencing to be carried out. If such a mini-computer system can be justified, such as system offers an excellent solution of the problem. It does, however, involve an outlay on an expensive system; also an outlay of time to learn the special language of sequence control.

Another "speciai computer" approach is a custom-built microprocessor system. Such systems provide an excellent solution and are frquently built.

However, they require a considerable design time for both the hardware and the software. The software design time is often formidable, and the program "debugging" task both onerous and difficult to check thoroughly.

(4) General purpose computer systems of the "Programmable Logic Controller" type offer at present the best method of executing a sequencing task. In general such systems emulate mechanical relays by computer program. If the sequence control is represented as a relay system, the sofeware can be reasonably simply configured to emulate the relay system and hence execute the control.

However, formulating the control sequence in the way demanded by the PLC is often difficult and tedious, although manufacturers have developed many softear aids to this.

Although PLCs and PLC type systems are quite an effective way of implementing sequence control, the design task is still quite demanding and the support system hardware and software is expensive and requires learning time. PLCs are not cheap in themselves, and their supporting systems may be very expensive.

Thus, sequence control systems at present available tend to have many disadvantages. The design process is awkward and lengthy, it may also be error-prone. The implementation of the design is usually expensive; it is, except for special-purpose designs, usually unnecessarily elaborate.

The present invention aims to provide a process controller which overcomes or reduces the disadvantages and difficulties of the existing techniques outlined above. It does this by using the general technique of analysing any process into a series of discrete steps of states, in each of which a specifiable set of conditions hold.

Accordingly, the invention provides a process controller comprising a microprocessor unit associ ated with memory holding an operating program, memory holding data identifying a sequence of process states, and a plurality of inputloutput inter faces, wherein said date is specific to a required process and each state is associated with at least data identifying specific control signals for the process and data identifying specific input control signals which will cause the controller to move from its existing state to a subsequent one.

The required two data sets are preferably confi gured within a single block of data specific to a state.

The input control signals preferably include timer output signals generated internaliy and initiated by the process control signals.

Such a controller is cheap to construct since its elements are individually cheap and easily available.

Its program is preferably invariable and usable for any desired process; onlythe data specific to the particular process needs to be injected, preferably into a ROM. The inputloutput interfaces are also configured according to the particular process.

In a preferred form of the invention, any necessary timing functions are internally performed, and this makes the controller an extrmely versatile and powerful tool.

In order that the invention shall be clearly understood, an exemplary embodiment thereof will now be described with reference to the accompanying drawings, in which: Fig. 1 shows a simple process plant to be control led; Fig. 2 shows a state sequence diagram for implementation of the required process; Fig. 3 shows a flow chart of the program; Fig. 4 shows a block diagram of the controller.

Consider now the process shown in Fig. 1. A possible control sequence might require the following steps: Start pump P1 Wait 30 seconds Open valve V1 Wait until level sensor L1 indicates Close Vl,stop P1 Start pump P2 Wait 30 seconds Open valve V2 Wait until level sensor L2 indicates Close V2, stop P2 Start stirrer S1 If temperature T1 rises to alarm level, start ALARM sequence Stirfor30 minutes Stop stirrer OpenV3 Check tank empty (L0 sensor) Start sequence again ALARM sequence Stop S1 Open V3 Sound ALARM etc.

Each stage of this process can be envisaged as a state in which a specified set of plant conditions hold true, and each set can be represented as a set of control signals required to produce those conditions. In Figure 2, the 'output word' in the right-hand column thus represents in each case a set of conditions, or process state, at least initiated by the control signals shown.

The transition from one stage to another is effected by input signals (either operator, or plant, or timer initiated) and the requirement to perform such a transition is represented in each case by an 'input word' which includes a specific data configuration, as seen in the left-hand Column of Fig. 2. It will be noted that the timer outputs are fed back as compo nents of the input words.

Thus, the sufficient data to control the process comprises, for each discrete state, one output word relative to that state and one input word identifying the conditions under which the transition to the next state should occur.

In operation, the microprocessor program recognizes itself always as being at a 'state', initially the passive "Pre-Start" state. In each state, the program accesses the configured part of its memory, the data, to find (i) the digital word it must put on the output for that state, (ii) any new timers to start, and (iii) the input word or words (these can be any number) it must recognize to make a transition to a new state. In the case shown, when the input word contains both the LO signal bit and the start signal bit a transition to the "P1 Start" state can be made from the 'pre-start' state. The program then finds the digital word for the new output, which contains the P1 start bit. It also starts an internal timer, timer 1, which will give a "1" signal after 30 seconds.This timer signal is used as a quasi-imputto initiate the next transition to the "V1 Open" state. The new output word for this state contains both the Pi and the V1 start bits, and the input word requires the signal from indicator L1.

Thus the process proceeds from state to state.

The translation of a specification, even a very complicated one, into such a state sequence is very simple and direct. When it has been drawn up, the configuration of the controller is quite simple. Basically the states are listed; each state has a corresponding output word, and possibly timer functions also; associated with each state are one or more input words, which will initiate a transition to another defined state. The input and output words for each state are configured into standard length digital words which are individually addressable.

Each such word requires approximately 10 bytes of data.

The microcomputer sofeware can be described by the flow-chart shown in Fig. 3. From a "pre-start state" forced by a power-up or other reset, the program makes state transitions according to input signals configured for each state in the data-base.

Each state is associated with two types of output: (i) a unique output word and (ii) timer signals which augment the output word.

Each state will also have one or more input words which will cause transition to a new state. The program conducts a continuous, repetitive matching process to establish whether the present inputs match an input word among its data. If so, a transition occurs.

Atypical hardware configuration is shown in Fig.

4. This configuration was a Motorola M6802 microp rocessor, a 2k byte ROM for the main program, and a separate ROM for the configured data. Four M6821 PIA chips are used providing 64 flexibly assignable input or output bits (e.g. 32 inputs, 32 outputs, or 10 inputs, 54 outputs, etc, etc.}.

Such a chip set has a very modest cost Two further points may be made Firstly, by providing a number of possible input words', a process may be moved on from any one state to one of a number of possiblesubsequent states. The alarm possiblility shown in Fig. 2 is an example of this. Secondly, it is not essential that the timer signals shall be actually fed back, since the circuitry may include a monostable which re-sets automatically at the end of a timed period.

Claims (7)

1. A process controller comprising a microprocessor unit associated with memory holding an operating program, memory holding data identifying a sequence of process states, and a plurality of input/output interfaces, wherein said data is specific to a required process and each state is associated with at least data identifying specific control signals for the process and data identifying specific input control signals which will cause the controller to move from its existing state to a subsequent one.

2. A process controller as claimed in Claim 1 wherein said microprocessor conducts a repetitive search routine to match the data identifying specific input control signals with the actual input control signals at the input interfaces, and when it makes a match causes the controller to progress to its next state and to output the respective data identifying specific control signals.

3. A process controller as claimed in Claim 1 or 2 wherein the input control signals may be provided by an operator, a process signal or a timer.

4. A process controller as claimed in any preceding claim wherein said data comprises a series of words, each word being specific to one state and including the data associated with that state.

5. Aprocess controller as claimed in any preceding claim wherein said microprocessor includes a timer, the signal from which can be used to progress the controller to the next state.

6. A process controller as claimed in any preceding claim wherein said sequence of process states may branch at any required points, pre-determined or not, by the provision of data identifying alternative specific input control signals to which the controller may respond.

7. A process controller substantially as herein described with reference to the accompanying drawings.