GB2110896A - Electromagnetic signal receiver and processor for providing frequency data of received signals - Google Patents

Abstract

An electromagnetic signal receiver and processor including an IFM receiver 22 connected directly to an antenna 12 for developing frequency data, a pulse status unit 54 also directly connected to the antenna for developing, inter alia, a control signal when the pulse of the received electromagnetic signal exceeds a preselected width, and an IFT receiver 52 which is connected to the antenna through a delay 40 and a blanking network 44, in that order. The blanking network 44 is controlled by the control signal, and is unblanked when the pulse width of the received electromagnetic signal is greater than the preselected width to allow the delayed signal to be processed by the IFT receiver 52. A memory 56 stores selected frequencies for comparison with the frequency data developed by the IFM receiver 22. A further control signal is developed by the network, which compares the output of the IFM receiver 22 and the frequency data stored in memory 56 to control the blanking network 44. <IMAGE>

Description

SPECIFICATION Electromagnetic signal receiver and processor for providing frequency data of received signals This invention relates to electromagnetic signal receivers, and more particularly to a device capable of processing received signals and providing fre quency data for both short and long duration pulses including continuous wave (CW) signals.

Heretofore, two types of receivers have been available which are capable of processing RF signals and determining the frequency of the received signals, but each receiver had its own particular advantages and disadvantages, and none combined the desired advantages of both the available types of receivers.

For example, one type of receiver in extensive use today to determine the frequency of received RF signals, particularly in the radar frequency spectrum extending from below 2 GHz to above 6 GHz, is the IFM Receiver (Instantaneous Frequency Measuring Receiver) such as ANAREN Digital Frequency Discriminator(DFD), Model 18260which is commercially available from Anaren Microwave, Inc. of Syracuse, New York. For such an IFM receiver to work properly, it is necessary to remove the major amplitude variations of the power level of the incoming signal which is generally accomplished by a limiting amplifier such as the AVANTEK AML-2000 Series GaAs FET amplifier which is commercially available from Avantek, Inc. of Santa Clara, California.For the purpose of the ensuing description and the appended claims, the term IFM receiver includes the limiting amplifier which controls the power level of the incoming signal.

One of the great advantages of the lFM receiver is its short response time which enables it to determine the frequency of the received radiation and output this frequency in digital format in between 50 and 250 nanoseconds. Another advantage of the IFM receiver is its large band width which may extend from below 2 GHz to above 6GHz. For applications involving countermeasures and other military objectives, such as friend-foe recognition, the short response time and the large bandwidth are most desirable qualities and are the primary reasons for the popularity of the IFM receiver.However, the IFM receiver also has a number of limitations which detract from its usefulness and which include its inability to process more than one received signal at any given time and, if receiving more than one signal at one time, of always selecting the stronger one for processing. This makes it susceptible to jamming when a strong signal, having a long pulse duration or a continuous wave (CW) signal, is received, the IFM receiver then processes only the jamming signal and is not receptive to the important or significant signals whose detection is the primary purpose of the receiver. Another disadvantage of the IFM receiver is its inability to provide amplitude data of the received and processed signal.

For the sake of completeness, it should be understood that the conventional IFM receiver normally has at least three inputs and three outputs, only some of which will be important in connection with the present invention. The three inputs to the IFM receiver are the received RF signal, the DATA READ signal and the DATA ACKNOWLEDGE signal, and its output signals are the DIGITAL FREQUENCY signal, the SIGNAL PRESENT signal, and the DATA READY signal. The IFM receiver also contains a built-in threshold detection circuit which is adjustable and which prevents the receiver from processing any signals having an amplitude below a set threshold thereby preventing the receiver from being triggered by noise or a noise like signal.This threshold detection circuit generates the SIGNAL PRESENT output only if the received RF signal is above the selected threshold and is being processed to provide the DIGITAL FREQUENCY signal. The SIGNAL PRE SENT signal occurs usually 50 nanoseconds after receiving the RF signal. After another 50 to 250 nanoseconds the DIGITAL FREQUENCY signal is developed and placed in an internal storage register, a condition normally indicated by the occurrence of the DATA READY signal. The data in the internal register is generally read out of the register upon the application of the DATA READ signal, and after the successful transfer of the frequency signal out of the storage register to utilization device, the DATA ACKNOWLEDGE signal is generated which will reset the IFM receiver for the processing of further received signals.

Another receiver in use today which was developed after the IFM receiver, is the IFT receiver (Instantaneous Fourier Transform) such as the ITEK IFT Model 200-1 which is commercially available from the Applied Technology Division of Itek Corporation of Sunnyvale, California. This receiver utilizes a HeNe gas laser, in conjunction with an acousto-optic device capable of providing frequency and amplitude measurement of received signals.

The output of the IFT receiver is derived from a linear array of photodetectors, which, unlike the IFM receiver, produce an output measure of the frequencies present as well as amplitudes of a number of simultaneous signals.

One of the great advantages of the IFT receiver, therefore, is its ability to measure the frequency of a number of simultaneously occurring signals, as well as their amplitudes, so that it is not subject to jamming by simultaneous signal events and is able to provide frequency data for all signals simultaneously received. The IFT band-width is much smaller than that of the IFM receiver and extends normally only through a frequency range of 500 to 1000 MHz. Further, the IFT receiver has an output response time which is long when compared to that of the IFM receiver, due to the nature of the detector readout process.

The data derived from the IFT receiver is analog in form as far as amplitude is concerned and is normally applied to an analog-to-digital converter to obtain digital amplitude data. Further, frequency information is provided by photodetector position in the array so that reformatting of the data is required to put it in the same form as the output from the IFM receiver for further processing buy a utilization device.

The present invention provides an electromagne tic signal receiver and processor for determining received signal frequency information which in cludes the advantages of rapid response and great band width of the IFM receiver and the simultaneous frequency capability and amplitude determination facility of the IFT receiver.

The present invention provides an electromagnetic signal receiver and processor for developing frequency information which is ordinarily not sub jest to long pulse or CW jamming and which provides frequency data of received signals heretofore not even available by the use of separate IFM and IFT receivers.

The invention combines the advantages of the IFM and IFT receivers and can operate under conditions under which either the IFM or the IFT operating separately would fail.

The invention provides an indication when the IFM receiver is receiving simultaneous or overlapping signals so that its output frequency signal measurement may be discarded as unreliable. Moreover, the invention is responsive to a listing of frequency data of certain known signals, and is operative to take a predetermined action upon recognizing those frequency data.

The electromagnetic signal receiver and processor of the present invention essentially includes an antenna responsive to received electromagnetic signals to provide received RF signals. An IFM receiver is responsive to the received RF signals to provide digital data on the frequencies present in the received RF signals. A pulse status unit also responds to the received RF signals, and provides an unblanking signal only when a received RFsignal has a pulse width greater than a predetermined width. A mixer is also responsive to the received RF signals, and provides intermediate frequency signals. A circuit receives the intermediate frequency signals, and delays the signals by a predetermined time interval. An IFT receiver is responsive to the delayed signals to provide spectral data on the frequencies present in the delayed signals.A blanking circuit is disposed between the delay means and the IFT receiver and normally blanks a signal applied thereto. However, the blanking circuit is responsive to the unblanking signal to allow the delayed signals to pass the IFT receiver for normal processing.

Figure lisa schematic block diagram of the electromagnetic signal receiver and processor of the present invention.

Figure 2 is a more detailed schematic block diagram of the pulse status unit shown in Figure 1 which is used for controlling, inter alia, the blanking of the input signal to the IFT receiver.

Figure 1 depicts the electromagnetic signal receiver and processor of the present invention in block diagram form, and shows a suitable antenna 12 for receiving the electromagnetic (RF) signals of interest which, normally, are within a range extending from below 2 GHzto above 6GHz. The RF signals from antenna 12 are applied to a conventional signal splitter 14 which divides the signal into three portions which are applied, respectively, to lines 16, 18 and 20. Line 16 is connected to a conventional IFM receiver 22 which, normally but not necessarily, has two other input signals, namely the DATA READ signal on lead 24 and DATA ACKNOWLEDGE signal on line 26.The conventional IFM receiver also has, as already mentioned, three output signals, namely the DIGITAL FREQUENCY signal on line 28, the SIGNAL PRESENT signal on line 30 and the DATA READY signal on line 32.

The received signal on line 16 is an RF signal and the DIGITAL FREQUENCY signal on line 28 is a multi-digit signal derived from an internal storage register in IFM receiver 22. The remaining signals, such as the DATA READY signal, the DATA ACK NOWLEDGE signal, the DATA READ signal and the SIGNAL PRESENT signal are normally digital signals which are either zero or one, as well known to those skilled in the art.

The received RF signal is also applied to a conventional mixer 34 which is controlled by a mixer frequency select network 36 for the purpose of converting the frequency of the received RF signals, which are in 2 to 6GHz range, to a lower frequency range, such as 1000 MHz since the conventional IFT receiver can only handle lower ranges of frequencies. Typically, mixer 34 and mixer frequency select network 36 converts the incoming frequency to a band of 500 MHz centered at 1 GHz. The down-conversion of the frequency of the received RF signal is well understood to those skilled in the art and comprises the mixing of two high frequency signals to generate an output which is commensurate with the difference between the two frequencies, utilizing the normal heterodyne principle.

The down-converted received RF signals are then applied, via lead 38 to a delay line 40 which delays the signal to the IFT receiver by a short time interval, such as by 5 microseconds. The delayed output signal is then applied, via lead 42, to an attentuator/ blanking network 44, which may be a conventional attenuator with a control lead, which includes a passive attenuator section at the input section and a logical control section which is enabled by a control signal on lead 46 generated by an IFT blanking logic network 48 which may be a conventional OR gate.

The delayed output signal from attenuatoriblanking network 44 is then applied, in the case of an enabling control signal on line 46 which unblanks network 44, via lead 50 to a conventional IFT receiver 52 for generating frequency and amplitude data of the received radiation, as well known to those skilled in the art.

The received RF signal on line 18 is also applied to a pulse status unit 54PSU) which provides at least two different output signals, namely SIMUL TANEOUS SIGNAL DETECTOR signal, also referred to as the SSD signal and the PULSE WIDTH DISCRI MINATOR signal also referred to as the PWD signal.

Pulse status unit 54 will be explained in more detail in connection with the description of Figure 2. Also applied to pulse status unit 54 is the SIGNAL PRESENT signal from IFM receiver 22 which functions as an enabling signal for the signals developed by PSU 54 as will also be explained hereinafter.

One output signal of pulse status unit 54, namely the PWD signal, is utilized to control blanking network 44 to allow the selective processing of the delayed signal by IFT receiver 52. With respect to control line 46, "enable" means unblank and "inhibit" means blank.

There is further provided a memory 56, which is usually in the form of a memory array for the storage of a large number of frequencies within the frequency range of interest of the received RF signal.

Memory 56 is normally divided into at least two groups of memories, one for storing frequencies which are definitely of interest and one for storing frequencies which are definitely not of interest.

Memory 56 provides a control signal on lead 58 which is normally of digital form and which is also applied to IFT blanking logic network 48 to provide enabling signal to unblank network in case of a frequency of interest and to blank or inhibit that network in case of a frequency of no interest. In this manner, many frequencies detected by IFM receiver 22, which are not of interest, are prevented either from being detected by IFT receiver 52 or, if so detected, from being sent on along associative memory output line 60 to an operator or a computer or some other utilization network which utilizes the frequency and amplitude determinations made by the receiver-processor of the present invention.

In this connection, it should also be noted that the digital frequency output signal from IFM receiver 22 is applied, via output lines 28 and 62, to one of the inputs of associative memory 52 and that the many frequency signals developed by IFT receiver 52 are, after suitable conversion into digital form by an A/D converter unit 64, are likewise applied to memory 56 along lead 66. Even though the output signals from IFM receiver 22 are available on line 28, the preferred embodiment of this invention, contemplates screening these signals by memory 56 before passing them on to further processing along output signal lead 60.

The same is true of the frequency data developed by IFT receiver 52 which are available on output line 53, but which are preferably screened by memory 56 before being passed on to output signal line 60.

Referring now to Figure 2 of the drawings, there is shown a more detailed block diagram of pulse status unit 54. Basically pulse status unit 54 comprises a power signal splitter 100 to which the received RF signal from lead 78 is applied and which splits up the received RF signal into two branches, one being applied to a simultaneous signal detector 102 which develops the SSD signal and the other being applied to the series combination of a threshold signal detector 104 which develops a TDS signal, and a pulse width discriminator 106 which develops the PWD signal. At the output end of PSU 54, the output form the subnetworks just mentioned are applied to AND gates 108 and 112, respectively, each of which is enabled by the SIGNAL PRESENT signal from IFM receiver 22 on lead 30.More particularly, the output signal of AND gate 108 is referred to as the SSD signal which is developed by simultaneous signal detector 102, and the output signal of AND gate 112 is the PWD signal which is developed by pulse width discriminator 106.

Simultaneous signal detector 102 includes, in the order stated, a suitable band pass filter 114 having a 2 to 6GHz passband, a homodyne detector (mixer) 116 which develops the difference frequency between two simultaneously received signals, a low pass filter 118 having a cutoff frequency of 2 GHz, a video detector 120, and a high gain comparator 122 which is triggered when the difference between any two simultaneous signals received by ban-pass filter 114 has a difference of 2 GHz or less, such triggering providing a digital output signal which is either high or low.

It is of course immediately recognized that the lowpass filter determines the frequency separation between any two simultaneously occurring events for which detector 102 will provide a SSD signal. In the illustrated detector, a SSD signal is only developed when the simultaneously occurring events are separated by not more than 2 GHz. Other selections of the cutoff of the lowpass filter are possible.

The operation of simultaneous signal detector is as follows. Assume two simultaneous pulse signals occurring at 3 and 4GHz, both passing through the bandpass filter 114 and mixing in the homodyne detector 116 to produce a difference frequency of 1 GHz which is below the cutoff of lowpass filter 118.

The 1 GHz, signal is detected in detector 120 and if it is of sufficient amplitude, it triggers the threshold amplifier 112 to indicate a simultaneous event which is an output of AND gate 108.

The operation of threshold detector 104 and pulse width discriminator 106 is as follows. The received signal is applied to a video detector 124 where it is detected, and a video signal is developed which is applied to a log video amplifier 126. The detected and amplified video signals are then compared with an adjustable reference level in a comparator 128 which provides a digital output signal which is high for all signals greater than the reference signal. In other words, if the output of amplifier 126 is larger than the input from the reference level, a digital output is developed which, after passing through AND gate 110, becomes a TDS signal. The TDS signal is a required input signal to pulse width discriminator 106 to assure timely response to the leading edge of an incoming signal.

Pulse width discriminator 106 only receives a signal if threshold signal detector 104 has a high output, and this output is split into a two path network, one of which includes a one-shot monostable multivibrator 130. The outputs of both paths are applied to a comparator 132 which, in this manner, will compare the leading edge of the pulses with the time interval set by the mono-stable multivibrator 130 and, if the lagging edge of the pulse arrives after the one-shot multivibrator 130 has fired, comparator 132 produces a negative output for pulses having a pulse width less than the one-shot mono-stable multivibrator 130 and a positive output for pulses having a pulse width greater than the cycle time of the one-shot multivibrator 130. This output is then applied to a diode 134 which eliminates the negative going signal and the output of diode 134 is then applied to a second comparator 136 which produces a digital signal when the detector output is positive.

The operation of the electromagnetic signal receiver and processor of the present invention will now be explained with the aid of varying input signals that antenna 12 may see. For a better understanding of the operation of the present invention, the explanation will be divided into six different cases, each case illustrating a particular set of received signals.

Assume as a first case that the received signal comprises only a single long pulse which includes the case of a CW signal. The received signal is applied to IFM receiver 22 via lead 16, and assuming the signal being above the minimum threshold to which the IFM receiver is adjusted, it is processed by the receiver. About 50 nanoseconds after receipt, the receiver provides a SIGNAL PRESENT signal on line 30 and about 50 to 200 nanoseconds later a DATA READY signal will appear on line 32 indicating the storage of the frequency data in digital form in an output register.If is is desired to immediately transfer the frequency data to line 28 for receipt by other equipment, as will be discussed hereinafter, a DATA READ signal is applied to line 24 to cause IFM receiver 22 to release the frequency data, and upon reception of the frequency data by some auxiliary equipment such as a computer (not shown), the computer will acknowledge receipt of the data by sending a DATA ACKNOWLEDGMENT signal which resets IFM receiver 22 to be ready for processing the next received signal.As a practical matter, and for the purpose of the ensuing description of this invention, the IFM receiver may be modified, as well known to those skilled in the art, by dispensing with the DATA READ signal on line 24 and the DATAACKNOWLEDGMENT signal on line 26 and by transmitting the frequency data as soon as available, and upon transmitting the frequency data as soon as available, and upon transmission of these data have the receiver reset itself automatically to be ready for the next step.The long pulse or CW signal is applied, at the same time, to pulse status unit 54 where the threshold is determined and, assuming that it is above a minimum predetermined level, a THRESHOLD DETECTION signal is developed and applied to pulse width discriminator 106 which makes the determination whether the pulse width of the received signal is above or below a predetermined width. The network is set by adjustment of one-shot multivibrator 130 to make a distinction between long pulses and short pulses for the purpose of generating a "high" PWD signal only if the pulse width of the received signal is larger than the predetermined pulse width so that network 44 can be unblanked.For the purpose of this invention, if the pulse width of the received signal is greater than a predetermined pulse width, the received signal can also be a CW since discriminator 106 distinguishes only between pulses which are shorter or longer than a predetermined pulse width. Since it was assumed in this case that the incoming signal is either CW or a pulse longer than a predetermined pulse width, a "high" PWD signal will be developed by discriminator 106 and will become available from logic network 112. The received signal is also applied, via lead 20, to mixer 34 and to delay 40 where it is held for 5 microseconds to give pulse status unit 54 sufficient time to make a determine tion whether the pulse in the received signal is a long pulse or a short pulse and develop the PWD control signal to unblank blanking network 44 in case of a long pulse.Since in this case we postulated a long pulse or CWsignal, a PWD control signal is developed which will unblank network 44 to allow the received signal to pass through it and to be applied to IFT receiver 52 which will process the same and develop an output of frequency and amplitude data of the received CW signal. Another way of stating this that pulse width discrimination network 106 develops a blanking signal for a pulse less than the predetermined width and an unblanking signal for a pulse greater than the predetermined width.

Assume as a second case that the received signal is a short pulse only, which means that it is a pulse whose width is less than a predetermined width so that the PWD control signal developed by pulse status unit 54 is in the logical state which will not unblank network 44 thereby preventing the short pulse from reaching IFT receiver 52. The short pulse is applied, via line 16, to IFM receiver 22 which, with its fast characteristic speed, develops frequency data of the received signal for storage in its output register. Likewise, a signal present is developed on line 30 but since the pulse status unit 54 does not develop a PWD signal indicative of a long pulse, and since dealy 40 is sufficiently long to prevent the short pulse form reaching the IFT receiver 52 before development of appropriate PWD control signal, the received signal is never applied to IFT receiver 52.

Assume as a third case that the received signal is a short pulse of high amplitude in the presence of the CW or long pulse at lower amplitude. Since it is a characteristic of IFM receiver 22 to select only the highest amplitude received signal, a further assumption has to be made. Assuming that both of the received signals have the same leading edge so that IFM receiver 22 will lock on to the higher amplitude short pulse and will immediately develop the appropriate frequency data. Pulse status unit network 54 likewise receives both of these pulses and simultaneous signal detector 102 will develop an output signal indicative of the fact that more than one signal is present. This signal, referred to as the SSD signal, provides an indication that the output of the IFM receiver 22 is not trustworthy because more than one pulse was received, and the frequency data should be disregarded. This is particularly true if IFM receiver 52 starts processing a lower amplitude pulse and a higher amplitude pulse comes along before processing of the low amplitude pulse is completed, in which case the. tFM receiver 22 will lock on the higher amplitude pulse and give unreliable results. Pulse status unit 54 will also develop a short pulse indication signal which prevents the signal on line 20 from reaching IFT receiver 52.

However, after short time, the short pulse is na longer present and instead IFM receiver 22 is faced with a long pulse. It will then develop the frequency data of the long pulse, provide a SIGNAL PRESENT signal while the pulse status unit 54 develops a long pulse signals for the PWD signal to allow the long pulse signal to reach IFT receiver 52 where the long pulse is analyzed and frequency data are provided.

Assume as a fourth case a received signal which has multiple long pulses of varying amplitude. In this particular case, IFM receiver 22 will provide frequency data with respect to the highest amplitude long pulse it receives and also provide a SIGNAL PRE SENT signal on line 30. Pulse status unit 54 will see several long pulses and develop a PWD signal which will allow the received signal to pass the IFT receiver 52 where all pulses, assuming them to be within the relatively narrow band width compatible with the IFT receiver, are analyzed with the appropriate frequency and amplitudes being provided. In this, the SIGNAL PRESENT signal on line 30 is also an indication to the remainder of the system that IFM receiver 22 is busy, has a signal, and wants IFT receiver 52 to take whatever comes in.In other words, jamming of IFM receiver 22 by a strong CW signal converts the SIGNAL PRESENT signal into the equivalent of a "busy" signal and since the CW is a long signal it will open blanking network 44 to allow short and along pulses and whatever else is received to go to IFT receiver 52 to be analyzed, assuming the pulse in the received signal being long enough for analysis purposes.

Assume as a fifth case that the received signal comprises multiple short pulses of different amplitudes. The received radiation will be processed by FM receiver 22, and since all pulses are short, pulse status unit 54 will not enable blanking network 44 so that no pulses reach IFT receiver 52. In this connection it should be noted that simultaneous signal detector 102 will provide a logical output signal whenever pulses occur simultaneously, or at least close enought to be within a predetermined time interval, to indicate to a user of the frequency data that the data are unreliable.For example, if the first pulse to be processed by IFM receiver 22 is a higher amplitude pulse, and a second incoming pulse is a low amplitude pulse, there is no problem because the IFM receiver 22 will continue with the processing of the higher amplitude pulse and the output data are reliable. However, if the first pulse received by IFM receiver 22 is a lower amplitude pulse than the subsequently received pulse, then the IFM receiver will start processing the higher amplitude pulse upon receipt making the data unreliable. The SSD signal from pulse status network 54 is preferably entered tinto the IFM output register as a digit which can be read during subsequent utilization of the frequency data to apprise the user that the data is unreliable.

Assume as a sixth and last case that the received signal comprises multiple long and short pulses of varying amplitudes, a situation that is most often encountered in actual use. IFM receiver 22, will, at all time, process the strongest pulse to which it is exposed regardless of whether it is a short or long pulse. Accordingly, the various pulses in the received signal will contend for being processed by the IFM receiver 22 with the strongest one at any one time being the one processed. In the event of the arrival of simultaneous pulses, an SSD signal will be developed which will warn the user that the IFM frequency data may be unreliable. At the same time, and as a signal is being processed, a SIGNAL PRESENT signal appears on line 30 which will enable the various AND gates in pulse status unit 54.

Likewise, as long as the AND gates are enabled, PWD signals are continually being developed for pulses that are long which enable blanking network 44 to allow these various pulses to reach IFT receiver 52 for processing.

If the frequency detected by IFM receiver 22 is one that is of no interest at all, and stored as such in associative memory 56, the memory provides a signal on output line 58 to logic network 48 to advise it that this is a non-interest signal and therefore to enable blanking network 44 to prevent burdening IFT receiver 52 with processing unnecessary or unwanted data. Likewise, output signals from memory 56 on line 60 exclude frequency data not of interest so that the utilization device to which output signal line 60 is connected does not include many frequencies that are either undesired or that should perhaps be treated with some priority.Output signal path 60, even though shown as being a signal line, preferably comprises two lines, one being a priority line which carries only frequency data of recognized important frequencies while the other line carries the remainder of the frequency data of the received signal.

There has been described an electromagnetic signal receiver and process which develops frequency data on received signals which includes most of the advantages of the IFM receiver, such as speed and bandwidth, as well as the advantages of the liFr receiver, such as frequency data from multiple signals and amplitude information with respect to the various signals. Likewise, the device is not subject to ordinary jamming since any attempt to jam the IFM receiver will provide a signal present which enables certain logic networks which allows all other signals to be received by the IFT receiver for processing.

Claims (12)

1. An electromagnetic signal receiver and pro cessorfor providing frequency data on received signals, comprising: antenna means responsive to the electromagnetic signals and operative to provide receive RF signals, IFM receiver means responsive to said RF signals and operative to provide digital data on the frequencies present in said received RF signals; a pulse status unit responsive to said received RF signals and operative to provide an unblanking signal only when a received RF signal has a pulse width greater than a predetermined width; a mixer responsive to said received RF signals and operative to provide intermediate frequency signals; delay means responsive to said intermediate frequency signals and operative to delay such signals by a predetermined time interval; IFT receiver means responsive to said delayed signals and operative to provide spectral data on the frequencies present in said delayed signals; and blanking means disposed between said delay means and said IFT receiver means which normally blanks a signal applied thereto, said blanking means being responsive to said unblanking signal and operative to unblank said blanking means to allow said delayed signals to pass to said IFT receiver means for normal processing.

2. An electromagnetic signal receiver and processor in accordance with Claim 1, wherein said pulse status unit includes a pulse width discriminatorwhich is responsive to the leading edge ofa pulse of said received RF signals and operative to determine the occurrence of the expiration of a time interval commensurate with said predetermined width, prior to the occurrence of the lagging edge of said pulse, and which generates said unblanking signal only when said lagging edge occurs after said time interval has expired.

3. An electromagnetic signal receiver and processor in accordance with Claim 2, wherein said pulse status unit further includes a threshold detector which is responsive to the amplitude of said received RF signal and operative to provide a threshold detector output signal only when the amplitude of said received RF signal is greater than a preselected threshold amplitude, said pulse width discriminator operating on said detector output signal.

4. An electromagnetic signal receiver and processor in accordance with any preceding claim, wherein said pulse status unit further includes a simultaneous signal detector which is responsive to signals of different frequencies and operative to provide a simultaneous signal detector signal upon the occurrence of at least two signals differing in frequencies, the presence of a simultaneous signal detector signal providing an indication to a user of possible unreliability of the digital data of the frequencies provided by said IFM receiver means.

5. An electromagnetic signal receiver and processor in accordance with any preceding claim, wherein said blanking means is also responsive to a further unblanking signal, and which further includes a memory in which a plurality of preselected frequencies are stored, and means for comparing the data of the frequencies developed by said IFM receiver means with said preselected frequencies and for developing said further unblanking signal only in the absence of a match.

6. An electromagnetic signal receiver and processor in accordance with any preceding claim, wherein said blanking means further includes a logic network responsive to said unblanking signal and said further unblanking signal and for unblanking said blanking network upon the occurrence of either or both.

7. A method of receiving and processing electro magnetic signals with the parallel combination of an IFM receiver and an IFT receiver to derive frequency data on the received electromagnetic signals, com prising the steps of: receiving the electromagnetic signals and developing received RF signals; ap plying one portion of the received RF signals directly to the IFM receiver for generating digital data on the frequencies present in the received RFsignals; determining whether the pulse width of the received RF signals exceeds a preselected pulse width; converting another portion of the received RF sig nals to an intermediate frequency domain which is commensurate with the input requirements of the IFT receiver; delaying the intermediate frequency signals a preselected time interval which is not less than the time interval required to make the pulse width determination; and applying the delayed signal to the IFT receiver for generating spectral data of the frequencies present in said delayed signals only in the event that the pulse width of the corresponding RF signal exceeds the preselected pulse width.

8. A method of receiving and processing electromagnetic signals in accordance with Claim 7, in which the pulse width determination is made by first noting the leading edge of the pulse and then determining whether the selected time interval expires prior to noting the lagging edge of the pulse.

9. A method of receiving and processing electromagnetic signals in accordance with Claim 8, in which the determination of the pulse width is preceeded by the step of determining the amplitude of the pulse and determingthe pulse width only if the amplitude exceeds a preselected threshold amplitude.

10. A method of receiving and processing electromagnetic signals in accordance with any preceding claim, including the further step of developing the difference frequency of any simultaneously received RF signals and developing a simultaneous signal in the event that such difference frequency is outside the frequency range of the received and processed electromagnetic signals to indicate the potential unreliability of the derived frequency data.

11. A method of receiving and processing electromagnetic signals in accordance with any preceding claim, including the steps of storing certain frequencies in a memory comparing the derived frequency data with the stored frequencies, and applying the developed signal to the IFr receiver only in the absence of a frequency match.

12. An electromagnetic signal receiver and processor for providing frequency data of received signals, substantially as herein described with reference to the accompanying drawings.