GB2108755A - Thin film devices having diffused interconnections - Google Patents
Thin film devices having diffused interconnections Download PDFInfo
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- GB2108755A GB2108755A GB08226037A GB8226037A GB2108755A GB 2108755 A GB2108755 A GB 2108755A GB 08226037 A GB08226037 A GB 08226037A GB 8226037 A GB8226037 A GB 8226037A GB 2108755 A GB2108755 A GB 2108755A
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- thin film
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- 239000010409 thin film Substances 0.000 title claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 27
- 238000009792 diffusion process Methods 0.000 claims description 22
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000010354 integration Effects 0.000 abstract description 5
- 239000011521 glass Substances 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 19
- 229910052782 aluminium Inorganic materials 0.000 description 10
- 239000004411 aluminium Substances 0.000 description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 9
- 238000000151 deposition Methods 0.000 description 7
- 230000008021 deposition Effects 0.000 description 5
- 238000010276 construction Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000007599 discharging Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
- H01L31/0465—PV modules composed of a plurality of thin film solar cells deposited on the same substrate comprising particular structures for the electrical interconnection of adjacent PV cells in the module
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
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- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A thin film device, such as an amorphous thin film solar battery, is made with high integration by using metal-diffused regions (24) in the thin film (23) as connection regions across the thickness of the thin film (23). The metal-diffused regions (24) connect transparent stripe-shaped electrodes (21), disposed between a glass substrate (20) and an amorphous silicon thin film (23), to stripe-shaped metal electrodes (25) on the thin film (23), thus forming a solar battery comprising series-connected cells. <IMAGE>
Description
SPECIFICATION
Thin film devices and methods of making such devices
The present invention relates to thin film devices comprising a thin film (for example an amorphous silicon thin film) on a substrate. The present invention relates also to methods of making such devices. The invention is applicable, for instance, to thin film devices wherein active or inactive devices on the substrate are disposed in one state or another for integration and extension.
More particularly, but not exclusively, the present invention is applicable to an amorphous type silicon solar battery wherein many battery elements or cells are connected in series.
As is known, integrated circuits are made by the integration of diodes, transistors and so forth on a monocrystalline (single crystal) silicon substrate. A problem with such circuits is that they are of high price since they are of twodimensional construction on an expensive silicon single crystal substrate of which only a very shallow surface part is utilised. In recent years, in order to improve integration of semiconductor devices, various proposals have been made. For instance, three-dimensional circuit constructions have been proposed. One example of such a proposed construction is to bore openings through an epitaxially grown single crystal layer and to effect vapour deposition thereon so as to make contact with an underlying electrode or layer. But the method is not easy, and has not been brought into actual use because it involves many troublesome steps.
A thin film solar battery which has an optoelectronic conversion thin film of a substrate is exemplified by an amorphous silicon solar battery, wherein many unit cells are connected in series on the substrate as shown in Figure 1 (a) of the accompanying drawings, which is a schematic perspective view of a known series-connected solar battery. In Figure 1(a), a plurality of first electrodes 2, comprising a transparent conductive film, having a predetermined pattern, are formed on a transparent substrate 1. A thin film 3 comprising an amorphous silicon strip-shaped layer of a known pin structure is formed on each of the first electrodes 2. A second electrode 4 is formed on each of the thin films 3 and on a laterally extending part of the first electrode 2 of the next cell.In this known device, front end parts 5 shown in Fig. 1 (a) constitute series connections, where each first electrode 2, a second electrode 4 disposed over such electrode 3 and a thin film 3 between them forms one cell of the solar battery; and each first electrode 2 is connected to the second electrode 4 or the next cell at the front end parts 5, thereby connecting the cells in series to form the solar battery. With the construction as shown in Figure 1 (a), when the size of the device becomes large and therefore the length I of the device also becomes large, the average length of the current path becomes long thereby increasing the series resistance of the device.
Another exemplary known device is shown in
Figure 1(b), wherein strip-shaped transparent first electrodes 7 are formed parallel to one another on a transparent substrate 6. A strip-shaped thin film 8 of amorphous silicon of a pin layer structure is disposed on each of the transparent first electrodes 7, and strip-shaped second electrodes 9 are formed on the thin films 8. The first electrodes 7 and the second electrodes 9 are formed and connected as follows. Each first electrode 7 extends slightly leftwardly (as viewed in Figure 1 (b)) for all of its length beyond the corresponding thin film 8 thereon. Each thin film 8 is formed to extend slightly rightwardly beyond the right hand edge of the corresponding first electrode 7 thereby to touch the substrate 6.Each second electrode 9 extends slightly rightwardly for all of its length beyond the area over the corresponding thin film 8 under it. In this way, each second electrode 9 has its right hand edge part connected to the left hand edge part of the first electrode 7 of the adjacent cell on its right, thereby effecting a series connection of all the cells on the substrate 6, each along its whole length. Therefore, in this known arrangement of
Figure 1(b), even if the length of the device becomes large, this does not increase the current path. However, in this device, since the amorphous silicon is deposited by glow discharging under a relatively low vacuum of about 1 Torr, the discharging is disturbed by a pattern mask used for forming the thin film amorphous silicon in discrete strip shapes.
Therefore, the precision of the thin film pattern is not sufficiently high, so that a considerable area is needed for isolating neighbouring cells and the utilisation of the substrate area is limited. Thus, this known device is subject to the problem that a precise mask pattern is needed to form the amorphous silicon thin film, which is troublesome.
The present invention provides a thin film device comprising a substrate,
first electrode means of a predetermined pattern formed on the substrate,
a thin film of a predetermined pattern formed on a selected part of the first electrode means and an exposed part of the substrate, the thin film having at least one diffused region contacting at least a part of the first electrode means, and
a second electrode means of a predetermined pattern formed on a selected part of the thin film and contacting an end of the diffused region whereby the diffused region connects the first electrode means and the second electrode means.
The present invention also provides a method of making a thin film device, the method comprising the steps of
forming a first electrode means of a predetermined pattern on a substrate,
forming a thin film on a selected part of the first electrode means and an exposed part of the substrate,
diffusing metal from a diffusion source into the thin film to form at least one diffused region contacting the first electrode means, and
forming a second electrode means on the thin film and in contact with the diffused region whereby the diffused region connects at least a part of the first electrode means and at least a part of the second electrode means.
The invention will now be further described, by way of illustrative and non-limiting example, with reference to the accompanying drawings, in which:
Figures 1 (a) and (b) are perspective views of exemplary known forms of solar battery;
Figures 2(a), 2(b) and 2(c) are perspective views showing steps in making a first thin film device embodying the present invention;
Figures 3(a), 3(b), 3(c) and 3(d) are sectional views and Figure 3(e) is a schematic perspective view of a second embodiment of the present invention; and
Figures 4(a), 4(B), 4(c) and 4(d) are sectional views of a third embodiment.
In all the figures the thicknesses of various parts, especially of a thin film, are enlarged for clarity of illustration.
Figures 2(a), 2(b) and 2(c) show steps or stages in the manufacture of a first thin film device embodying the present invention, wherein lower electrodes 12 and upper electrodes 14, 16 are disposed on opposite faces of a thin film 13 and connected through the thin film 13 by diffused regions 13' of high conductivity. (The upper and lower electrodes and diffusion regions are shown as being two in number of way of example. There may be only one or more than two). The diffused regions 13' are formed, for example, by diffusion of a metal such as Al. The thin film 13 may comprise a film or layer of single crystal, polycrystalline or amorphous semiconductor or a combination thereof. The semiconductor may be Si or GaAs or mixed compounds thereof. The metal to be diffused into the thin film may be Al, Zn, Sb, etc.
An exemplary method of making the device will now be described with reference to Figures 2(a) to 2(c).
First, a cleaned glass sheet 11 is prepared as a substrate and Al electrodes 12 are formed thereon by vapour deposition as shown in Figure 2(a). Then, by decomposition of SiH4 by a glow discharge, an amorphous silicon film 13 is continuously formed over the electrodes 12 and the exposed face of the substrate 1 1 in such a manner as not to cover bonding parts 12' of the electrodes 12. The forming of the amorphous silicon is carried out by a glow discharge process, keeping the substrate 11 at a temperature of between 1 800C and 3000C under a vacuum of 0.2 to 2 Torr. For instance, a film having a thickness of 5000 Angstrom units is formed by 30 minutes processing.During this process, the aluminium of the electrodes 12 at the parts thereof covered by the amorphous silicon film 13 diffuses into the film and the diffusion front penetrates the film to its upper face, thereby forming an Al diffused region 12' over each electrode 12. The thickness of the aluminium film (electrodes 12) deposited as the diffusion source is preferably at least comparable to the thickness of the amorphous thin film 13 deposited thereon.
Thereafter, the second electrodes 14, 1 6 are vapour deposited so as to face the first electrodes 12 with the thin film 13 in between. The measured specific resistance between a terminal 1 5 of one of the lower electrodes 12 and a terminal of the upper electrode 1 6 over same, and the specific resistance between a terminal 17 of one of the lower electrodes 12 and a terminal of the upper electrode 14 over same are less than 10 ohm-cm, which values are far less than the known values of about 109 ohm-cm for conventional amorphous silicon. Provided that the thickness of the thin film 13 is about 5000
Angstrom units, then its actual resistance becomes 10-3 ohms or lower, which is sufficiently small for an electrical connection in the direction of the thickness of the film.
The metal forming the diffusion metal source under the thin film 13 can be Au, In, Pd or Pt instead of Al.
Lead-out wires 26 and 27 of gold wire or the like are connected to the electrodes as shown in
Figure 2(c).
In the case where Al is used as the diffusion metal source, a selective part or parts of the surface of the Al may be oxidised so as to prevent diffusion therefrom in order to limit the area of or obtain a desired pattern for the diffused region or regions 13'.
By using the above-described process, a vertical connection or connections by means of the diffused region or regions 13' can be made through any type of thin film, for example a semiconductor thin film comprising pin layers, whereby a complicated circuit structure can be fabricated.
A A thin film solar battery embodying the present invention will now be described with reference to
Figure 3(a) to 3(d), which are sectional views showing respective steps involved in making the battery, and Figure 3(e), which is a perspective view of the manufactured battery.
First, a cleaned glass sheet 20 is prepared as a substrate, and a transparent electrode 21, for instance an SnO film, is formed on almost all of the cleaned part of the substrate 20, by a known vapour deposition method, as shown in Figure 3(a).
The transparent electrode 21 is then etched by a known method to form stripe-shaped first electrodes 21' disposed parallel to one another with predetermined spaces 20' between them.
Thereafter, as shown in Figure 3(b), Al strips 22 acting as diffusion metal sources are disposed each contacting one edge of each electrode 21' by means of a known vapour deposition technique. (The figures are drawn enlarged in the vertical direction in order clearly to show the configuration). The forming of the Al strips 22 may be effected by any suitable known method, such as vapour deposition using a stripe pattern mask (not shown) or vapour deposition on substantially all of the face of the aboveprocessed substrate followed by photolithographic etching to make a stripeshaped pattern of Al.
After this, a semiconductor thin film, for instance an amorphous silicon thin film 23 of pin structure, is formed continuously on substantially all of the face of the substrate as shown in Figure 3(c). The amorphous silicon thin film 23 is formed by a known method, such as decomposition of
SiH4 by glow discharging. The forming of the amorphous silicon film 23 is carried out by a glow discharge process keeping the substrate at a temperature of between 1 800C and 3000C under a vacuum of 0.2 to 2 Torr. A 5000 Angstrom units thick film, for instance, is formed by 30 minutes processing.During this process of forming the amorphous silicon film 23, aluminium from the diffusion source (the strips 22) covered by the amorphous silicon film 23 diffuses into the amorphous silicon film and the diffusion front penetrates the film as far as the upper face, thereby forming Al diffused regions 24 as shown in Figure 3(c). Each Al diffused region 24 is formed to contact the right hand edge of an associated first electrode 21 '. The thickness of the aluminium film (the strips 22) deposited as the diffusion source should preferably be at least comparable to the thickness of the amorphous thin film 23 to be deposited thereon.
After the above-described steps, second electrodes 25 of a suitable metal such as aluminium are vapour deposited in stripeshapes so that they each almost or substantially face one of the first electrodes 21 ' with the thin film 23 between them, as shown in Figure 3(d). Each second electrode 25 is formed such that its left hand edge contacts the top face of one of the diffused regions 24. An electrode pair formed by one lower electrode 21' and the upper electrode 25 over same, together with the amorphous silicon film 23 between them, form one cell of a solar battery. The solar battery cells are connected in series by the connection of the right hand edges of the lower electrodes 21' by the diffused regions 24 to the left hand edges of the upper electrode 25 of the adjacent solar battery cells.If the thickness of the thin film 23 is about 5000 Angstrom units, the resistance between the lower electrode 21' and the upper electrode for each cell is about 10-3 ohms or lower, which is sufficiently small for an electrical connection in the direction of the thickness of the film.
The metal forming the lower and upper electrodes 21 25 can be AU, In, Pd or Pt instead of Al.
Finally, lead out wires 26 and 27 of gold wire or the like are connected to the upper electrodes at both ends, as shown in Figure 3(d), and a solar
battery as shown in Figure 3(e) is finished. More specifically, the wire 26 is connected to the
extreme left upper electrode and the wire 27 is
connected to an extreme right upper electrode
25' which is connected to the extreme right lower
electrode 21' by a diffusion region 24.
Instead of forming the pattern of diffusion
source metal prior to forming the thin film 23 of
semiconductor, other constructional methods
may be adopted. One such method is that shown
in Figures 4(a) and 4(b), where the diffusion
source metal strips 22' are vapour deposited on
the semiconductor thin film 23, and the strips are
thereafter irradiated by a laser beam or like
energy beam thereby to heat them and make
them diffuse into the thin film 23 to form the
diffused conductive layers or regions 24 as
shown in Figure 4(c). The final steps,
that is forming the second or upper electrodes
25 and connecting the lead-out wires 26
and 27 to form the structure shown in Figure
4(d), are substantially the same as that of the
method described with reference to Figures 3(a)
to 3(d).
Still another method is to vapour deposit the
aluminium strips 22 acting as the diffusion source
at a predetermined position on the semiconductor
thin film (e.g. the amorphous silicon thin film 23)
during the period when the substrate temperature
is kept raised so as to diffuse the aluminium
simultaneously with the deposition thereof.
Yet another method is to vapour deposit the
aluminium strips 22 acting as the diffusion source
at a predetermined position on the semiconductor
thin film (e.g. the amorphous silicon thin film 23)
after the substrate temperature has been lowered
substantially to room temperature, and thereafter
to raise the substrate temperature thereby to
diffuse aluminium from the diffusion source. After
the substrate temperature has come down the
second or upper electrodes 25 are formed
thereon.
By using the methods described above, series
connections along the length of unit cells of a
device is very easily attained without the use of
complicated masks or a plurality of
photolithographic processes and the conductivity
of the series connection is therefore satisfactory.
Further, by dispensing with the need for a
photoresist mask, time-deterioration due to
possible pin-holes in such masks is avoided and,
accordingly, the production yield is much
improved. Further, since the reliability and
connection conductivity of the diffused region or
regions to the electrodes are satisfactory, a
diffused region of moderate width suffices for the
connection and, therefore, the width W of the unit
cell or element of the device can be made smaller
than known devices such as those of Figures 1 (a) and 1(b). Therefore, higher integration can be
achieved.
Claims (14)
1. A thin film device comprising
a substrate,
first electrode means of a predetermined pattern formed on the substrate,
a thin film of a predetermined pattern formed
on a selected part of the first electrode means and
an exposed part of the substrate, the thin film having at least one diffused region contacting at least a part of the first electrode means, and
a second electrode means of a predetermined pattern formed on a selected part of the thin film and contacting an end of the diffused region whereby the diffused region connects the first electrode means and the second electrode means.
2. A device according to claim 1, wherein
the first electrode means comprises plural discrete first electrodes,
the thin film extends over the plural discrete electrodes and has plural diffused regions each contacting a first electrode, and
the second electrode means comprises plural discrete second electrodes each contacting an end of a corresponding one of the plural diffused regions and covering the area of a discrete first electrode which is next to that which is connected thereto by a diffused region.
3. A device according to claim 1 or claim 2, wherein the thin film is of amorphous silicon.
4. A device according to claim 1, claim 2 or claim 3, wherein the thin film is of pin structure.
5. A device according to any one of the preceding claims, wherein the substrate is a transparent substrate and the first electrode means is transparent.
6. A thin film device substantially as herein described with reference to Figures 2(a) to 2(c),
Figures 3(a) to 3(e) or Figures 4(a) to 4(d) of the accompanying drawings.
7. A method of making a thin film device, the method comprising the steps of
forming a first electrode means of a predetermined pattern on a substrate,
forming a thin film on a selected part of the first electrode means and an exposed part of the substrate,
diffusing metal from a diffusion source into the thin film to form at least one diffused region contacting the first electrode means, and
forming a second electrode means on the thin film and in contact with the diffused region whereby the diffused region connects at least a
part of the first electrode means and at least a part of the second electrode means.
8. A method according to claim 7, wherein the first electrode means acts as the diffusion source.
9. A method according to claim 7, including forming a metal diffusion source of a predetermined pattern on either face of the thin film.
10. A method according to claim 7, claim 8 or claim 9, wherein
the first electrode means comprises plural discrete first electrodes,
the thin film extends over the plural discrete first electrodes,
the diffusing step forms plural diffused regions each contacting a corresponding discrete first electrode,
the second electrode means comprises plural discrete second electrodes, each contacting an end of a corresponding one of the plural diffused regions and covering the area of a discrete first electrode which is next to that which is connected thereto by a diffused region, and
the discrete first electrodes and the discrete second electrodes which are disposed over the next ones of the discrete first electroces are connected by the diffused regions, thereby forming a plurality of series-connected cells each comprising a discrete first electrode, a discrete second electrode and the thin film between them.
11. A method according to any one of claims 7 to 10, wherein the diffusion is carried out simultaneously with the forming of the thin film.
12. A method according to any one of claims 7 to 11, wherein the thin film is of amorphous silicon.
13. A method according to any one of claims 7 to 12, wherein the thin film is of pin structure.
14. A method of making a thin film device, the method being substantially as herein described with reference to Figures 2(a) to 2(c), Figures 3(a) to 3(e) or Figures 4(a) to 4(d) of the accompanying drawings.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56152751A JPS5853870A (en) | 1981-09-26 | 1981-09-26 | Thin film solar battery |
| JP56152734A JPS5853859A (en) | 1981-09-26 | 1981-09-26 | Integrated thin film element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2108755A true GB2108755A (en) | 1983-05-18 |
| GB2108755B GB2108755B (en) | 1985-07-10 |
Family
ID=26481577
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB08226037A Expired GB2108755B (en) | 1981-09-26 | 1982-09-13 | Thin film devices having diffused interconnections |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE3234925A1 (en) |
| GB (1) | GB2108755B (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2133214A (en) * | 1982-11-24 | 1984-07-18 | Semiconductor Energy Lab | Photoelectric conversion device and its manufacturing method |
| EP0189976A2 (en) * | 1985-01-30 | 1986-08-06 | Energy Conversion Devices, Inc. | Extremely lightweight, flexible semiconductor device arrays and method of making same |
| EP0201312A2 (en) * | 1985-05-03 | 1986-11-12 | Siemens Solar Industries L.P. | Solar cell interconnection by discrete conductive regions |
| EP0203012A1 (en) * | 1985-05-24 | 1986-11-26 | Thomson-Csf | Photosensitive semiconductor device and its production method |
| EP0215482A2 (en) * | 1985-09-18 | 1987-03-25 | Fuji Electric Corporate Research And Development Ltd. | Solar battery and method of manufacture |
| FR2713018A1 (en) * | 1993-11-26 | 1995-06-02 | Siemens Solar Gmbh | Method for contacting thin-film solar cells |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3712589A1 (en) * | 1987-04-14 | 1988-11-03 | Nukem Gmbh | METHOD FOR THE PRODUCTION OF SERIES LAYERED SOLAR CELLS |
| JPH02181475A (en) * | 1989-01-06 | 1990-07-16 | Mitsubishi Electric Corp | Solar battery cell and manufacture thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4042418A (en) * | 1976-08-02 | 1977-08-16 | Westinghouse Electric Corporation | Photovoltaic device and method of making same |
| US4264962A (en) * | 1978-02-07 | 1981-04-28 | Beam Engineering Kabushiki Kaisha | Small-sized electronic calculator |
-
1982
- 1982-09-13 GB GB08226037A patent/GB2108755B/en not_active Expired
- 1982-09-21 DE DE19823234925 patent/DE3234925A1/en active Granted
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2133214A (en) * | 1982-11-24 | 1984-07-18 | Semiconductor Energy Lab | Photoelectric conversion device and its manufacturing method |
| GB2133215A (en) * | 1982-11-24 | 1984-07-18 | Semiconductor Energy Lab | Photoelectric conversion device and its manufacturing method |
| EP0189976A2 (en) * | 1985-01-30 | 1986-08-06 | Energy Conversion Devices, Inc. | Extremely lightweight, flexible semiconductor device arrays and method of making same |
| EP0189976A3 (en) * | 1985-01-30 | 1987-12-02 | Energy Conversion Devices, Inc. | Extremely lightweight, flexible semiconductor device arrays and method of making same |
| EP0201312A2 (en) * | 1985-05-03 | 1986-11-12 | Siemens Solar Industries L.P. | Solar cell interconnection by discrete conductive regions |
| EP0201312A3 (en) * | 1985-05-03 | 1988-12-07 | Atlantic Richfield Company | Solar cell interconnection by discrete conductive regions |
| EP0203012A1 (en) * | 1985-05-24 | 1986-11-26 | Thomson-Csf | Photosensitive semiconductor device and its production method |
| FR2582446A1 (en) * | 1985-05-24 | 1986-11-28 | Thomson Csf | PHOTOSENSITIVE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A METHOD |
| US4780394A (en) * | 1985-05-24 | 1988-10-25 | Thomson-Csf | Photosensitive semiconductor device and a method of manufacturing such a device |
| EP0215482A2 (en) * | 1985-09-18 | 1987-03-25 | Fuji Electric Corporate Research And Development Ltd. | Solar battery and method of manufacture |
| EP0215482A3 (en) * | 1985-09-18 | 1989-05-31 | Fuji Electric Corporate Research And Development Ltd. | Solar battery and method of manufacture |
| FR2713018A1 (en) * | 1993-11-26 | 1995-06-02 | Siemens Solar Gmbh | Method for contacting thin-film solar cells |
Also Published As
| Publication number | Publication date |
|---|---|
| DE3234925C2 (en) | 1989-06-01 |
| DE3234925A1 (en) | 1983-04-21 |
| GB2108755B (en) | 1985-07-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19950913 |