GB2108343A - Analog-to-current converter for sampled systems - Google Patents

Abstract

A sample and hold circuit converts an analog voltage into an output current of related intensity and to hold this current beyond the sampled interval. The converter includes an operational transconductance amplifier (16) having inverting and non-inverting inputs and a bias terminal, the amplifier being rendered operative for the sampling interval by a positive voltage applied to this terminal. The analog voltage is applied to one of the inputs to produce a voltage in the amplifier output which acts to drive a transistor (18) connected in series with a resistor (21) in a current-producing network, causing current to flow through the resistor to develop a feedback voltage which is applied to the other input of the amplifier, which current assumes an intensity related to the analog voltage. An R-C holding network (23, 24) connected to the amplifier output acts to maintain the drive voltage developed during the sampling interval beyond this interval, thereby holding the resultant output current. <IMAGE>

Description

SPECIFICATION Analog-to-current converter for sampled systems This invention relates generally to analog-to-current converters for sampled systems adapted during a sampling interval to convert an applied analog voltage into an output current of related intensity, and more particularly to a converter of this type which incorporates means to hold the output current beyond the sampling interval.

One known form of a sampled system is a digital multiplexer, a device which makes it possible to share a common information path among several groups of input or output digital signals. By such means, information can be transferred between a central processing unit and any one of several digital inputs or output devices.

Thus in industrial process control operations, it is often necessary to transmit data obtained at various points or field stations to a remote indicating or control terminal where the information is processed by a digital computer. The data conveyed from the field stations to the receiving terminal may be changes in pressure, temperature, flow rate or any other process variable. Such data is usually derived by means of analog sensors which convert the sensed variables into corresponding electrical analog signals. In a multiplexing digital system, the analog data to be processed must first be converted into corresponding digital signals.

Multiplexing techniques are known which act sequentially to transmit digital samples taken from continuous or analog data to a remote terminal over a single channel. In the typical multi-input sampled digital multiplexer for automatic process control, each analog input in a series thereof is acquired one at a time and converted into digital form before being manipulated and combined with other functions. An output is then calculated in the digital computer and stored in digital form. The system then proceeds to carry out similar functions sequentially with each of the other inputs, one at a time.

After the last of the inputs is processed in this manner, the multiplexer returns to the first of the inputs in the series and repeats the sequential cycle, thereby revising or updating the digital values. As a consequence, a measurable amount of time elapses before a new updated output is again calculated with respect to each digitally-stored input in the series.

In many process control industrial applications, an analog output as well as a digital output is required in order to carry out various control and recording functions. Thus in a typical process control loop where the final control element is a valve governed by an analog signal and the related recorder is a moving chart pen recorder which also requires an analog operating signal, the digital output from the computer which is a function ofthe sensed input data from the control loop must be converted into analog form. In the United States, the most com monly accepted analog output for process control and recording purposes is a current lying in a 4to 20 mA (dc) range. Also in use, however, is a 10 to 50 Ma range as well as a zero-based current output, such as O to 16 mA and 0 to 20 mA.

It has heretofore been the general practice in converting from a digital to an analog current output to use one of the following two well-known conversion techniques. In the first of these techniques, the stored digital information is converted in a channel to a voltage by a standard digital-to-analog converter, this voltage thereafter being converted into a corresponding current. When a plurality of such current outputs are required, a like plurality of channels operating along the same lines may simply be arranged in parallel. This arrangement, therefore, entails as many digital-to-analog converters as there are channels.

From the economic standpoint, it is less expensive to employ for this purpose a single digital-to-analog converter whose output is coupled to a group of analog sample and hold circuits, each retaining a respective one of the sampled signals in the series thereof. In this second known technique, the single digital-to-analog converter is switched to a respective digital input, and when it reaches the correct analog output voltage, the appropriate sample and hold circuit is activated to acquire and to hold this output voltage at its output level for a period extending to the next sampling interval.

Thus in the second known technique, all of the sample and hold circuits are activated sequentially, the output analog voltages thereof being then converted to current outputs lying within-the desired range. While the second known technique works well, it is still relatively complex and expensive; for it requires both a sample and hold circuit and an analog voltage-to-current converter for each processed value. It is also subject to error terms which contribute to the inaccuracy of the system.

Another factor which comes into play in a sample and hold circuit and analog voltage-to-current converter operating in conjunction with a digital multiplexer is so-called "ringing." When, for example, the digitally sampled system is relatively slow and it takes, say, one second between calculations at a given input, the input data in this interval may undergo a significant change; hence the current output from cycle to cycle may step up sharply to produce a current output in a staircase formation, each step of which is fairly steep. Such large steps may cause heavy ringing which could be detrimental to system performance. Moreover, in noisy systems, these abrupt steps may not represent actual conditions.

In view of the foregoing, the main object of this invention is to provide an analog voltage-to-current converter for use in sampled systems, which converter incorporates therein a sample and hold function whereby both the conversion and sample and hold functions are carried out efficiently and reliably in a relatively simple, low-cost arrangement.

More particularly, it is an object of this invention to provide a converter of the above type which acts to smooth the typical staircase analog output current, so that the transition from one current level to another with changing input voltage values is not in large steps but in a series of small steps.

Also an object of the invention is to provide an inexpensive converter of the above type adapted to derive a smooth analog current output from a low speed digitally sampled system.

Briefly stated, these objects are attained in converter in accordance with the invention which is adapted, during a sampling interval, to convert an applied analog voltage into an output current having a related intensity and to hold this current for a period beyond the sampling interval.

The converter includes an operational transconductance amplifier having inverting and non-inverting inputs and a bias terminal, the transconductance of the amplifier being proportional to bias current whereby the application of a positive voltage to the bias terminal tenders the amplifier operative during the sampling interval, the amplifier otherwise being quiescent.

The analog voltage is applied to the non-inverting input to produce an output voltage during the sampling interval which acts to drive an output transistor, the transistor being connected in series with a resistor in a current-producing network. The current flow through the resistor when the transistor is driven develops a feedback voltage which is applied to the inverting input of the amplifier to cause the current to assume an intensity related to the applied analog voltage. An R-C holding network connected to the output of the amplifier acts to maintain the drive voltage for a period beyond the sampling interval and thereby holds the output current.

For a better understanding of the invention as well as other objects and further features thereof, reference is made to the following detailed description to be read in conjunction with the accompanying drawings, wherein: FIGURE 1 schematically shows one preferred embodiment of an analog voltage-to-current converter in accordance with the invention operating in conjunction with a digital computer; FIGURE 2 illustrates the circuit of a second embodiment of the converter; FIGURE 3 illustrates the circuit of a third embodiment of the converter; FIGURE 4 illustrates a group of converters sharing a common zener diode.

FIGURE 5 shows a typical staircase current output of the converter; FIGURE 6 shows one form of smoothed staircase current output in accordance with the invention; and FIGURE 7 shows another form of smoothed staircase current output in accordance with the invention.

Referring now to Fig. 1, there is shown a first embodiment of an analog voltage-to-current converter (V/C) in accordance with the invention for use with a sampled system. The converter has incorporated therein a sample and hold function and is generally designated by numeral 10. Since in practice a separate converter will be provided for processing each in a series of analog voltage values, Fig. 1 illustrates a group of like V/C converters 10, 1 or, 1 OB, etc. to 1 On for this purpose, only the circuit details of converter 10 being shown.

V/C converter 10 is shown operating in conjunction with a digital computer 11 that is included in a multiplexing system to yield a series of digital output values, each of which is a function of a respective value of input data. The details of this multiplexing system form no part of the present invention, which is applicable to any sampled system.

Computer 11 acts to sequentially and cyclically feed its output digital values to a single digital-to-analog converter 12 of standard design whose output is applied to a bus 13 that provides a common link to the group of V/C converters. The V/C converters each include an analog voltage signal-input terminal 14 connected to a common bus 13 and a sampling voltage input terminal 15, each sampling input terminal of the several converters being linked to the computer through a separate line.

The main component of V/C converter 10 is an operational transconductance amplifier 16, preferably in a solid-state, integrated circuit form.

An operational amplifier is a direct-coupled high gain amplifier having a differential input, feedback being added to control its overall response characteristics. In system design, integrated operational amplifiers have gained broad acceptance as a versatile, predictable and low cost building block, offering the many advantages of monolithic integrated circuits, such as small size, reliability and temperature tracking.

Operational amplifier 16 is arranged to function as a transconductance amplifier. As is well known, an ideal transconductance amplifier supplies an output current which is proportional to the applied signal voltage independently of the magnitude of the resistance of the input source and the resistance of the load, the ideal amplifier having an infinite input resistance and an infinite output resistance.

In an actual embodiment of the invention, use is made of the linear, IC, operational transconductance amplifier (OTA) marketed by the RCA Solid State Division as model CA 3080. This OTA device has a differential input whose non-inverting terminal (+), identified by RCA as pin 3, and whose inverting terminal (-) is identified as pin 2. Pin 7 in this RCA device is the operating power terminal (V+), and pin 4 is the (V-) terminal, pin 5 being the amplifier bias input terminal. This amplifier has a single-ended push-pull class A output (pin 6). The OTA device of RCA is especially applicable for multiplex operations, in that it consumes power only in the "ON" state.

Operational transconductance amplifier 16 is characterized by a high output impedance and by the fact that its transconductance (gm) is directly proportion- al to the amplifier bias current. The amplifier bias input at pin 5 may, therefore, be used for on-off gating control to render it operative only during sampling intervals.

The analog output voltage from D/A converter 12 is applied through bus 13 and terminal 14to non-inverting input (+) pin 3 of amplifier 16 referenced to the "common" line. Hence symbol E in Fig.

1 represents the input analog voltage signal to amplifier 16. Output pin 6 of the amplifier is connected to gate G of a field effect transistor (FET) 18.

There are two general types of FET's, the junction type and the metal oxide semiconductor (MOS) type.

The input impedance of FET's is high because of the reverse-biased diode of the input circuit. Compared with the junction FET, the MOS transistor has a higher input impedance.

Ad-c voltage supply powers the amplifier, the positive end of the supply being connected to pin 7 and the negative end to pin 4 which goes to the common line. A current is associated with the amplifier and is defined output between the positive and negative end of the power supply through FET 18, a zener diode 20 and a fixed resistor 21, these elements being connected in series.

Zener diode 20 functions as a voltage reference, this action being based on the avalanche characteristics of its pn junction. Inverting (-) input pin 2 is connected to the junction of zener diode 20 and resistor 21 in this network. Sampling input terminal 15 is connected through a resistor 22 to amplifier bias pin 5. A sample and hold RC network defined by resistor 23 in series with capacitor 24 is connected between output pin 6 and common.

In operation, computer 11 sequentially feeds its output digital values to D/A converter 12 which yields a series of analog values, all of which are applied via bus 13 to the group of V/C converters through their signal input terminals 14.

Concurrently, computer 11 acts to apply a positive sampling voltage in the same sequence to the V/C converters, so that when D/A converter 12 yields the first analog voltage in the series thereof at its proper level, V/C converter 10 is gated on; when D/A converter 12 yields the second analog voltage in the series, V/C converter 10A is gated on; this sequential action continuing until all analog voltages in the series are converted by V/A converters 10 to 1 On. The sampling cycle is then repeated. When any one V/C converter is rendered ON by the computer, all others are disabled or biased OFF.

Before considering the action of the sample and hold network, we shall analyze the behavior of the V/C converter in terms of a simple analog voltage-to-current stage. When a fixed positive d-c voltage is applied to amplifier bias pin 5 through resistor 22 (the sampling input), amplifier 16 is turned ON and behaves just like a normal operational amplifier.

Hence if an input voltage E referenced to common is applied to non-inverting input pin 3 of the amplifier, the output at pin 6 of the amplifier will adjust the drive voltage applied to the gate of FET 18 so that the current flow into current sink 19 through FET 18 in series with zener diode 20 and resistor 21 is such that the voltage fed to inverting input pin 2 and derived from resistor 21 equals the voltage at non-inverting input 3. This occurs when the feedback voltage developed equals voltage E. As a consequence, current flow I through resistor 21 assumes a value equal to voltage E divided by the resistance of resistor 21 in accordance with Ohm's law.

The source of this current is the sum of the gate current at G at the current at sink 19. Since gate current in an FET is extremely low to the point of being negligible, current through resistor 21 is equal to the current through sink 19. In practice, FET 18 may be a junction or power type MOS device, depending on the power requirements of the system.

Since the output voltage at pin 6 of the operational amplifier in the case of an RCA CA 3080 can only come to within about 2 volts of common due to internal construction limitations, means are required to raise the voltage at FET 18 so that the amplifier will never lose control. The voltage drop across zener diode 20 performs this function. While resistor 23 and capacitor 24, in the hold network, are not required in the voltage-to-current conversion mode, they act in this mode to stabilize the converter.

In the above discussion, we have considered only the behavior of the V/C converter in the analog voltage-to-current mode. We shall now consider its operation in the simple sample and hold mode.

Inasmuch as operational amplifier 16 functions as a transconductance amplifier, its transconductance (gm) is subject to the following equations: i out gm e ............. in gm = 14 x i (pin 5) .. (2) substituting in (1) 1 oit = e in out gm = R out (3) R out = ~ ,,, . . . . . . . . . . (4) sm From equation (2) it will be evident that when i (pin 5) is 0, transconductance gm becomes 0.

From equation (4) it will be evident that when gm = 0 Rout = infinity where i out = output current e in = input voltage e out = output voltage R R out = output resistance i (pin 5) = I ABC = current into pin 5 We shall again assume that input voltage E has been applied to signal inputterminal 14 and that a positive voltage has been applied to sampling input terminal 15, thereby causing a current flow in resistor 12 connecting this terminal to amplifier bias pin 5, and turning the amplifier ON to produce an output voltage at output pin 6 and a current flow through resistor 21 in the manner previously described.

Since capacitor 24 in the RC hold network is connected through resistor 23 to output pin 6, it charges up to the level of the voltage on gate G of FET 18 connected to pin 6. If now the sampling voltage applied to terminal 15 is removed or con nected to common, amplifier 16 turns OFF, this being the hold condition. In this condition, current into amplifier bias pin 5 is zero, causing the transconductance of the amplifier to fall to zero and the output resistance of the amplifier to become infinite.

Since the gate resistance of FET 18 is also extremely high, capacitor 24 has virtually no discharge path and therefore maintains its charge, thereby holding the drive voltage on gate G of FET 18 to maintain output current flow in resistor 21, irrespective of what happens to the input voltage E.

In practice, some rate of change occurs in the charge established on capacitor 24 because of internal and other leakage paths. Moreover, the repetitive sampling process requires that with each new sampling cycle, the hold voltage on the capacitor represents the updated value of analog voltage.

Thus V/C converter 10 functions not only to convert an analog voltage to a related current value, but it also acts to hold this current flow beyond the sampling intervals.

The V/C converter circuit shown in Figure 2 is essentially the same as that in Figure 1 save that it is set up to operate with a current source output 19' connected across the power supply and constituted by zener diode 20 in series with resistor 21 and FET 18. In the Figure 2 embodiment, zener diode 20 is connected between the positive end of the d-c power supply and a voltage A line in an arrangement in which the hold network formed by capacitor 24 in series with resistor 23 is connected between line A and output pin 6, while the current-producing network formed by FET 18 in series with resistor 21 is connected between line A and current source 19' to common. In this arrangement, input voltage signal E is applied between the non-inverting input pin 3 and line A.

Zener diode 20 in the Figure 2 arrangement serves the same function as in the Figure 1 arrangement, but because it is positioned between the power line + and line A, it can be made common to a group of like converters and shared thereby in the manner shown in Figure 4. The theory underlying the operation of the Figure 2 embodiment is essentially the same as that involved in Figure 1.

In Figure 2, FET 18, since it controls the flow of output current, must be a power FET. Because an FET of this type is relatively expensive, in order to reduce the cost of the V/C converter, in the embodiment illustrated in Figure 3 FET 18 in the current sink 19 is replaced with an output transistor 25 that is rendered conductive by a drive transistor 26 connected to amplifier output pin 6. Thus the voltage yielded at output pin 6 activates drive transistor 26 which turns on output transistor 25. The operation of this converter in all other respects is the same as that shown in Figure 2.

In Fig. 4, a group of analog-to-current converters 10, 10A and 1 OB are shown each of the type illustrated in Fig. 3. In actual practice, as many converters are provided in the group as there are sampled analog voltages in the series thereof to be processed.

It will be seen in Fig. 4 that zener diode 20 is common to and shared by all of the V/C converters, thereby effecting a further economy. It will also be seen that all signal input terminals are connected to bus 13 to receive the series of analog voltages yielded by D/A converter 12, the V/C converters in the group being sequentially turned on by sampling voltages applied to sampling input 15 of each converter by the digital computer or whatever other device is involved in the sampled system.

Smoothing: Referring now to Fig. 5, there is graphically shown the typical current output of an analog voltage-tocurrent converter 10 in accordance with the invention, the current output being plotted against time in a time scale (0 to 6) in which the period between successive numbers represents the time between calculations. We shall, by way of example, assume it is a one-second calculation period. The current step between 1 and 2 represents the current level for one analog sample; the step between 2 to 3 represents the held current level for the next sample in the sequence, and so on. Thus the resultant current output formation has a staircase configuration.

Each successive step represents an updated value of the variable being sensed, some steps being very steep and others relatively short. While this type of output is acceptable for many purposes, in some applications large steps may cause heavy ringing, a phenomenon that is detrimental to system performance. Moreover, in noisy systems marked changes encountered in the current level may not represent actual changing data conditions but noise surges. It is therefore desirable in a converter in accordance with the invention to somewhat smooth the current output by limiting the rate of current change.

Transconductance equation (1) in the above OP ERATION section indicates that the output current of an operational transconductance amplifier such as model CA 3080 of RCA can be set for a fixed value of input signal E by changing the transconductance of the amplifier. This can be effected, as made evident by equation (2), by changing the bias current into pin 5, this being done by changing the value of resistor 22 interposed between the sampling input voltage terminal 15 and pin 5.

In a fixed sampling time with a predetermined resistance value for resistor 22, only a certain maximum amount of charge may be added or removed from capacitor 24 in the hold network connected to output pin 6, the maximum current output of the amplifier being set by resistor 22. This limits the maximum current step per sample.

While the system in the example given in conjunction with Fig. 5 can only calculate data once per second, it can sample the calculated data much more frequently. Thus Fig. 6 shows the current output curve for an arrangement in which data is calculated once per second, as in Fig. 5, but is sampled four times per second, the maximum slope being limited by resistor 22.

Fig. 7 shows the same system but with a different maximum slope, this being accomplished by selecting a different value for resistor 22. By sampling frequently enough between calculations, the size of the staircase steps can be drastically reduced to provide a relatively smooth current output curve, thereby avoiding large and abrupt transitions in output current.

In systems where it is desirable to select different maximum slopes, two digital techniques are available. The length of time the sample and hold is kept ON can be changed -the longer the time, the larger the current step. Alternatively, if it is convenient, the number of samples per second can be changed to achieve the same result.

While there have been shown and described preferred embodiments of analog-to-current converter for sampled systems in accordance with the invention, it will be appreciated that many changes and modifications may be made therein without, however, departing from the essential spirit thereof.

Claims (11)

1. A converter for use in a sampled system adapted during a sampling interval to convert an analog voltage into an output current of related intensity and to hold the output current beyond the sampling interval, comprising; an operational transconductance amplifier having inverting and non-inverting inputs, a single output and a bias terminal, the transconductance of the amplifier being directly proportional to the amplifier bias current; means for applying a positive voltage to the bias terminal to render the amplifier operative for the sampling interval; means for applying the analog voltage to be converted to the non-inverting input to produce a voltage at the amplifier output; a current-producing network including an output transistor in series with a resistance and means for deriving the output current from the network; means for deriving a voltage from the amplifier output to drive the transistorto cause current flow through the resistance, the voltage developed across the resistance being fed back to the inverting input of the amplifier to cause the current flow through the resistance to assume an intensity related to the analog voltage; and an R-C network connected to the amplifier output and charged by the voltage yielded during the sampling interval to produce a voltage serving to drive the transistor beyond the sampling interval and thereby hold the current.

2. A converter according to claim 1, wherein the transistor in the current-producing network is a field-effect-transistor the gate of which is connected to the amplifier output.

3. A converter according to claim 1 or 2, including a zener diode interposed between the transistor and the resistor.

4. A converter according to claim 1,2 or3, wherein the current-producing network is connected across a d-c voltage supply of the amplifier and includes a current sink in series with the transistor.

5. A converter according to claim 1, 2 or 3, wherein the current-producing network which includes a current source connected in series with the transistor is shunted across a D-C voltage supply of the amplifier th rough a zener diode, the analog voltage applied to the non-inverting input being referenced to a voltage line the level of which is determined by the voltage drop across the diode.

6. A converter according to any preceding claim wherein the means for deriving a voltage from the amplifier output to drive the output transistor comprises a second transistor responsive to the output voltage of the amplifier.

7. A converter according to any preceding claim, wherein the positive voltage is applied to the bias terminal through a further resistance the value of which determines the intensity of bias current and hence the transconductance of the amplifier.

8. A converter according to claim 7, wherein the value of the further resistance is such as to cause the charge on the R-C network to attain a level corresponding to the amplifier output voltage in the course of a succession of sampling intervals whereby the held output current rises to a final level in a series of small steps to provide a relatively smooth output current.

9. A plurality of analog voltage-to-current converters according to any preceding claim, operating in conjunction with a digital computer which in use yields a series of digital output values representing respective variables, these values being sequentially converted by a digital-to-analog converter into a series of analog voltage values which are applied to the non-inverting input of each of the analog voltage-to-current converters, the computer also applying in use a positive voltage in sequence to the analog-to-current converters to render the amplifiers therein operative for a respective sampling interval.

10. A converter for use in a sampled system substantially as hereinbefore described with reference to, and as illustrated in the accompanying drawings.

11. Any novel feature or combination of features described herein.