GB2100884A

GB2100884A - Disk storage system

Info

Publication number: GB2100884A
Application number: GB08201175A
Authority: GB
Inventors: Robert G Kaseta
Original assignee: Data General Corp
Current assignee: EMC Corp
Priority date: 1978-06-21
Filing date: 1979-02-28
Publication date: 1983-01-06
Also published as: FR2436526A1; FR2436526B1; GB2100884B; CA1143833A; GB2023893B; DE2911494A1; JPS552383A; GB2023893A

Abstract

The read/write head of a disc storage system is positioned by a stepping motor having four coils 11A, 11B, 11C, 11D. The coils are energised under the control of a pulse logic circuit 20 with combinations of pulses such as to effect rotation step by step in the desired sense. Excitation circuits 10A, 10B, 10C, 10D provide constant pulse currents. In order to avoid oscillation at the end of a movement, the pattern of energisation is modified during the last stepping interval. During this interval the coils are initially energised with the pulse combination corresponding to that interval, then with the pulse combination applying to the preceding interval and finally with the pulse combination applying to the last interval itself again. This damps the movement of the stepping motor and read/write head. <IMAGE>

Description

1 GB 2 100 884 A 1

SPECIFICATION Disk storage system

This invention relates generally to a disk storage system employing a stepping motor to position the transducer which writes or reads data on the disk, referred to as a read/write head.

Stepping motors which rotate a shaft through a predetermined angle upon the application of a set of coded pulses of current to the motor coils, or windings, find use in many fields where positive, accurate, discrete movements reliably responsive to relatively high frequency pulses are desired. In a four-phase stepping motor, for example, appropriately coded combinations of four current pulses are supplied simultaneously to 80 each of four stepping motor coils so that the stepping motor moves in sequence from one position to the next through a preselected angle.

Thus, in a four-phase stepping motor the angle may be 1.80 and coded pulse sequences are repetitively arranged to provide 200 discrete steps for a complete 3600 shaft rotation. Other embodiments may provide for different sequences of coded pulses for producing 400 discrete steps of 0.9 1 each. The techniques for generating such pulse code sequences and for applying them to the coils of the stepping motor are well known to those in the art, the motor being capable of moving through its stepping sequence in either direction of rotation.

In a disk storage system, the read/write head must be moved rapidly and accurately to different positions relative to the disk surface, in order to assure fast access time to the information stored in the disk and to assure that the correct 100 information is being read from or written onto the disk surface.

Normally such positioning is achieved by the use of servo-controlled solenoid devices requiring relatively expensive elements such as sensor transducer and multi-element feedback loops, all of which increase the cost thereof and reduce the reliability of the positioning system. The object of the invention is to reduce costs and achieve higher reliability by utilizing stepping motors for such purposes. The invention is defined in claim 1 below. Prior to the invention, there has been no use made of stepping motors in a disk drive system context and, because of the need for highly accurate positioning with respect to disks having relatively high data densities, such technique has generally not been considered as reasonably feasible. However, in view of ability of the stepping motor excitation circuitry to achieve rapid movement of the stepping motor shaft from one position to another in an accurate and repeatable manner, it is now found that stepping motors can be reliably used in disk drive systems.

Further, the operation of the logic means during the fast discrete step, as specified in claim 1, provides for effective electrical damping of the system to reduce the oscillation of the read/write heads when the desired position relative to the disk surface has been reached.

The invention can be described in more detail, with the help of the accompanying drawings, wherein:

Fig. 1 is a block diagram of a stepping motor system; Fig. 2 is a more detailed partial block diagram, partial schematic diagram of the system shown in Fig 1; Figs 3 and 4 show in qualitative form an exemplary pulse train and velocity profile of the type used in the invention; Fig. 5 shows a velocity profile of conventional prior art circuitry; and

Fig. 6 shows a velocity profile utilized with the invention for reducing the overall damping time in the operation of the system.

As can be seen in Fig. 1, an excitation circuit for supplying a current pulse to a stepping motor coil 11 has supplied at its input a pulse identified as "QX". For a four-phase stepping motor, four of such excitation circuits are utilized, one associated with each of four stepping coils, the input pulses to each of the circuits being specifically identified as QA, QB, QC and QD (Fig. 2). The excitation circuit of Fig 1 is representative of each of the excitation circuits for each of the stepping motor coils of the stepping motor. The input pulse is supplied to a high current, low power circuit 12 which is powered by a voltage VR obtained from a regulated power supply 13.

Circuit 12 provides a base voltage Vb to the base of an emitter follower 14 which is used in a high current, high power circuit 15 which supplies the current pulse for stepping motor coil 11. Circuit 15 is powered by a voltage VuFt from an unregulated power supply 16.

Because circuit 12, which supplies the substantially constant voltage Vb, is a low power circuit, the regulated power supply 13 utilized to supply voltage VR can be a relatively inexpensive one. Since the base voltage Vb of emitter follower 14 is held substantially constant the high power circuit 15 can provide a substantially constant current pulse of stepping motor coil 11 independently of variations in the voltage Vr.

Accordingly, a relatively inexpensive, substantially unregulated power supply can be utilized for the high power circuit.

The excitation circuitry 10 of Fig. 1 can be seen in more detail in Fig. 2. In the latter figure each of the coils 11 A, 11 B, 11 C, and 11 D of a four-phase stepping motor, for example, utilizes an excitation circuit 1 OA, 1 OB, 1 OC, and 1 OD, respectively, of substantially the same configurations only one of which is depicted schematically.

Input pulses OA, QB, QC, and QD are supplied to each of such excitation circuits, respectively, and are obtained from suitable pulse logic circuitry 20. In a conventional stepping motor appropriately coded pulse combinations are supplied to the coils of the stepping motor, as is well known. Thus, for a four-phase stepping motor the following exemplary coded pulse combinations may be utilized for stepping the 2 GB 2 100 884 A 2 motor through its desired discrete 1.13' angular positions:

QA GB 1 0 0 1 1 0 1 GC 1 1 0 0 OD 0 0 1 1 The input pulses QA-QD are either present (signified by---11or absent (signified by "0") in the above sequence.

in accordance with well-known practice, the above sequence of coded pulse combinations is repeated so that the stepping motor shaft can be moved through a total of 200 steps per revolution. The generation of such sequence of coded pulse combinations is well known to those in the art. One technique, for example, as shown in Fig 2, utilizes an appropriate pulse train, derived from a microprocessor 19, which pulse train is supplied to a suitable pulse logic circuit 20 for providing such pulses to permit the motor to be stepped through the above-described sequence. The microprocessor, for example, can also supply an appropriate direction signal which controls the angular direction of rotation through which the stepping motor is to be moved.

When a pulse is present at the input to excitation circuits 1 OA-1 OD, each such circuit must supply a relatively high current pulse to its associated stepping motor coil (11 A-1 1 D), which pulse has a substantially constant magnitude so that accurate positioning of the stepping motor shaft will occur. Variations in such magnitude will produce inaccuracies in such positioning.

Because of the desire for such high accuracy, previously known excitation circuits utilize extremely highly regulated power supplies so that the voltage supplied to the excitation circuit remains substantially constant at the relatively high current (and high power) which is required for rapid stepping of the motor through its shaft angle positions. Such highly regulated power supplies are relatively expensive and increase the costs of the overall system in which such stepping motors are to be used.

The excitation circuit of Fig. 2 provides for such highly accurate positioning without the need for high power voltage regulators. As seen therein the input pulse is supplied to a low current, low power circuit 12 which comprises transistor 22 having a voltage supplied from a regulated power supply which, in a specific embodiment, for example, may provide a voltage of 15 volts. Such voltage is supplied directly to the emitter of transistor 22 and to the base thereof via resistor 23, the input pulse QA being supplied to the base through input resistor 24. An output voltage V b is supplied at the junction of collector resistors 25 and 26, both of which are precision resistors, and is supplied to the base of an emitter follower transistor 27 of a high current, high power circuit 15. Voltage is supplied to the collector of transistor 27 via motor coil 11 A and from a substantially unregulated power supply which, for example, may supply a voltage of 16 volts. When transistor 22 is off, the network comprising resistance 25 and diode 29 is used to provide rapid removal of energy from the coil.

A high current pulse is supplied to stepping motor coil 11 A in the collector circuit of transistor 27. Because low power circuit 12 always supplies a substantially constant, and precise, voltage Vin at the base of emitter follower transistor 27 in response to the presence of input pulse QA, a substantially constant output circuit pulse is supplied to stepping coil 11 A even should the voltage from the unregulated power supply vary over a wide range (as much, for example, as 20% of its nominal voltage).

Circuit 12 is a relatively low power circuit, e.g., in a particular embodiment supplying about.02 amps at 15 volts so that the power supply therefor need be regulated only with respect to an average power of about 0.3 watts. On the other hand, the high power circuit 15 requires currents of about 2 amps at a nominal power supply voltage of 16 volts, i.e., a power in excess of 30 watts.

Since the voltage Vb can be held substantially constant by the regulated low power circuit 12 and the base-to-emitter voltage Vbe of emitter follower transistor 27 is substantially constant, the current through resistor 30, i.e., as determined by the expression: (Vb-vb,)/R30, remains substantially constant despite fluctuations in the unregulated power supply voltage.

It is also found that coil resistances among different windings may vary as much as 10% or more. Such variations will also normally tend to cause the current levels therethrough to vary in an undesirable manner. However, by using the described circuitry, such changes in coil characteristic do not adversely affect the operation so that currents through different coils remain at substantially the same level.

As mentioned above, it is desirable to move the stepping motor shaft in accordance with a preselected velocity profile, an exemplary velocity profile being shown qualitatively in Fig. 4 by curve 40. In order to move the stepping motor shaft in accordance therewith, a pulse train is supplied to the pulse logic circuit 20 of Fig. 2 in accordance with such velocity profile. An exemplary pulse train 41, shown qualitatively in Fig. 3, is produced in accordance with the velocity profile of Fig. 4. Thus, the distance between pulses of the pulse train input to pulse logic circuit 20 depends essentially upon the slope of the velocity profile curve. Each new input pulse received at pulse logic circuit 20 produces a particular coded combination of the output pulses QA-QD therefrom, such pulse code combinations changing in sequence as each new pulse is received. Such sequential change can be in accordance with the exemplary format shown above to produce 200 discrete 1.80 steps during 1 3 GB 2 100 884 A 3 a full 3601 rotation of the motor shaft, for example.

The generation of a pulse train 41 in accordance with a selected velocity profile 40, for example, can be accomplished in various ways by 70 those in the art and need not be described in further detail. The use of a microprocessor, for example, would be well known to the art for such purpose, although particular hard-wired logic circuitry may also be devised. Further, the design of pulse logic circuitry for the generation of the sequence of coded pulse combinations QA-QD in response to successive pulses of a pulse train input would also be well within the skill of the art and is not discussed in further detail here.

An effective use of the disk drive excitation circuitry utilizing a stepping motor as described above lies in the data processing field wherein such stepping motor can be used to position read/write heads of an appropriate storage system, such as a disk storage system. Such use can eliminate the requirement for relatively expensive servocontrolled head positioning systems even for disks having relatively high data density storage capabilities.

In accordance therewith the stepping motor is driven by the excitation circuitry described above utilizing a selected velocity profile such as shown in Fig. 4. The output shaft of the stepping motor is coupled to a head positioning mechanism in an appropriate manner, one such technique being shown and described in detail in co-pending United States Patent Application of Robert Kaseta et ai., Serial No. 899,046, filed April 24,1978 and incorporated herein by reference. The mechanical coupling shown in such co-pending application adequately depicts the manner in which such stepping motor can be utilized in a disk drive system and need not be described in further deiail here.

In the use of such drive circuitry for moving read/write heads, it is desirable to move the heads in such a manner that they move rapidly to the desired position and arrive thereat with substantially little or no overshoot or oscillatory motion. Ideally, it is desired that the heads reach the desired position with substantially zero velocity.

One such technique for achieving such performance can be described with the help of the graphical representations shown in Figs. 5 and 6. As indicated above with reference to Figs. 3 and 115 4, the stepping motor has a selected velocity profile and moves through its discrete steps accordingly. If not effective damping of the motion is used, either mechanical or electrical, the heads arrive at a non-zero velocity and will tend to 120 oscillate about the desired position before setting thereat, as shown in Fig. 5.

In order to avoid such oscillation, it is found that effective damping of the velocity motion can be achieved as follows in the system described 125 above. In moving from a first position to a second position, substantially the same velocity profile shape is used no matter what initial and final positions are involved. Accordingly, when the motion of the heads is initiated the microprocessor, from a knowledge of the initial and final positions and of such velocity profile shape, can be appropriately programmed to produce the desired motion. The stepping motion along such profile is achieved by using suitably selected sequential code combinations, as discussed above. At a selected time during the time period in which the stepping motor has applied the code combination representing the last step of its motion, such last code combination excitation is removed and the next-to-last code combination is applied for a selected time period.

After the latter selected time period, the last code combination is again re-applied. By suitably selecting the time at which such code combinations are applied during the last step, the heads can be caused to arrive at the zero position with substantially little or near-zero velocity.

Assume, for example, that the next-to-last and last code combinations required to perform both the next-to-last and last steps of a desired positioning sequence are the code combinations ---0101---and---1001-, respectively, as set forth in the exemplary code combination sequence discussed above. Such a situation is shown diagrammatically in the timing diagram of Fig. 6 in which "0 10 1---is applied at Ti and " 100 1 " is applied at T, At a selected time T, after application of the last code combination, the microprocessor is programmed to apply the nextto-last code combination for a selected time period until T4, such time period being identified as (T4-T3). At T4 the last code combination is reapplied so that the heads arrive at the selected position with substantially zero velocity at time TP The selections of time T. and time period (T4T,) can be determined empirically or can be suitably calculated from a knowledge of the velocity profile and the stepping motor characteristics being used. By the use of such damping technique, the oscillation present which would be normally present without damping can be reduced considerably. In a particular application, for example, it is found that the oscillation can be reduced from about 100 milliseconds to about 15 milliseconds.

Claims

1. A disk storage system comprising movable transducer means for writing data onto or reading data from a surface of a storage disk; a stepping motor system responsive to input driver signals for positioning said transducer means relative to said disk surface, said stepping motor system including a stepping motor having a plurality of excitation windings each capable of having current pulses supplied thereto in response to an input driver signal for moving said stepping motor in discrete steps; means coupling said stepping motor to said transducer means for moving said transducer means in discrete steps; driver circuitry associated with each of said windings for 4 GB 2 100 884 A 4 providing current pulses thereto in response to input driver signals; logic means for supplying a selective sequence of coded combinations of pulses as the input driver signals to said driver circuitry, whereby said transducer means moves 25 from a first selected position to a second selected position through a plurality of discrete steps in accordance with a selected velocity profile, said logic means being operable during the last one of said discrete steps for providing the selected code 30 combination of pulses required to move the transducer means for the last one of said plurality of discrete steps for a first selected time period, thereupon to provide the selected code combination of pulses required to move the 35 transducer means for the next-to-last one of said plurality of discrete steps for a second selected time period, and thereupon to provide the selected code combination of pulses required to move the transducer means for the last one of said plurality of discrete steps for a third time period.

2. A disk storage system in accordance with claim 1, wherein said first, second, and third time periods are such as to cause said transducer means to reach said second selected position with substantially zero velocity.

3. A disk storage system in accordance with claim 1 or 2, wherein the driver circuitry associated with each said winding comprises a first circuit responsive to an input pulse for supplying a substantially constant voltage and a second circuit having circuit means responsive to said substantially constant voltage to supply a substantially constant current pulse to its associated winding when an input driver signal is supplied to said first circuit.

4. A disk storage system in accordance with claim 3, wherein said circuit means is an emitter follower circuit.

Printed for Her Majesty's Stationery Office by the Courier Pess, Leamington Spa, 1983. Published by the Patent Office, 25 Southampton Buildings, London, WC2A lAY, from which copies may be obtained