GB2092338A - Improvements relating to programmable memories - Google Patents

Improvements relating to programmable memories Download PDF

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Publication number
GB2092338A
GB2092338A GB8103034A GB8103034A GB2092338A GB 2092338 A GB2092338 A GB 2092338A GB 8103034 A GB8103034 A GB 8103034A GB 8103034 A GB8103034 A GB 8103034A GB 2092338 A GB2092338 A GB 2092338A
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GB
United Kingdom
Prior art keywords
chip
program
memory
checking
physically
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8103034A
Other versions
GB2092338B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JPM AUTOMATIC MACHINES Ltd
Original Assignee
JPM AUTOMATIC MACHINES Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JPM AUTOMATIC MACHINES Ltd filed Critical JPM AUTOMATIC MACHINES Ltd
Priority to GB8103034A priority Critical patent/GB2092338B/en
Publication of GB2092338A publication Critical patent/GB2092338A/en
Application granted granted Critical
Publication of GB2092338B publication Critical patent/GB2092338B/en
Expired legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory

Abstract

An electronic memory device is packaged in a single chip with a microprocessor. A program is entered the memory and checked. Thereupon a signal is generated, perhaps by the logic on the chip itself, which physically destroys the access path to the memory directly from outside the chip. The memory remains in communication with the microprocessor.

Description

SPECIFICATION Improvements relating to programmable memories This invention relates to programmable memories.
A program entered in a memory is often a valuable piece of 'software', but buthitherto there has been no satisfactory way of protecting it, legally or physically. Most memories have means for checking that they have been programmed correctly, but in providing this facility it opens the door for others to extract the program. It is the aim of this invention to prevent this.
According to one aspect of the present invention there is provided a memory in chip form in which external access to a program stored therein is physically disconnectable within the chip by a signal generated subsequent to the entry and checking of the program.
According to another aspect of the present invention there is provided a method of protecting software, comprising programming an electrode device in chip form, checking that program, and generating a signal which physically disconnects, within the chip, external access to the program.
By chip form is meant any packaged electronic device where at least some of the components are inaccessible without physical destruction of the package.
This technique is intended particularly for EPROMs, and there is now available a microprocessorwith an EPROM all on a single chip to which it should be well suited. Having entered the program and checked it via a test pin, at the end of the test sequence the logic on the chip itself can be arranged to "blow a fuse" in the access path to the program.
The latter is therefore securely trapped in the chip, accessible only to the microprocessor.
This has general application, but our preferred use is in the field of electronically controlled games, particularly fruit machines and video games.
CLAIMS (filed 29.1.82) 1. A memory in chip form in which external access to a program stored therein is physically disconnectable within the chip by a signal generated subsequent to the entry and checking of the program.
2. A memory as claimed in claim 1, in combination with a microprocessor on a single chip.
3. A gaming or amusement with prizes machine controlled by a microprocessor with a programmed memory in combination as claimed in claim 2.
4. A method of protecting software, comprising a programmed electronic device in chip form, checking that program and generating a signal which physically disconnects, within the chip external access to the programme.
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (4)

**WARNING** start of CLMS field may overlap end of DESC **. SPECIFICATION Improvements relating to programmable memories This invention relates to programmable memories. A program entered in a memory is often a valuable piece of 'software', but buthitherto there has been no satisfactory way of protecting it, legally or physically. Most memories have means for checking that they have been programmed correctly, but in providing this facility it opens the door for others to extract the program. It is the aim of this invention to prevent this. According to one aspect of the present invention there is provided a memory in chip form in which external access to a program stored therein is physically disconnectable within the chip by a signal generated subsequent to the entry and checking of the program. According to another aspect of the present invention there is provided a method of protecting software, comprising programming an electrode device in chip form, checking that program, and generating a signal which physically disconnects, within the chip, external access to the program. By chip form is meant any packaged electronic device where at least some of the components are inaccessible without physical destruction of the package. This technique is intended particularly for EPROMs, and there is now available a microprocessorwith an EPROM all on a single chip to which it should be well suited. Having entered the program and checked it via a test pin, at the end of the test sequence the logic on the chip itself can be arranged to "blow a fuse" in the access path to the program. The latter is therefore securely trapped in the chip, accessible only to the microprocessor. This has general application, but our preferred use is in the field of electronically controlled games, particularly fruit machines and video games. CLAIMS (filed 29.1.82)
1. A memory in chip form in which external access to a program stored therein is physically disconnectable within the chip by a signal generated subsequent to the entry and checking of the program.
2. A memory as claimed in claim 1, in combination with a microprocessor on a single chip.
3. A gaming or amusement with prizes machine controlled by a microprocessor with a programmed memory in combination as claimed in claim 2.
4. A method of protecting software, comprising a programmed electronic device in chip form, checking that program and generating a signal which physically disconnects, within the chip external access to the programme.
GB8103034A 1981-01-31 1981-01-31 Improvements relating to programmable memories Expired GB2092338B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8103034A GB2092338B (en) 1981-01-31 1981-01-31 Improvements relating to programmable memories

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8103034A GB2092338B (en) 1981-01-31 1981-01-31 Improvements relating to programmable memories

Publications (2)

Publication Number Publication Date
GB2092338A true GB2092338A (en) 1982-08-11
GB2092338B GB2092338B (en) 1984-07-18

Family

ID=10519381

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8103034A Expired GB2092338B (en) 1981-01-31 1981-01-31 Improvements relating to programmable memories

Country Status (1)

Country Link
GB (1) GB2092338B (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2154034A (en) * 1984-02-02 1985-08-29 Michael John Knight Microcomputer with software protection
GB2165377A (en) * 1984-09-19 1986-04-09 Itt Ind Ltd A computer element
EP0215464A2 (en) * 1985-09-20 1987-03-25 Hitachi, Ltd. Semiconductor integrated circuit device
US5062075A (en) * 1986-11-07 1991-10-29 Oki Electric Industry Co., Ltd. Microcomputer having security memory using test and destruction routines
GB2308905A (en) * 1996-01-08 1997-07-09 John Robert Miller Protected system processor
EP0890956A2 (en) * 1997-07-09 1999-01-13 Kabushiki Kaisha Toshiba Semiconductor device having a security circuit for preventing illegal access

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2154034A (en) * 1984-02-02 1985-08-29 Michael John Knight Microcomputer with software protection
GB2165377A (en) * 1984-09-19 1986-04-09 Itt Ind Ltd A computer element
EP0215464A2 (en) * 1985-09-20 1987-03-25 Hitachi, Ltd. Semiconductor integrated circuit device
EP0215464A3 (en) * 1985-09-20 1989-03-15 Hitachi, Ltd. Semiconductor integrated circuit device
US4905142A (en) * 1985-09-20 1990-02-27 Hitachi, Ltd. Semiconductor integrated circuit device with built-in arrangement for memory testing
US5062075A (en) * 1986-11-07 1991-10-29 Oki Electric Industry Co., Ltd. Microcomputer having security memory using test and destruction routines
GB2308905A (en) * 1996-01-08 1997-07-09 John Robert Miller Protected system processor
EP0890956A2 (en) * 1997-07-09 1999-01-13 Kabushiki Kaisha Toshiba Semiconductor device having a security circuit for preventing illegal access
EP0890956A3 (en) * 1997-07-09 2000-11-08 Kabushiki Kaisha Toshiba Semiconductor device having a security circuit for preventing illegal access

Also Published As

Publication number Publication date
GB2092338B (en) 1984-07-18

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee