GB2090091A - Controllable oscillator - Google Patents

Abstract

The oscillator includes a comparator T3, T4 which controls the charging and discharging of a capacitor 1 in dependence upon the relationship between a signal representative of the state of charge of the capacitor and a reference signal at point 11. When T3, T5 are on capacitor 1 charges until the voltage at 3 falls below the reference voltage at 11, determined by resistor 10 and current source 12. T3, T5 then turn off and T4, T6 turn on to discharge capacitor 1. At the same time current mirror T14, T15 short circuits resistor 10 to raise the reference voltage to which capacitor 10 must discharge before the current reverts to its initial state. The invention is particularly useful in providing a temperature stable controllable oscillator. <IMAGE>

Description

SPECIFICATION Controllable oscillator This invention relates to a controllable oscillator.

One form of controllable oscillator is the voltage controlled oscillator (V.C.O.) which finds extensive application in phase-locked loop circuits.

A known form of voltage controlled oscillator is the astable multivibrator which has been described in "Electronics" tilth September 1 980 at pages 124 to 130 inclusive.

In the astable multivibrator oscillator the frequency of oscillation is controlled by controlling the ratio between tail currents in two halves of the multivibrator circuit.

A problem with this known type of circuit is that it has an operating frequency which is strongly temperature dependent and it is necessary, in many applications, to provide relatively complex, temperature dependency compensating circuits in order to achieve adequate overall temperature stability of the operating frequency.

This invention seeks to provide a controllable oscillator in which the above problem is mitigated.

According to this invention there is provided a controllable oscillator comprising charge storage means, a comparator comparing two signals one representative of the state of charge of the charge storage means, and the other a reference signal, the comparator being arranged to control charging and discharging of the charge storage means in dependence upon the relative magnitudes of the two signals to provide an oscillating signal.

The charge storage means may be a capacitor.

The comparator may be arranged to steer current to control charging and discharging of the charge storage means.

The comparator may be effective to steer current through respective current mirror circuits for charging and discharging of the charge storage means.

The comparator may include a differential amplifier which provides an output current at one or other of two outputs in dependence upon the relative magnitudes of the two signals.

The diffential amplifier may be formed by two current switching devices arranged to switch a common current to one or other of the two outputs.

The current switching devices may be transistors fed with a common tail current.

A control may be provided for controlling the magnitude of the common current to control the oscillating frequency of the oscillator.

The two signals may be fed to respective inputs of the comparator by a respective signal follower circuit which may be a transistor emitter follower circuit.

Means may be provided for controlling the magnitude of the reference signal in dependence upon whether the charge storage means is being charged or discharged.

The means for controlling the magnitude of the reference signal may include a further comparator arranged to compare the two signals in parallel with the first mentioned comparator and having an output connected to control the magnitude of the reference signal.

The further comparator may comprise a further differential amplifier for switching current between one or other of two paths one of which is connected to control the magnitude of reference signal.

Current may be fed to control the magnitude of the reference signal via a current steering circuit which may be a current mirror.

The reference signal may be a reference potential and may be derived by passing current through a resistor.

The reference potential may be controlled to adopt a second value by short circuiting the resistor.

An exemplary embodiment of the invention will now be described with reference to the drawings which illustrates a controllable oscillator in accordance with the present invention.

The illustrated circuit includes charge storage means in the form of a capacitor 1 connected between a reference potential 2 and a circuit node point 3. A transistor T1 connected as an emiter follower has a base 4 connected to the circuit node 3 and an emitter 5 which feeds one input of a comparator circuit.

The comparator circuit is formed by transistors T3 and T4 connected as a differential amplifier and having emitters 6 and 7 respectively coupled together and to an adjustable current source 8.

The transistor T3 has a base 9 which is connected to the emitter 5 of the transistor T1 to form one input of the comparator.

A second input to the comparator is provided by a reference signal in the form of a reference potential which is derived from a resistor 10 having one terminal connected to the reference potential 2 and a second terminal connected to a circuit node 11 to which is coupled a current source 12.

The node 11 is connected to base 12 of the transistor 12 which like the transistor T1 is connected as an emitter follower and has an emitter 13 coupled to base 14 of the transistor T4 to provide a reference potential input for the comparator.

The transistor T3 has a collector 15 which feeds a current steering circuit in the form of a current mirror constituted by transistors T7 and T8 of opposite conductivity type to the transistor T3.

The transistors T7 and T8 have collector current paths 1 6 and 1 7 respectively arranged in parallel with one other and have emitters coupled to the reference potential 2.

The transistors T7 and T8 have interconnected bases 1 8 and 1 9 respectively, the base 18 of the transistor T7 being cross-connected to its collector current path 1 6.

Current flowing in the current path 1 7 of the transistor T8 is steered by means of a further current steering circuit also in the form of a current mirror consisting of transistors T9, T1 0 and T1 1 of opposite conductivity type to the transistors T7 and T8.

Current flowing in the collector current path 1 7 of the transistor T8 flows into collector 20 of the transistor T9 which has a common base connection 21 with the transistor Tri 0. The transistorT10 has a collector 22 which is connected to the circuit node 3 and the emitters of both the transistors T9 and T10 are connected to a reference potential 23.

The transistor Tri 1 is connected between the common base connection 21 and the collector 20 of the transistorT9, base 24 of the transistorT1 1 being connected to the collector 20 of the transistor T9 whilst the emitter 25 of the transistorT1 1 is connected to the common base connection 21.

The transistor T4 feeds a collector current path 26 and current flowing in this path 26 is steered by means of a current mirror circuit formed by transistors Ti 2 and T1 3 both of opposite conductivity type to the transistor T4 ThetransistorTi2 has a collector 27 connected to a collector 26 of the transistor T4 and a base 28 connected to base 29 of the transistor T13. The base and collector 28 and 27 respectively of the transistor Tri 2 are connected together and collector 30 of the transistor T13 is connected to the circuit node 3. The emitters of both the transistors T12 and T13 are connected to the reference potential 2.

In operation the transistors T3 and T4 which form the differential amplifier comparator share the current supplied by the current source 8 and one of these transistors will be turned "on" whilst the other is turned "off" in dependence upon the relative magnitudes of the potentials at the nodes 3 and 11 which potential are fed to the comparator via the emitter follower transistors T1 and T2 respectively.

Assume-that the transistor T3 is turned on so that current flows in the collector 1 5 of the transistor T3 and through the collector current path 1 6 of the transistor T7.

The current mirror circuit formed by the transistors T7 and T8 act to steer the current flowing through the transistorT3 into the collector current path 1 7 of the transistor T8 and this current is further steered by the current mirror circuit formed by the transistors T9, T10 and Ti 1 through the collector current path 20 of the transistor T9 and into the collector current path 22 of the transistor T10, to the node point 3.

Since the transistor T3 is turned on and T4 is turned off, the transistors T12 and T13, which form a current mirror connected to the collector 26 of the transistor T4, are also turned off so that the current flowing in the collector path 22 of the transistor 0, into the node 3, will be effective to charge the capacitor 1 which is also connected to this node point 3.

Whilst the comparator 1 is charging, current is also flowing through the resistor 10 supplied by the current source 12 and the potential at the node point 11 will therefore be relatively low. The potential at the node 3, which will initially be high due to the transistor T13 bring turned 'off,' will reduce linearly as the capacitor 1 is charged through the transistor T10.

When the potential at the node 3 falls to a value below that at the node 11 the differential amplifier will switch over so that the current supplied by the current source 8 will flow through the transistor T4 following turning 'on' of the transistor T2, whilst the transistors T1 and T3 turn off.

When the transistors T1 and T3 turn off the transistors T7, T8, T9, Tri 0 and Tri 1 will also all turn off so that the capacitor 1 is no longer being charged. The transistors T12 and T13 will however at this stage turn on so that collector current following in the collector 26 of the transistor T4 will be steered by the current mirror circuit formed by the transistors T12 and Tri 3 and will flow through the collector 30 of the transistor 13. The capacitor 1 will now discharge through the transistor Tri 3 and the potential at the node 3 will begin to rise again.

When the differential amplifier switches over so that the transistor T3 turns "off" and the transistor T4 turns "on" a second portion of the oscillator 'circuit now to be described will come into operation.

This second portion includes a further comparator in the form of a differential amplifier connected in parallel with the comparator formed by the transistors T3 and T4. The differential amplifier has transistors T5 and T6 with interconnected emitters fed with a common current from a current source 31. The transistor T5 has a base 32 connected to the base 9 of the transistor T3 and a collector 33 connected to a reference potential 34.

The transistor T6 likewise has a base 35 which is connected to the base 14 of the transistor 14 and feeds collector current via a collector current path 36 through a current steering circuit to the node 11.

The current steering circuit is a further current mirror formed by transistors T14 and Tri 5 of opposite conductivity types of the transistor T4, these transistors being connected as a current mirror in exactly the same way as the transistors T7 and T8. The transistor T14 has its collector connected to the collector current path 36 of the transistor T6 whilst the transistor Tri 5 has its collector connected to feed the node 11, the base and collector of the transistor T14 being interconnected.

During the period in which the capacitor 1 was being charged by current following through the transistor T3 the transistor T5 of the further comparator would be conductive but its collector current would have no effect on the operation of the circuit since its collector 33 is connected to the reference potential 34. When however the comparator switches over so that the transistor T4 becomes conductive, the transistor T6 will also be conductive and its collector current following in the collector current path 36 will be steered by the current mirror formed by the transistors T14 and T15 to the node ii and this will effectively short circuit the resistor 10 connected between that node 11 and the reference potential 2.As the transistors T3 and T4 therefore switch over the potential at the node ii will therefore rise abruptly.

As already described during the discharging of the capacitor 1 the potential at the node 3 will be increasing linearly and this increase will continue until the potential at the node 3 rises above the new high value appertaining at the node 11 following the switch over of the transistors T3 and T4. At this point the transistors T3 and T4 will once again switch over so that the transistor T3 becomes conducting and the transistor T4, together with the transistors T2, Tri 2, Tri 3, T14 and Tri 5 will turn off and the operational cycle will repeat itself.

The circuit will therefore oscillate and will provide at the node 3 an oscillating signal in the form of a triangular wave form and at the node ii an oscillating signal in the form of a rectangular wave.

In order to control the oscillating frequency of the oscillator the current supplied by the current source 8 may be adjusted and since this current provides the charging current for the capacitor 1 this will determine the charging time of that capacitor and hence the time taken for the circuit to switch over.

The circuit is stable with temperature because it is completely symetical any errors due to temperature in the capacitor charging side of the circuit being cancelled by similar errors on the capacitor discharging and reference signal side of the circuit.

The analysis does assume that base currents through the emitter follower transistors T1 and T2 are negligible but if this should not be the case then some variation of frequency with temperature might occur due to the temperature dependence of the base currents of these transistors. This can however be compensated relatively simply by injecting an equivalent amount of current into the base circuits of these transistors.

The circuit described with reference to the drawing is by way of example only and modifications may be made without departing from the scope of the invention. For example although the charge storage means has been illustrated in the form of a capacitor this is not essential and any suitable form of charge storage means may be utilised.

Claims (19)

1. A controllable oscillator comprising charge storage means, a comparator for comparing two signals one representative of the state of charge of the charge storage means, and the other a reference signal, the comparator being arranged to control charging and discharging of the charge storage means in dependence upon the relative magnitudes of the two signals to provide an oscillating signal.

2. A controllable oscillator as claimed in claim 1 in which the charge storage means is a capacitor.

3. A controllable oscillator as claimed in claim 1 or 2 in which the comparator is arranged to steer current to control charging and discharging of the charge storage means.

4. A controllable oscillator as claimed in claim 3 in which the comparator is effective to steer current through respective current mirror circuits for charging and discharging of the charge storage means.

5. A controllable oscillator as claimed in any preceding claim in which the comparator includes a differential amplifier which provides an output current at one or other of two outputs in dependence upon the relative magnitudes of the two signals.

6. A controllable oscillator as claimed in claim 5 in which the differential amplifier is formed by two current switching devices arranged to switch a common current to one or other of the two outputs.

7. A controllable oscillator as claimed in claim 6 in which the current switching devices are transistors fed with a common tail current.

8. A controllable oscillator as claimed in claim 6 or 7 in which a control is provided for controlling the magnitude of the common current to control the oscillating frequency of the oscillator.

9. A controllable oscillator as claimed in any preceding claim in which the two signals are fed to respective inputs of the comparator by a respective signal follower circuit.

10. A controllable oscillator as claimed in claim 9 in which the signal follower circuit is a transistor emitter follower circuit.

it. A controllable oscillator as claimed in any preceding claim in which means is provided for controlling the magnitude of the reference signal in dependence upon whether the charge storage means is being charged or discharged.

12. A controllable oscillator as claimed in claim 11 in which the means for controlling the magnitude of the reference signal includes a further comparator arranged to compare the two signals in parallel with the first mentioned comparator and having an output connected to control the magnitude of the reference signal.

13. A controllable oscillator as claimed in claim 12 in which the further comparator includes a further differential amplifier for switching current between one or other of two paths one of which is connected to control the magnitude of the reference signal.

14. A controllable oscillator as claimed in claim 13 in which current is fed to control the magnitude of the reference signal via a current steering circuit.

1 5. A controllable oscillator as claimed in claim 14 in which the current steering circuit is a current mirror.

1 6. A controllable oscillator as claimed in any preceding claim in which the reference signal is a reference potential.

1 7. A controllable oscillator as claimed in claim 1 6 in which the reference potential is derived by passing current through a resistor.

18. A controllable oscillator as claimed in claims 10 and 1 7 in which the reference potential is controlled to adopt a second value by short circuiting the resistor

1 9. A controllable oscillator substantially as herein described with reference to and as illustrated in the drawing.