GB2090090A

GB2090090A - Amplifier circuit

Info

Publication number: GB2090090A
Application number: GB8040799A
Authority: GB
Original assignee: Philips Electronic and Associated Industries Ltd
Current assignee: Philips Electronics UK Ltd
Priority date: 1980-12-19
Filing date: 1980-12-19
Publication date: 1982-06-30
Also published as: FR2497029A1; GB2090090B; DE3149290A1; US4473780A; FR2497029B1; JPH033961B2; DE3149290C2; JPS57129507A

Description

1 GB 2 090 090 A 1

SPECIFICATION Amplifier Circuit

The invention relates to an amplifier circuit comprising first and second transistors of like conductivity type with the emitter of the first transistor connected to the collector of the second transistor, the transistors being arranged with their main current paths in series in a voltage sharing 5 configuration between first and second supply terminals for a voltage supply, means for d.c. biasing the base of said first transistor for setting the quiescent voltage at the connection between the first and second transistors, means for applying an input signal comprising relatively high and low frequency components to the second transistor and means for deriving an output signal from a load connected between the collector of the first transistor and the first supply terminal. The invention also relates to a 10 dynamic focus voltage supply circuit for display apparatus having a cathode ray tube incorporating such an amplifier.

Amplifier circuits of the above type normally obtain the d.c. bias for the base of the first transistor from the collector of that transistor which means that an a.c. component is applied to that base. This results in both transistors amplifying both the high and low frequency components. Alternately, the 15 base of the first transistor may be separately d.c. biased with this base being decoupled for all amplifier signal frequencies which would produce the same result.

It is an object of the present invention to provide an amplifier circuit of the type described in which the amplification function may be divided.

The invention provides an amplifier circuit comprising first and second transistors of like conductivity type with the emitter of the first transistor connected to the collector of the second transistor, the transistors being arranged with their main current paths in series in a voltage sharing configuration between first and second supply terminals for a voltage supply, means for d.c. biasing the base of said first transistor for setting the quiescent voltage at the connection between the first and second transistors, means for applying an input signal comprising relatively high and low frequency 25 components to the second transistor and means for deriving an output signal from a load connected between the collector of the first transistor and the first supply terminal, characterised in that the base of the first transistor is decoupled at said high frequency but not at said low frequency and in that in operation, the first transistor amplifies the high frequency component but not the low frequency component whilst the second transistor amplifies the low frequency component but not the high frequency component. Such a circuit has the advantage that only one frequency component may be amplified by each transistor.

The circuit may be further characterised in that the said input signal may be applied to the base of the second transistor whilst the emitter of said second transistor may be connected to the second supply terminal. An alternative circuit maybe characterised in that the emitter of the second transistor 35 may be connected to the collector of a third transistor of like conductivity type whose emitter is connected to the second supply terminal, the said input signal being applied to the base of said third transistor, and that means are provided for biasing said second transistor such that the quiescent voltage at the connection between said second and third transistor is closer to the potential of the second supply terminal than the voltage at the connection between said first and second transistor. 40 Here the second transistor is current driven by the third transistor.

The circuit may be further characterised in that the voltage at the connection between said first and second transistors may be substantially half that of the supply when applied to said supply terminals.

The invention also provides a dynamic focus voltage supply circuit for display apparatus having a 45 cathode ray tube, said supply circuit incorporating an amplifier circuit as described above characterised in that the input signal applied to said second transistor comprises a first parabolic component at field frequency and a second parabolic component at line frequency, the said output providing a parabolic voltage at line frequency parabolically modulated at field frequency, and means for applying the said output voltage to the focus electrode of said cathode ray tube. The output voltage may be a.c. coupled 50 to said focus electrode to which electrode a d.c. voltage is additionally applied.

The above and other features of the invention will be more readily understood by a perusal of the following description with reference to the accompanying drawings, of which

Figure 1 is a circuit diagram of an amplifier circuit according to the invention, Figure 2 is a circuit diagram of a dynamic focus voltage supply circuit incorporating an amplifier 55 according to the invention, Figure 3 shows waveforms appearing at certain points in Figure 2, and Figure 4 is a circuit diagram shown in modification of part of Figure 2.

In Figure 1 terminal 1 is connected to the positive terminal of a high voltage power supply which typically may be 600 volts d.c. or in excess of that voltage. The terminal 1 is connected through a load 60 resistor R1 to the collector of transitor T1 whose emitter is directly connected to the collector of a second transistor T2, the emitter of transistor T2 being connected through a terminal 2 to earth to which the other terminal of the power supply is also connected. Transistors T1 and T2 are of like conductivity type, in this case NPN, and are both of a type which will not satisfactorily operate across 2 GB 2 090 090 A 2 the full voltage of the supply at terminal 1 the transistors typically being high voltage devices having a high gain at high frequencies. The base of transistor 1 is connected through a bias resistor to terminal 1 to produce at the base a d.c. bias voltage in the absence of signals in the circuit which sets the quiescent voltage at the emitter of transistor T1, this voltage being Vbe less than the voltage at this transistors base. Under normal circumstances where transistors T1 and T2 are of the same type this quiescent voltage at the connection between these transistors would normally be half the supply voltage present at terminal 1. Capacitor C1 is connected between the base of transistor T1 and earth, the purpose of this capacitor being explained hereinafter. The base of transistor T2 is connected to a terminal 3 to which the input signal for the amplifier circuit is applied. Such an input signal will contain components at relatively high and low frequencies and in one such instance the input signal could 10 contain two components of which one could be a low frequency component of 60 Hz and the other a high frequency component of 64 KHz. With the above frequencies in mind capacitor C1 is arranged to provide a low impedance to earth at the higher of these two frequencies but providing a blocking function at the lower frequency. Thus the base of transistor T1 in the presence of the above signal components is at a d.c. bias potential at the higher frequency due to the presence of capacitor C 1 which bias varies at the lower frequency rate due to the base current for transistor T1 flowing through the bias resistor R2.

The two signals are applied to the base of transistor T2 and in view of the low impedence to earth present at the emitter of transistor T1 by virtue of capacitor C1 connected to the base of that transistor, the transistor T2 will not amplify the high frequency component present at terminal 3, transistor T2 20 effectively operating in the grounded collector state for the high frequency component. For the low frequency component transistor T1 effectively operates as a grounded emitter amplifier and thus this transistor amplifies the low frequency component such that this amplified component appears at the collector of this transistor. For the low frequency component transistor T1 is effectively bottomed by the low frequency base current flowing in that transistor and thus transistor T1 and resistor R 1 provide the low frequency component load for transistor T2. Transistor T1 for the high frequency component operates effectively as a grounded base amplifier whose load is the resistor R1 and thus the high frequency component is amplified by transistor T1. The high frequency and low frequency currents through resistor R1 produce an amplified signal containing these two components at an output terminal 4 connected to this resistor as shown. As it is unlikely that the gains of transistor T1 and T2 30 would be matched to each other a feedback network comprising resistors R3 and R4 could be connected between the collector of transistor T1 and earth with the junction of these two resistors being connected to the base of transistor T2 and which also provides the d.c. bias for that base.

Although the circuit of Figure 1 has been described with only two components in the signal applied to the base of transistor T2 the signal could contain many components whose frequencies lie 35 between the low and the high frequency. Although the lower frequency components will be amplified by transistor T2 and the higher frequency components amplified by transistor T1 there will be a range of frequencies over which amplification will take place by both transistors.

One particular use of the basic circuit shown in Figure 1 is to provide amplificiation of two components, one being at field frequency and the other being at line frequency in a display arrangement to provide a dynamic focus voltage to the focus electrode of a cathode ray tube in such a display apparatus. In such apparatus where very high definition is required as with alpha-numeric display on a monochrome cathode ray display tube it is required to provide a focus voltage for the focus electrode which varies parabolically at both the line and field rates. Such a circuit is shown in Figure 2 and like components between this circuit and that shown in Figure 1 are given like references. In Figure 45 2 a parabolic voltage at a line frequency of 64 KHz is applied to a terminal 3A, this voltage being applied to the base of transistor T1 through a resistor R5. A terminal 3B receives a parabolic voltage at a field frequency of 60 Hz which is applied through resistor R6 to the base of transistor T2. The d.c. bias for transistor T1 is provided by a potential divider comprising resistor R2 and a further resistor R7

1 1 connected between the supply terminal 1 and earth. Feedback for the amplifier circuit is provided in the 50 same way as in Figure 1.

Figure 3 shows some of the waveforms of the voltages present at various points in Figure 2. Figure 3a shows the parabolic voltage at line frequency present at terminal 3A, whilst Figure 3b shows the parabolic voltage at line frequency present at terminal 3B these two waveforms not being to the same time scale. In the same way as with Figure 1 transistor T2 only amplifies the component at field 55 frequency and Figure 3c, which is to the same time scale as Figure 3b, shows this amplified field frequency component as present at the collector of transistor T2. It will be seen that a small amount of line frequency modulation is present on this field frequency voltage as transistor T2 does not amplify the line frequency component. Figure 3d, also to the same time scale as Figure 3b, shows the combination of the amplified line and field frequency components present at the collector of transistor 60 T1. This amplified signal is applied as shown in Figure 2, through a capacitor C2 and a resistor R8 to the g3 focus electrode of a cathode ray display tube DT. This field and line rate varying voltage is added to a d.c. voltage derived from a potential divider comprising a resistor R9 and a potentiometer R1 0 connected between supply terminal 1 and a terminal 5 which may convey a negative voltage depending on the type of display tube with which the circuit is to be used. The wiper of potentiometer 65 t 3 GB 2 090 090 A 3 R 10 is connected through a resistor R '11 to the junction of capacitor C2 and resistor R8 to provide the required d.c. focus voltage. If the levels of either of the inputs at terminals 3A or 313 are to be varied then a diode D connected in the direction shown should be provided across resistor R1 1 to clamp the lower edge of the dynamic focus voltage.

In a practical embodiment of Figure 2 the following component and supply values were employed- Cl 470 pF C2 68nF R5 1 OK 52 R6 1 OK 52 R7 560K 52 R 'I 330K S2 R8 220K S? R2 1MS2 R9 820KS2 R3 680K Q R10 R4 3K3 S? R11 2M2 S2 2M2 S? linear D Philips type BYV 95E DT Philips type M38 range 15 T1 Philips type BF 459 or BF 859 T2 Supply at terminal 1 +740v Supply at terminal 5-140v Line frequency parabola input at terminal 3A 6v peak-peak Field frequency parabola input at terminal 313 6v peak-peak 20

Field frequency parabola at T2 collector 250v peak-peak

Output at T1 collector 25Ov peak-peak field frequency parabola modulated by 25Ov peak-peak line frequency parabolic component.

A modification of part of the circuit shown in Figure 1 or Figure 2, is shown in Figure 4 where a 25 lhird transistor T3 of the same conductivity type as T1 and T2 has its collector connected to the emitter of transistor T2 whilst its emitter is connected through a resistor R 12 to earth, resistor R1 2 being decoupled by capacitor C3 placed in parallel with it. The base of transistor T3 is arranged to receive the relatively high and low frequency components. The base of transistor T2 is connected to terminal 6 which receives a d.c. bias for setting the quiescent voltage in the absence of signals in the circuit at the 30 collector of transistor T3 which maybe of a type for operating at a very much lower voltage (typically 12v) than transistors T1 and T2. The base of transistor T2 is decoupled for all signal frequencies by a capacitor C4. In the arrangement shown in Figure 4 the transistor T3 provides current drive to transistor T2 at all signal frequencies for transistors T1 and T2 which operate in a manner similar to that described above.

Whilst in the above description reference is made to only two transistors amplifying two signal components, arrangements are envisaged where a number of transistors are serially connected as in the manner for transistors T1 and T2 and where the base of the upper transistors are decoupled at various frequencies such that each transistor only amplifies part of the range of frequencies. With such an arrangement it would also be possible to derive components at different frequencies from the 40 various transistors in the arrangement.

Claims

1. An amplifier circuit comprising first and second transistors of like conductivity type with the emitter of the first transistor connected to the collector of the second transistor, the transistors being arranged with their main current paths in series in a voltage sharing configuration between first and 45 second supply terminals for a voltage supply, means for d.c. biasing the base of said first transistor for setting the quiescent voltage at the connection between the first and second transistors, means for applying an input signal comprising relatively high and low frequency components to the second ' transistor and means for deriving an output signal from a load connected between the collector of the first transistor and the first supply terminal, characterised in that the base of the first transistor is decoupled at said high frequency but not at said low frequency and in that in operation the first transistor amplifies the high frequency component but not the low frequency component whilst the second transistor amplifies the low frequency component but not the high frequency component.

2. A circuit as claimed in Claim 1, characterised in that the said input signal is applied to the base of the second transistor whilst the emitter of said second transistor is connected to the second supply terminal.

3. A circuit as claimed in Claim 1, characterised in that the emitter of the second transistor is connected to the collector of a third transistor of like conductivity type whose emitter is connected to 4 GB 2 090 090 A 4 the second supply terminal, the said input signal being applied to the base of said third transistor, and that means are provided for biasing said second transistor such that the quiescent voltage at the connection between said second and third transistor is closer to the potential of the second supply terminal than the voltage at the connection between said first and second transistor.

4. A circuit as claimed in claim 1, 2 or 3, characterised in that the voltage at the connection between said first and second transistor is substantially half that of the supply when applied to said supply terminals.

5. An amplifier circuit substantially as herein described with reference to the accompanying drawings.

6. A dynamic focus voltage supply circuit for display apparatus having a cathode ray tube, said 10 supply circuit incorporating an amplifier circuit arrangement as claimed in any of the preceding claims characterised in that the input signal applied to said second transistor comprises a first parabolic component at field frequency and a second parabolic component at line frequency, the said output providing a parabolic voltage at line frequency parabolically modulated at field frequency, and means for applying the said output voltage to the focus electrode of said cathode ray tube.

7. A dynamic focus voltage supply circuit as claimed in claim 8, characterised in that said output voltage is a.c. coupled to said focus electrode to which electrode a d.c. voltage is additionally applied.

8. A dynamic focus voltage supply circuit substantially as herein described with reference to Figure 2 of the accompanying drawings.

9. Television display apparatus incorporating a dynamic focus voltage supply circuit as claimed in 20 claim 6, 7 or 8.

0- Printed for Her Majesty's Stationery Office by the Courier Press, Leamington Spa, 1982. Published by the Patent Office, 25 Southampton Buildings, London, WC2A 1 AY, from which copies may be obtained.

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