GB2086633A - Coin sorting apparatus - Google Patents

Abstract

A signal transmitting coil OCL and a signal receiving coil RCL are disposed on the opposite sides of a coil passage and are magnetically coupled with each other. When a coin C passes between these coils, a voltage is induced in the transmitting coil whose voltage level varies depending upon permeability of the coin. The detected voltage is amplified by a plurality of parallel amplifiers having amplification factors determined by the material of the coin. The outputs of the amplifiers are converted into DC voltage and the levels thereof are judged whether they lie between a predetermined high level and a predetermined low level or not so as to produce a coin sorting signal. <IMAGE>

Description

SPECIFICATION Coin sorting apparatus Yhis invention relates to coin sorting apparatus which sorts coins of various types with electronic means, and more particularly coin sorting apparatus having an extremely high accuracy of sorting.

Various coin sorting apparatus have been proposed with the coin passage constructed such that by mechanically sorting the coins according to their outer diameter, weights, etc. However, such apparatus are not advantageous in that the construction of the coin passage and the coin judging mechanism is complicated.

To solve these problems, in recent years it has been proposed sorting apparatus in which a signal transmission coil and a receiving coil are disposed on both sides of a coin passage and an output voltage of the receiving coil generated at the time of passing of a coin is derived out as the sorting signal of the coin.

In this apparatus, when the coin sorting signal is derived out by comparing with a plurality of comparing circuits the peak levels of the voltages detected by receiving coil, detection errors are increased due to the detection of building up and building down of the detected voltage or of the chattering voltage induced by coil bounding, thus impairing the detection accuracy.

Moreover, where a coin made of a material having an extremely large or small permeability presents in the coins to be sorted, and where only one aplifier is used, the voltage level to the judged approaches the upper or lower limit of the level that can be judged which also decreases the accuracy of judgement.

Accordingly, it is an object of this invention to provide an improved coin sorting apparatus capable of electrically sorting coins at high accuracies and high resolutions.

According to this invention there is provided a coin sorting apparatus comprising a signal transmitter and a signal receiver which are disposed on the opposite sides of a coin passsage, a plurality of amplifiers for amplifying an output of the signal receiver, means for changing amplification factors of respective amplifiers, a plurality of converters for converting outputs of the plurality of amplifiers into corresponding DC voltages, and means for judging whether the levels of the DC voltages lie between predetermined upper and lower limits or not, thus producing a coin sorting signal.

Further objects and advantages of the invention can be more fully understood from the following detailed description taken in conjunction with the accompanying drawings in which: Figure 1 is a block diagram showing one embodiment of the coin sorting apparatus according to this invention; Figure 2a is a longitudinal sectional view showing a coin passage; Figure 2b is a vertical sectional view of the coin passage shown in Fig. 2a.

Figure 3 is a connection diagram showing the detail of a circuit for detecting 10 Yen coins; Figure 4 is a connection diagram showing the detail of the timing signal generator and Figure 5 is a timing chart usefel to explain the operation of the coin sorting apparatus.

Fig. 1 shows one embodiment of this inventin adpated to be used in a public telephone set.

The coin sorting apparatus shown in Fig. 1 comprises a reference signal generator SG for generating a constant reference voltage at a constant frequency, an oscillation or transmitting coil OCL and a receiving coil RCL which are disposed on the opposite sides of a coin passage, amplifiers AMP1, AMP2. . AMPn for amplifying the output of the receiving coil RCL, a plurality of resistors VR 1, VR2. . VRn for varying the amplification factors or gains of the respective amplifiers AMP1 . . AMPn, a plurality of DC converters for converting the AC output voltages of the amplifiers AM P1 ...AMPn into corresponding DC voltages, and a plurality of judging circuits DEC1 DECn which judge whether the levels of the DC outputs of the DC converters lie between predetermined levels or not, that is between a predetermined upper limit value U and a predetermined lower limit value L.

There are also provided a sensor SER which detects the fact that the transmision of the signal between the oscillation coil OCL and the receiving coil RCL is perfectly intercepted by a coin C, the sensor SER being shown as comprising a photocoupler consisting of a luminous element Pu and a light receiving element Pt; a timing signal generating circuit TSG which generates a timing signal in response to the output signal of the sensor SER; and a plurality of gate circuits G1, G2. . Gn respectively inputted with the timing signal generated by the timing signal generator TSG and the outputs of the judging circuits DEC1 . . DECn, the outputs of these gate circuits G1, G2...Gn being derived out as a selection signal for sorting the coins according to their types.Memory circuits MEM1, MEM2.. MEMn are provided to respectively store the outputs of the gate circuits G1 ... Gn under the control of a strobe signal SV from the timing signal generator for producing their outputs at output terminals PD1, PD2 . . PDn, respectively.

The amplification factors of respective amplifiers AMP1 . . AMPn are made to be different depending upon the types of the coins, so that the judging level bandwidths of the judging circuits DEC1 ... DECn are set as follows to provide high resolutions when the source voltage is 1 2 volts.

Judging circuit DEC1 1.8 V-3.2 V Judging circuit DEC2 2.4 V-3.2 V Judging circuit DECn 2.4 V-3.2 V In other words, a small amplification factor is selected for coins made of high permeability material whereas a large amplification factor is selected for coins made of low permeability material.

Figs. 2a and 2b show the construction of the coin passage and the arrangement of the oscillation coil and the receiving coil in which elements corresponding to those shown in Fig. 1 are designated by the same reference charactors. In Figs, 2a and 2b a symbol IN designates a coin inlet port, OUT a coin outlet port, CHT a passage of a coin C, and FLR a flapper. As shown in Fig. 29 and 26, the oscillation coil OCL, the receiving coil RCL and the sensor SER are assembled as a unit, which is disposed on the way of the loin passage CHT. The oscillation coil OCL and the receiving coil RCL are disposed on the opposite sides fo the coin passage CHT to oppose each other and are magnetically coupled with each other.In the same way, the luminous element Pu and the light receiving element Pt comprising the sensor SER are disposed on the opposite sides of the coin passage CHT. In this case, please note that the sensor SER is disposed downward to the oscillation coil OCL and the receiving coil RCL which comprise a signal transmitter and a signal receiver respectively, so that, when intermediate to the oscillation coil OCL and the receving coil RCL, the sensor detects an edge of the coin.

The operation of the embodiment shown in Fig. 1 will now be described with reference to Figs. 2a and 2b. When no coil C passes through the coin passage CHT, the receiving coil RCL magnetically coupled with the oscillation coil OCL excited by the output from the reference signal generator SG produces a high voltage which is amplified by respective amplifiers AMP1, AMP2. . AMPn and their AC output voltages are converted into DC voltages by DC converters DC1, DC2. . DCn.

The DC outputs are applied to judge circuits DEC1, DEC2...DECn respectively.

At this time, however, the gate signal G is not applied to the gate circuits G1, G2 . . Gn from the timing signal generator TSG, so that these gate circuits would not be enabled.

When a low denomination coin (made of copper), for example, is inserted into the coin inlet port IN, the magnetic coupling between the oscillation coil OCL and the receiving coil RCL is interrupted by the coin C, and this state is sensed by the senser SER. At the same time, the output voltage of the receiving coil RCL is reduced to a predetermined low value by the coin C. This reduced voltage is amplified by amplifier AMP1 with its amplifier cation factor set to a desired value, and the output of the amplifier is converted into a DC voltage by the DC converter DC1 and then, applied to the judging circuit DEC1.

As above described, since the judging level band width of the judging circuit is set to have a high resolution it judges whether the level of the converted DC voltage lies between the upper limit value U and the lower limit value L or not and the output of the judging circuit is applied to one input of the gate circuit G1. Since the other input thereof is supplied with the gate signal from the timing signal generator TSG controlled by the output of the sensor SER, the gate circuit G1 is enabled to produce a sorting signal of the low denomination coin which is stored in the detected data memory circuit MEM1 controlled by the strobe signal SV from the timing signal generator TSG. The output of this memory circuit MEM, is sent to the output terminal D1.

In this manner low denomination coin is sorted. Then when intermediate denomination coin made of cupronickel is inserted, the AC output voltage of the receiving coil RCL becomes lower than that for low denomination coin, and this output voltage is amplified by amplifier AMP2 for the intermediate denomination coins to be amplified with a preset amplification factor, s.-.J the AC output of this amplifier AMP2 is rectified into a DC voltage by the DC converter DC2 and then applied to the judging circuit DEC2 where a judgement is made as to whether the level of the DC voltage lies between the uppper limit value U and the lower limit value L or not.At the same time, the timing signal generator TSG generates a gate signal G in response to the output of the sensor SER which has detected the fact that the coupling between the oscillation coil OCL and the receiving coil RCL was interrupted by the intermediate denomination coin. This gate signal G is applied to the input of the gate circuit G2 together with the output of the judging circuit REC2, whereby the gate circuit G2 is enabled to produce a sorting signal of the intermediate denomination coin.

This sorting signal is stored in a detected data memory circuit MEM2 controlled by the strobe signal SV produced by the timing signal generator TSG to send out an output to the output terminal PD3.

Then when a high denomination coin made of silver is inserted, the output AC voltage of the receiving coil RCL becomes lower than that of the detection signal of the intermediate denomination coin and this output voltage is applied to another amplifier AMPn for high denomination coins having a preset amplification factor and its amplified output is applied to a judging circuit DECn after being converted into a DC voltage with a DC converter DCn. The judging circuit DECn judges as to whether the level of the DC voltage lies between the preset upper limit value U and the preset lower limit value L or not.At the same time, based on the output of the sensor SER that has detected the fact that the coupling between the oscillation coil OCL and the receiving coil RCL has been perfectly interrupted by the high denomination coin the timing signal generator TSG generates a gate signal G which is applied to a gate circuit Gn together with an output of a judging circuit DECn to enable the gate circuit Gn, whereby it produces a high denomination coin sorting signal which is stored in a detected data memory circuit MEMn controlled by a strobe signal SV generated by the timing signal generator TSG. The output of the memory circuit MEMn is sent to an output terminal PDn.

As above described, the inserted coins are sorted according to their types.

When a counterfeit coin is inserted, the output voltage of the receiving coil is different from predetermined values so that regular sorting operations of the low, intermediate and high denomination coins would not be effected thus rejecting counterfeit coins.

Accordingly, the sorting apparatus of this invention can sort various types of coins at high accuracies.

It should be understood that the coins to be sorted are not limited to specific Japanese coins.

Fig. 3 is a connection diagram showing one example of the reference signal generator, an amplifier, a DC converter, a judging circuit and a gate circuit which are used for sorting low denomination coins. In Fig. 3, blocks bounded by dot and dash lines correspond to the reference signal generator SG1 amplifier AMP1, DC converter DC1 and judging circuit DEC1 shown in Fig. 1 and elements corresponding to those shown in Fig. 1 are desiganted by the same reference charactors.

The reference signal generator SG is constituted by an operational amplifier OAl, an oscillation transistor Tr1, resistors R1, R2. . R8, capacitors C1, C2. . CS and a variable resistor VR1. The (+) input terminal of the operational amplifier OA, is connected to the junction between resistors R1 and R2 which are connected in series between a ( + ) 1 2 volt source and the ground, while the (-) input terminal is connected to the junction between serially connected resistors R3 and R4 and serially connected capacitors C1 and C2 which constitute an oscillation circuit and to the slidable contact of a variable resistor VR1 via a diode, the variable resistor VR1 being connected between the (+) 1 2 V source and the base electrode of the transistor Trl in series with resistors R6 and R7. The output terminal of the operational amplifier OAl is connected directly to the base electrode of the transistor TR1 and to the junction between the resistor R4 and the capacitor C2.

The collector electrode of transistor TR 1 is connected to the (+) 1 2 volt source, while the emitter electrode is ground and is also connected to the oscillation coil OCL shown in Fig. 1 via capacitor C4, the junction between this capacitor C4 and the oscillation coil OCL being grounded through capacitor C5.The junction between resistors R3 and R4 and that between capacitors C1 and C2 are grounded respectively through capacitor C3 and resistor R5.

The amplifier AMP1 is made up of an operational amplifier OA2, resistors R9, RlO. . . R15 and capacitors C6, C7 and C9.

The (+) input terminal of the operational amplifier OA2 is connected to the other amplifier, not shown as shown by an arrow and to the junction between resistors R9 and R11 which are connected in series between the (+) 1 2 V source and the ground, while the (-) input terminal is grounded through capacitor C7 and resistor R12 which are connected in series and also connected to the junction between resistor R 1 4 and capacitor C8 which are connected in series with the output terminal of the operational amplifier OA2, the other terminal of the capacitor C8 being grounded through resistor R15. The junction between resistors R9 and R11 is connected to the receiving coil RCL shown in Fig. 1 via serially connected resistors R10 and capacitor C6.

The DC converter DC1 is made up of diodes D1 and D2, a capacitor C9 and a resistor R16. The junction between diodes D1 and D2 is connected to the junction between the capacitor C8 and resistor R15 of the amplifier AMP 1. The anode electrode of diode D1 is grounded, while the cathode electrode of the diode D2 is grounded via capacitor C9 and resistor R16.The judging circuit DEC1 is made up of differential amplifiers DA1 and DA2, resistors R 1 7, R18...R23 and an inverter INV1. The (+) input terminal of the differential amplifier DA1 is connected to the junction of resistors R18 and R19 which are connected in series between the (+) 1 2 V source and the ground, while the (-) input terminal is connected to the junction between diode D2, capacitor C9 and resistor R16 of the DC converter DC1 via resistor R17. The output terminal of the differential amplifier DA1 is connected to one input of a gate circuit G1.The (+) input terminal of the differential amplifier DA2 is connected to the junction between resistors R20 and R21 serially connected between the (+) 1 2 V source and the ground, while the (-) terminal is connected to the (-) input terminal of the differential amplifier DA1. The output terminal of the differential amplifier DA2 is connected to a second input of the gate circuit G1. A (+) 5V source is connected to another judging circuit (not shown) as shown by an arrow and to the output terminals of the differential amplifiers DA1 and DA2 respectively through resistors R22 and R23.

A gate signal generated by the timing signal generator TSG shown in Fig. 1 is applied to the remaining input of the gate circuit G1 which is also supplied with the output of the judging circuit DEC 1.

In operation, the reference signal generator SG is supplied with an operating voltage from the (+) 1 2 V source to generate an output voltage of a constant frequency and voltage which is used to excite an oscillation coil OCL.

The amplifier AMP1 amplifies the output of the receiving coil RCL with a predetermined amplification factor and its AC output voltage is connected into a DC voltage by the DC converter DC. This voltage is applied to the judging circuit DEC1 in which whether the level of the DC voltage lies between predetermined limits or not by the differential amplifiers DA1 and DA2, and the outputs of these amplifiers are applied to the gate circuit G1 which is enabled by the gate signal from the timing signal generator TSG to produce a coin (for example low denomination) sorting signal.

Fig. 4 is a connection diagram showing one example of the detail of the timing signal generator TSC shown in Fig. 1, which comprises a counter CNT, flip-flop circuits FF1 and FF2, AND gate circuits AND1, AND2 and AND3, resistors R24, R25...R29, capacitors C10 and C11 and inverters INV2, IN V3. . . INV7.

The output of the sensor SER shown in Fig.

1 is applied to a terminal A and then supplied to the set terminals of the flip-flop circuit FF1 through inverter lNV2, capacitor Cm 0, resistor R25 and inverter INV3 which are connected in series. The Q output of the flip-flop circuit FF1 is applied to the reset terminal R of the counter CNT via an inverter INV4 to reset the counter, and to one input of AND gate circuit AND1, the other input thereof being connected to receive the 0 output of the flip-flop circuit FF2. Thus, the AND gate circuit AND1 produces a gate signal G. The junction between the input terminal A and the inverter INV2 is grounded through resistor R24, while the junction between the capacitor C10 and the resistor R24 is grounded through resistor R26.

A series circuit including resistor R27, variable resistor VR2 and resistor R28, and a capacitor Cli form an oscillation circuit which oscillates normally, and its output, that is a clock pulse is applied to the terminals l ,O and cpO of the counter CNT. The 04 output of the counter CNT is applied to one input of AND gate circuit AND2 via inverter INV2, the other input of the AND gate circuit AND2 being supplied with the output of the AND gate circuit AND 1. The Q5 output of the counter CNT is applied to the remaining input of the AND gate circuit AND2 so that this AND gate circuit AND2 is enabled when its three inputs are supplied with input signals to produce a strobe signal SV.The Q6 output of the counter CNT is applied to the set terminal S of the flip-flop circuit FF2 via inverter INV5, whereas the Q12 2 output is applied to one input of AND gate circuit AND3 via inverter INV6, the other input of AND gate circuit AND3 being connected to receive an initial reset signal IR from a terminal PDRES. The output of the AND gate circuit AND3 is applied to the reset terminals S of the flip-flop circuits FF1 and FF2 to reset the same. A resistor R29 is connected between the (+) 5 V source and one input terminal of the AND gate circuit AND3.

The timing signal generator TSG operates as follows. Thus, the counter CNT is reset by the (1output of the flip-flop circuit FF1 set by the output of the sensor SER whereby the counter CNT begins to count the number of the clock pulses produced by the oscillator described above to produce desired outputs at its output terminals Q4, 05, Q6 and Q12.

Based on the output of the sensor SER, the timing signal or the gate signal G and the strobe signal SV are generated. One example of the timing chart is shown in Fig. 5. In Fig.

5 curve (a) shows the output, that is the gate signal G outputted from the AND gate circuit AND1 which is inputted with the 0 output of the flipflop circuit FF1 and the 0 output of the flip-flop circuit Fr2, curve (b) represents the output, that is the strobe signal SV of the output of the AND gate circuit AND2 inputted with the output of the AND gate circuit AND1, the Q5 output of the counter CNT, and the Q4 output of the counter CNT, which is inverted by inverter INV7 and curve (c) shows the output of the AND gate circuit AND3 inputted with the Q12 output of the counter CNT, which is inverted with the inverter INV6 and the initial reset signal received at the terminal PDRES. The time T1 of curve (a) is 4ms, times T2 and T3 of curve (b) are 1 ms and 2ms respectively and time T5 of curve (c) is 256ms.

Although in the foregoing embodiment, the reference signal generator SG is constructed to normally produce the reference frequency, it is possible to start the reference signal generator by a timer, or an output detected by the senser SER. Furthermore, in addition to utilize the output of a gate circuit as a coin sorting signal, it is also possible to count the numer of the coins sorted by taking out the gate circuit output and then counting the number of the outputs.

Claims (9)

1. Coin sorting apparatus comprising: a signal transmitter and a signal receiver disposed on the opposite sides of a coin passage; a plurality of amplifiers for amplifying an output of said signal receiver, means for changing amplification factors of respective amplifiers; a plurality of converters for converting outputs of said plurality of amplifiers into corresponding DC voltages, and means for judging whether the levels of the DC voltages lie between predetermined upper and lower limits or not, thus producing a coin sorting signal.

2. The coin sorting apparatus according to claim 1 wherein said signal transmitter and said signal receiver comprise magnetically coupled coils, the coupling therebetween being changed by the presence of a coin to be sorted.

3. The coin sorting apparatus according to claim 1 which further comprises a sensor arranged adjacent to said signal transmitter and said signal receiver to detect whether or not a coin is passing therebetween, a timing signal generator for producing a timing signal in response to the output of said sensor, and a plurality of gate circuits respectively inputted with said timing signal and the outputs of said judging circuits for producing said coin sorting signal.

4. The coin sorting apparatus according to claim 3 which further comprises a plurality of detected data memory devices for respectively storing outputs of said gate circuits, said memory devices being controlled by a strobe signal generated by said timing signal generator.

5. The coin sorting apparatus according to claim 1 wherein the amplification factors of the amplifiers for coins made of high permeability material are selected to be small, whereas the amplification factors of the amplifiers for coins made of low permeability material are selected to be large.

6. The coin sorting apparatus according to claim 1 or 2 wherein said signal transmitter and said signal receiver are disposed on the way of said coin passage.

7. The coin sorting apparatus according to claim 3 wherein said signal transmitter, said signal receiver and sensor are disposed on the way of said coin passage.

8. The coin sorting apparatus according to claim 7 wherein said sensor is disposed downward to said signal transmitter and said signal receiver so that, when a coin thrown in said coin passage is positioned intermediate to the signed transmitter and said signal receiver, the sensor detects an edge of the coin.

9. Coin sorting apparatus substantially as described herein with reference to the accompanying drawings.