GB2082370A - Tape equalizer system - Google Patents

Tape equalizer system Download PDF

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Publication number
GB2082370A
GB2082370A GB8124381A GB8124381A GB2082370A GB 2082370 A GB2082370 A GB 2082370A GB 8124381 A GB8124381 A GB 8124381A GB 8124381 A GB8124381 A GB 8124381A GB 2082370 A GB2082370 A GB 2082370A
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GB
United Kingdom
Prior art keywords
tape
equalizer
effect transistor
circuit
field
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8124381A
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GB2082370B (en
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Pioneer Corp
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Pioneer Electronic Corp
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Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Publication of GB2082370A publication Critical patent/GB2082370A/en
Application granted granted Critical
Publication of GB2082370B publication Critical patent/GB2082370B/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/027Analogue recording
    • G11B5/035Equalising

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  • Amplifiers (AREA)

Abstract

A magnetic tape playback equalizer system includes a field- effect transistor (13), the gate (13c) of which is coupled directly to the output of the magnetic pickup head (3). The output of FET (13) is coupled by a capacitor (C4) to an active equalizer circuit (10) including an operational amplifier (11). FET (13) acts as a buffer to prevent capacitor C4 discharging through the head 3 and thus recording a noise signal when the apparatus is switched off. The Q-factor of the resonant circuit formed by the inductance of head 3 and a shunt capacitor C3 is variable by means of an adjustable resistor R9 to thereby adjust the high frequency compensation of the head 3. <IMAGE>

Description

SPECIFICATION Tape equalizer system The present invention relates to a tape equalizer system. Heretofore, in the case where a tape equalizer system has required a high gain because a low output head is used or because an equalizer output must be of a DolbyTM level, three types of tape equalizer systems as shown in Figs. 1 through 3 have been used.
These tape equalizer systems will each be described.
In Fig. 1, reference numeral 1 designates a tape equalizer circuit forming a first of the aforementioned tape equalizer systems, which includes an operational amplifier 2. The negative terminal 2a of the amplifier 2 is grounded through a resistor R, and a capacitor C,. A negative feedback circuit composed of a parallel circuit of a resistor R2 and a capacitor C2, and a resistor R3 connected in series with the parallel circuit is connected between the inverting terminal 2a and the output terminal 2b of the operational amplifier 2. Reference numeral 3 designates a magnetic head to which a capacitor 3 is connected in parallel.
The magnetic head 3 is connected through a coupling capacitor C4 to the positive terminal 2c of the operational amplifier 2.
In the tape equalizer system thus constructed, a high gain is provided by the operational amplifier 2. However, the open loop gain of the operational amplifier 2 is limited, and the open loop gain falls off in the low frequency ranges by the time constant R2C2.
Therefore, if the gain of the equalizer circuit is increased only by increasing the gain of the operational amplifier 2, then the amount of negative feedback is insufficient and accordingly the frequency response and distortion factor are degraded for both high and low frequency ranges. Furthermore, this tape equalizer circuit is disadvantageous in that, if a ferrite head is used as the magnetic head 3, the S/N ratio is low. This is due to the fact that a iarger area of the ferrite head is not covered by a shielding case in comparison with a PermalloyTM head. Thus, noise is liable to be produced caused by external induction.
Another disadvantage of the equalizer circuit is that when the power switch is turned off with a cassette tape loaded in the tape recorder (such as when a cassette tape is loaded in a car stereophonic device and the ignition key of the car is turned off), the discharge current of the coupling capacitor C4 flows through the magnetic head 3, as a result of which noise is recorded on the cassette tape.
In order to overcome this difficulty, a second of the aforementioned tape equalizer systems as shown in Fig. 2 has been proposed.
In this tape equalizer system, an amplifier including a transistor Tr, is provided as a rear stage following the equalizer circuit 1. The arrangement of the amplifier with the transistor Tr, will be described. The output terminal of the operational amplifier 2 is connected through a coupling capacitor C5 to the base B of the transistor Tr,, to which voltage dividing resistors R4 and R5 are connected. The emitter E of the transistor Tr, is connected to a bias resistor R6 and the collector C is connected to a load resistor R7. The connecting point of the voltage dividing resistor R4 and the load resistor R7 is connected to a power source Vec. In Fig. 2, those components which have been previously described with reference to Fig. 1 are therefore similarly designated wth the same reference characters and a further description thereof will be omitted.
In the tape equalizer system of Fig. 2, the gain of the equalizer circuit 1 is limited, and a high gain is provided by the amplifier circuit including the transistor Tr,. Therefore, the negative feedback of the equalizer circuit 1 is never insufficient, and therefore degradation of the frequency response and distortion factor in the ehigh and low frequency ranges is prevented.
However, this tape equalizer system is disadvantageous in that, if a ferrite head is employed as the magnetic head, the S/N ratio is low. Furthermore, the tape equalizer system suffers from the drawback that when the power switch is turned off with a cassette tape loaded in the tape recorder, the discharge current of the coupling capacitor C4 flows through the magnetic head 3, as a result of which noise is recorded on the cassette tape. In addition, this tape equalizer system is disadvantageous in that, as two coupling capacitors are required, the number of components is larger than that of the first tape equalizer circuit. Moreover, noise signals may be generated by leakage currents from the coupling capacitors C4 and Cs.
A third of the aforementioned tape equalizer systems is shown in Fig. 3. In this tape equalizer system, an amplifier circuit including a transistor Tr, is provided as a front stage in front of the equalizer circuit 1. In this tape equalizer system, as in the system shown in Fig. 2, the negative feedback of the equalizer circuit 1 is sufficient, and therefore degradation of the frequency response and distortion factor in the high and low frequency ranges is prevented. Furthermore, even if a ferrite head is employed as the magnetic head 3, the S/N ratio is never lowered.
However, the tape equalizer system of Fig.
3 is also disadvantageous in that when the power switch is turned off with a cassette tape loaded in the tape recorder, the discharge current of the coupling capacitor C4 flows through the magnetic head 3, as a result of which noise is recorded on the cassette tape.
Furthermore, the tape equalizer system suffers from drawbacks that, as two coupling capacitors C4 and C5 are required, the number of components is increased, and noise signals are generated by leakage currents from the coupling capacitors C4 and Cs.
It is an object of this invention to provide a new or improved tape equalizer in which the aforementioned disadvantages are overcome or reduced.
According to one aspect of this invention there is provided a tape equalizer system comprising: an amplifier circuit comprising a field-effect transistor receiving an output signal from a magnetic head; and an equalizer circuit; and a coupling capacitor coupling an output of said field-effect transistor to said equalizer circuit.
According to another aspect of this invention there is provided a tape equalizer system comprising: an amplifier circuit comprising a field-effect transistor having a gate coupled directly to a first terminal of a magnetic head a second terminal of which is grounded with said magnetic head being shunted a first capacitor, a variable first resistor coupled between said gate of said field-effect transistor and ground, a second resistor coupled between a source of said field-effect transistor and ground, and a third resistor coupled between a drain of said field-effect transistor and a positive voltage source; an active equalizer circuit comprising an operational amplifier and predetermined feedback elements coupled to said operational amplifier; and a coupling capacitor coupled between said drain of said field-effect transistor and a non-inverting input of said operational amplifier.
In the drawings: Figures 1 to 3 are circuit diagrams showing conventional tape equalizer systems; and Figure 4 is a circuit diagram of a preferred embodiment of a tape equalizer system according to the invention.
A preferred embodiment of a tape equalizer system of the invention will be described with reference to Fig. 4.
In Fig. 4, reference numeral 10 designates an equalizer circuit including an operational amplifier 11. The arrangement of the equalizer circuit 10 will be described. A negative feedback circuit composed of a parallel circuit of a resistor R2 and a capacitor C2, and a resistor R3 connected in series with the parallel circuit is connected between the inverting input terminal 1 1 a and the output terminal 1 b of the operational amplifier 1 1. The negative terminal 1 1a is grounded through a resistor R1 and a capacitor C,.
Further in Fig. 4, reference numeral 12 designates an amplifier circuit including an FET (field-effect transistor) 13. The arrangement of the amplifier circuit 12 will be described. The source 1 3a of the FET 13 is connected to a bias resistor R8 and the drain 1 3b is connected through a load resistor to a power source Vbb and through a coupling capacitor C4 to the non-inverting input terminal 1 c of the operational amplifier 11.
A magnetic head 3 is shunted by a capacitor Cs. The magnetic head 3 is connected to the gate 1 3c of the FET 13 to which a gate leak resistor R9 is also connected. The gate leak resistor R9 is a variable resistor. By varying the resistance of the gate leak resistor R9 the quality factor Q of the resonance circuit formed by the inductance of the magnetic head 3 and the capacitor C3 can be varied, whereby the high frequency compensation of the magnetic head 3 can be adjusted.
The operation of the tape equalizer system thus constructed will be described.
A signal recorded on a cassette tape is picked up by the magnetic head 3. The output signal of the magnetic head 3 is subjected to high frequency compensation by the capac itor C3 and the gate leak resistor Rg and is then applied to the gate 1 3c of the FET 13.
The signal is amplified by the amplifier circuit 12 and is then applied through the coupling capacitor C4 to the operational amplifier 11.
In the equalizer circuit 10, feedback control is effected by the negative feedback circuit composed of the resistors R2 and R3 and the capacitor C2, as a result of which a signal having a predetermined level is provided at an output terminal 14.
The high frequency compensation can be controlled by varying the resistance of the gate leak resistor R9. That is, by varying the resistance value of the gate leak resistor Rg, the quality factor Q of the resonance circuit formed by the inductance of the magnetic head 3 and the capacitor C3 is changed, whereby the high frequency compensation of the magnetic head is adjusted.
When the power switch is turned off with a cassette tape loaded in the tape recorder, the discharge current of the coupling capacitor C4 tends to flow to the magnetic head 3. However, due to the provision of the coupling capacitor C4 in the rear stage of the amplifier circuit 12 including the FET 13, the amplifier circuit 12 serves as a buffer, preventing the flow of the discharge current of the coupling capacitor C4 to the magnetic head.
In accordance with the invention, high gain is not provided by the operational amplifier itself forming the equalizer circuit (as is appear ent from the above description). Therefore, the negative feedback of the equalizer is main tained at a sufficient level. Accordingly, degradation of the frequency response and distortion factor in the high and low frequency ranges is prevented. Furthermore, if a low output ferrite head is used or if a high output level is required as in a DolbyTM circuit, a high S/N ratio, a low distortion factor and a flat frequency response are provided.
Because of the inherent properties of an FET, it is unnecessary to use a coupling capacitor. Therefore, the difficulties that the discharge current of a coupling capacitor flows to a magnetic head through an amplifier circuit implemented with an FET and noise is recorded on a cassette tape are eliminated with the use of the invention.
With the invention, only one coupling capacitor is employed. Therefore, not only the number of components is decreased, but also the generation of noise due to leakage current from such a coupling capacitor is eliminated.

Claims (6)

1. A tape equalizer system comprising: an amplifier circuit comprising a field-effect transistor receiving an output signal from a magnetic head; and an equalizer circuit; and a coupling capacitor coupling an output of said field-effect transistor to said equalizer circuit.
2. A tape equalizer system as claimed in Claim 1 wherein said amplifier circuit comprises means for adjusting frequency compensation of said magnetic head.
3. A tape equalizer system as claimed in Claim 1 or Claim 2 wherein said output signal from said magnetic head is coupled directly to a gate electrode of said field-effect transistor.
4. A tape equalizer circuit as claimed in any one of the preceding claims wherein said equalizer circuit comprises an operational amplifier, said capacitor coupling said output of said field-effect transistor to a non-inverting input terminal of said operational amplifier.
5. A tape equalizer system comprising: an amplifier circuit comprising a field-effect transistor having a gate coupled directly to a first terminal of a magnetic head a second terminal of which is grounded with said magnetic head being shunted a first capacitor, a variable first resistor coupled between said gate of said field-effect transistor and ground, a second resistor coupled between a source of said field-effect transistor and ground, and a third resistor coupled between a drain of said fieldeffect transistor and a positive voltage source; an active equalizer circuit comprising an operational amplifier and predetermined feedback elements coupled to said operational amplifier, and a coupling capacitor coupled between said drain of said field-effect transistor and a non-inverting input of said operational amplifier.
6. A tape equalizer system substantially as hereinbefore described with reference to and as shown in Fig. 4 of the accompanying drawings.
GB8124381A 1980-08-18 1981-08-10 Tape equalizer system Expired GB2082370B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11699080U JPS5740142U (en) 1980-08-18 1980-08-18

Publications (2)

Publication Number Publication Date
GB2082370A true GB2082370A (en) 1982-03-03
GB2082370B GB2082370B (en) 1984-08-15

Family

ID=14700740

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8124381A Expired GB2082370B (en) 1980-08-18 1981-08-10 Tape equalizer system

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JP (1) JPS5740142U (en)
DE (1) DE3132649C2 (en)
GB (1) GB2082370B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6492876B1 (en) * 2001-10-25 2002-12-10 National Semiconductor Corporation Low power analog equalizer with variable op-amp gain
WO2023115456A1 (en) * 2021-12-23 2023-06-29 深圳市傲科光电子有限公司 Continuous time linear equalization circuit and broadband receiver

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE697655A (en) * 1966-05-16 1967-10-02 Ampex
US3843965A (en) * 1973-05-24 1974-10-22 Computer Design Corp Magnetically recorded clock reading circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6492876B1 (en) * 2001-10-25 2002-12-10 National Semiconductor Corporation Low power analog equalizer with variable op-amp gain
WO2023115456A1 (en) * 2021-12-23 2023-06-29 深圳市傲科光电子有限公司 Continuous time linear equalization circuit and broadband receiver

Also Published As

Publication number Publication date
JPS5740142U (en) 1982-03-04
GB2082370B (en) 1984-08-15
DE3132649C2 (en) 1984-07-05
DE3132649A1 (en) 1982-06-09

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PCNP Patent ceased through non-payment of renewal fee