GB2080000A - Data Transmission System - Google Patents

Abstract

Four wires, namely: a serial data line 10, a wire 11 for clock purposes, a power supply line 12, and a common return 13 connect remote points (POINT 1 to POINT N) to a central control. At each remote point input data is converted by a data converter 15 into a logic-based signal which is loaded sequentially onto the serial data line 10 by a shift register 16. This loading is controlled by counters 17 which count clock pulses on the clock wire 11, and an 0 detector 18 which detects signals on the data line 10. The counter 17 of POINT N initiates the loading of that point's data signal on to the serial data line 10. When this signal reaches the next point down the line 10, the 0 detector 18 orders the shift register 16 there to load the line 10 with its information, before that which is upstream, so the information is in sequence on the data line 10. <IMAGE>

Description

SPECIFICATION Data Transmission System This invention relates to a data transmission system using transmission lines such as electrical wires or optical fibres.

In certain practical applications, it is necessary to supply signals, for example of a yes/no kind, from a multiplicity of remote points to a central control. A practical example is an intruder alarm system where it is necessary to monitor circumstances prevailing at a large number of locations, such as windows and doors and to supply signals from these locations back to a central control under the supervision of a single operator who is kept advised, by the control, of any condition requiring attention at any of the points.Conditions which might be monitored, in decreasing order of importance or priority are, for example: condition code point in alarm condition W battery voltage failing X transmitter not operating reliably Y clear state or non-alarm condition Z Whilst each remote point could be connected back to the central control for monitoring each of these conditions independently, this is wasteful in both materials and labour. An object of this invention is to provide an arrangement which simply enables all the remote points to be linked together serially, with a final connection to the central control, thereby avoiding the need to connect each point independently back to the central control.

With this object in view, the present invention provides a data transmission system effective to provide for receipt and analysis, at a central control, of signals generated at each of a plurality of remote points, characterised in that said points are connected in series by a serial data line, each said point comprising sensor means and a shift register operative to supply a respective logicbased signal to the serial data line, under the influence of its respective sensor means, upon detection of a signal applied to said line by the next adjacent point further away from the control, with the exception of a master point connected so as to be furthest away from the control and operative, upon transmission to the control of a complete cycle of signals from all of the points, to supply its signal to the serial data line as the start of the next subsequent cycle.

The sensor means preferably comprises a plurality of sensors and data convertor adapted to supply logic data, corresponding to the sensed conditions, to the shift register.

In order that the invention may be fully understood, it will be described further, by way of example, with reference to the accompanying drawing, in which: Fig. 1 is a block diagram illustrating a preferred embodiment of the data transmission system of the invention: Fig. 2 is an amplified block diagram illustrating the components present at two of the remote points of the system of Fig. 1; and Fig. 3 is a diagram illustrating typical signals transmitted in the system of Figs. 1 and 2 and plotted against time.

In all of the figures, similar reference numerals have been allocated to similar points.

Referring firstly to Fig. 1, in the illustrated practical embodiment of the invention, a four wire system is proposed, first wire 10 forming a data highway or serial data line with second wire 11 being used for clock purposes. Third wire 1 2 is a power supply line to power all of remote points which are represented by the points POINT 1 to POINT N and fourth 13 wire is used as a common return connection.

Turning now to Fig. 2, the monitored remote points, as a matter of convenience, are all identical insofar as they contain the same component parts, but are adaptable to form one of two roles. The POINT N furthest away from central control 14 is allocated master status and basically restricted to the three components shown namely a data convertor 15, shift register 16 and counter 17. A fourth component in the form of an O-detector 18 (see point 3) may be present at point N, but if so it is not used.In operation, the master point N has no serial data entering, being the last point on the data line 11 and therefore its serial data input is connected to provide a logical 1 level and thus initially its shift register 1 6 will be filled with 1 '5. Its counter 1 7 may be adapted to count up to any predetermined number, and when it has counted up to this number it resets itself to zero and recommences counting. In addition, it provides an output at the end of its count to instruct its shift register 1 6 to parallel load its data input.By way of example, if as shown there are four data inputs W, X, Y, Z whose states are binary logic levels, these are converted by the data converter 1 5 of Point N to one of four simple codes as follows:- Input Code W 010 X 0110 Y 01110 Z 011110 These codes may be representative of the four detected conditions referred to at the introduction of this specification.

If more than four data inputs are required, the code could obviously be expanded, but the coding would then perhaps become increasingly inefficient to the point where other method of coding would be preferred. The data converter 1 5 also exhibits a priority feature such that an input to W takes precedence over inputs X, Y and Z; the X input in turn takes priority over Y and Z; and finaily Y is preferred to Z which has the lowest priority.

The encoded information supplied by the data converter of point N to its shift register 1 6 is passed by way of the data line 10 to the next monitor point, which in the illustrated case is the point 3, and at the input of this point is the 0 detector 1 8 (not used in the case of the master point N), and upon detecting the arrival of a 0, point 3 resets its own counter 1 7 to zero and also sends a parallel load instruction to its shift register 1 6. The data converter 1 5 of point 3 will encode as follows: Input Code W 01 X 011 Y 0111 Z 01111 being different from the data converter of the master point N insofar as the final 0 is omitted.

The data converter 1 5 of the point 3 exhibits the same priority feature as that of the master.

Thus the data at this point 3 is encoded onto the data stream on the line 10 in front of that provided by the master point N. If the counter 17 of the point 3 has counted less than a predetermined number of clock pulses by the time the 0 detector 1 8 of the point 3 detects the next zero, then whilst the latter 0 detector 1 8 resets the counter 1 7 of the point 3, the latter counter in turn inhibits the 0 detector 1 8 from giving a parallel load instruction to its shift register 1 6.

The remaining points (Point 1, Point 2, Point....) in the chain are configured exactly as described in relation to point 3 above and therefore the process of each point adding its data to the data stream in the data line 10 ahead of that preceding it continues, to produce a data chain of which Fig. 3, which shows signals conforming successively to data W, Y, X and Z supplied from four different points to the serial data line 10, in comparison with the pulses of the clock, is illustrative.

The master counter 1 7 of point N is so arranged that when all the points (1, 2... .N) have encoded their data and supplied to the data stream on the line 10, the master point N adds to the data stream a further sequence of 1 's the number of which exceeds the maximum number of consecutive 1 's that can be supplied to the data stream by the shift registers 1 6 responsive to the data converter inputs. The master counter 1 7 of the point N is so arranged that when the addition of these extra 1's has been completed, the master counter has counted to its predetermined setting and completed a cycle.

Then the master point repeats its data encoding operation as previously described as the start of a next subsequent cycle, which cycles are repeated during operation of the system.

Should there be a break in the interconnection between two adjacent points, or should any point stop working for whatever reason, the next point closer to the central control will no longer receive any input data and therefore no incoming zero will be detected. That point's counter will then count up to its predetermined setting whereas previously it was reset to zero every time an incoming zero was detected. After counting up to its predetermined setting it issues its parallel load instruction to its shift register 1 6 and thereby takes over as the master point, supplying its data to the line 10 which data subsequently is detected by the Odetection of the next adjacent point and so on. Thus no matter where a break might occur, the last point still connected to the central control will assume master status.

A typical system may contain up to 100 points in which case the counters 1 7 would each be arranged to count to 512, a convenient binary number.

With four data inputs at each of one hundred points as previously described the longest data chain length arises when all the points have their Z inputs operative only, requiring 100 five bit codes plus a further 0 to total 501 bits plus a further eleven 1's. The production of these additional eleven 1's permit each counter to exceed the predetermined setting at which it inhibits its 0 detector from giving a parallel load command to its shift register, completing the cycle.

Obviously, should more or fewer points be required, it may be advantageous to alter the predetermined counter settings to a more appropriate value and it may also be necessary to alter the 0 detector inhibit output of the counter from the non-master points.

Whilst all the counters 17 and shift registers 1 6 are shown as operating from the clock line (the clock signal being shown as being provided by the central control) an alternative method of operation would be to use the clock for the master point N only, with all the subsequent points deriving the clock from the data stream line 10 by suitable data encoding, such as bi-phase encoding. By this means, any problems due to propagation times are eliminted.

A further alternative would be to provide each point with clock generating means and to arrange for normally only the master point to have its clock operative, with provision that in the event of point failure, the next point takes over master status and activates its own clock means.

A typical clock speed is of the order of 1000Hz which can be readily transmitted along a twisted pair cable, and this would typically complete an entire scan of all the points in under half a second which is an acceptable response time.

Whilst the foregoing description details the embodiment of this invention as being transmitted over wires, transmission of the data over optical fibres is not precluded.

The function of the central control is to receive and operate on the received data. Such control may, for example, consist of a microprocessor controlled unit to display and act upon the received data. As each serial data stream cycle commences with a sequence of l's in excess the maximum number of 1's which can be generated by any point, the commencement of each cycle is readily ascertainable by the central control. Then as the data is sequential and in each case the start and finish of the encoded data is identified by a 0, the central control can simply determine which data has been encoded by which point.

Claims (7)

Claims

1. A data transmission system effective to provide for receipt and analysis, at a central control, of signals generated at each of a plurality of remote points, characterised in that said points are connected in series by a serial data line, each said point comprising sensor means and a shift register operative to supply a respective logicbased signal to the serial data line, under the influence of its respective sensor means, upon detection of a signal applied to said line by the next adjacent point further away from the control, with the exception of a master point connected so as to be furthest away from the control and operative, upon transmission to the control of a complete cycle of signals from all of the points, to supply its signal to the serial data line as the start of the next subsequent cycle.

2. A transmission system as claimed in claim 1 wherein the sensor means comprises a plurality of sensors and a data converter adapted to supply logic data, corresponding to the sensed conditions, to the shift register.

3. A transmission system as claimed in claim 1 or 2 wherein each remote point is adapted to act as the master point in such a manner that in the event of breakage of the serial data line, the last part will assume master status.

4. A transmission system as claimed in any preceding claim wherein all the remote points are connected in series to the central control by four wires which are: the serial data line, a power supply line, a common return wire and a wire for clock purposes.

5. A transmission system as claimed in any preceding claim where the shift register is effective to provide a logicbased signal which is a binary logic signal.

6. A transmission system as claimed in any preceding claim wherein the central control comprises a microprocessor controlled unit.

7. A transmission system substantially as hereinbefore described with reference to and as illustrated in the accompanying drawing.