GB2079568A - Data compression apparatus and method - Google Patents

Abstract

Apparatus and method that selects for display that data sample of each exclusive and successive group of data samples which differs the most in amplitude from the data sample selected for display from the previous group, thereby preserving detail in eg: electrocardiograms.

Description

SPECIFICATION Data compression apparatus This invention is concerned with improvements in or relating to data compression apparatus.

Equipment for monitoring physiological functions, such as the electrical activity of the heart, often outputs digital data samples at a rate that is greater than economical cathode ray tube display or other monitoring apparatus can accommodate. For example, the digital data samples may occur every two milliseconds and the display apparatus may only be capable of displaying a sample every eight milliseconds, thus requiring a four-to-one data compression. One way of compressing the data is to average each successive group of four data samples. Unfortunately, however, this reduces the amplitude of narrow pace pulses, that are of utmost importance, to a point where they may become indistinguishable from noise.

The present invention provides apparatus for compressing data represented by samples occurring at a given frequency in such a manner that they can be displayed without loss of significant detail of the data, the apparatus comprising an input to which the data samples representing the given variable can be applied, an output, means coupled to said input for selectively applying to said output one sample of each successive group of samples, each group containing a given number of samples, and means for causing said latter means to select a sample in each group that represents a value of the variable that is farthest away from the value represented by the sample selected from a previous group.

The present invention further provides a method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, the method comprising the steps of treating the samples as successive groups of samples; and selecting from each group a sample having a value which is farthest away, in magnitude, from the value of the sample selected from a previous group.

In accordance with the illustrated embodiments of this invention, the data sample of each group that is selected as a display sample is that data sample which differs the most from the data sample that was selected as the display sample in the previous group. Apparatus for performing this function comprises an input to which data samples may be applied, an output that may be coupled to a display means, means for conducting to said output the data sample of each successive group of samples having a value that is farthest from the value of the data sample selected from a previous group. Other compression ratios can also be used.

There now follows a detailed description which is to be read with reference to the accompanying drawings of methods and apparatus according to the present invention; it is to be clearly understood that the methods and apparatus have been selected for description to illustrate the invention by way of example and not by way of limitation.

In the accompanying drawings: Figure 1 illustrates a plurality of typical data samples from which an electrocardiogram can be formed in which successive groups of four are indicated; Figure 2 illustrates the display samples that are the average of each group of data samples in Fig. 1; Figure 3 illustrates the data samples of each group of Fig. 1 that are selected as display samples in accordance with this invention; Figure 4 is a block diagram of a circuit for selecting the data sample of each group that is to be a display sample in accordance with this invention in which the absolute differences between all data samples of a group and the data sample selected from the previous group are made simultaneously available before the data sample having the largest absolute difference is selected as the display sample;; Figure 4A illustrates input and output strobing pulses used in Fig. 4, as well as data samples used in explanation; Figure 5 is a block diagram of another circuit for selecting data samples to be used as display samples in accordance with this invention in which the absolute differences between each data sample of one group and the display sample from the previous group are made successively available and successively compared before selecting the data sample having the largest absolute difference as the display sample; Figure 5A illustrates certain control pulses used in Fig. 5; Figure 6 is a flow chart that is a basis for a program for a computer or processor that can select the data samples in accordance with this invention; Figure 7 is an ECG wave formed from some actual data samples;; Figure 8 is an ECG wave formed from display samples selected by averaging the groups of the data samples used in forming the ECG wave of Fig. 7; and Figure 9 is an ECG wave formed by selecting a display sample from each group of four data samples in accordance with this invention.

In the following detailed description of embodiments of this invention, the term "sample" will refer to the actual value of a data sample or of a display sample, whether it is an analog sample or a digital sample.

In Fig. 1, each data sample is indicated by an "0", successive groups of four data samples are respectively encircled by separate lines 2, 4, 6, 8, and 10, and the average of the data samples in each group is indicated by points 2', 4', 6', 8', and 10' respectively. Thedata point P in the group 6 represents a pace pulse. Fig. 2 illustrates the electrocardiogram which would result if the data is compressed by using the average values 2', 4', 6', 8', and 10' of each group of data samples. Note that the pace pulse P represented by the display sample 6' of the group 6 is greatly attenuated.

In accordance with this invention, the data sample in each of the groups 2, 4, 6, 8 and 10 that is selected as a display sample is the data sample that differs from the data sample selected from the previous group by the greatest absolute amount. In Fig. 3, the data samples that are selected as display samples are indicated by an "X" and are separately plotted and joined by a solid line. It can be seen that the pace pulse P is selected as a display sample.In view of the fact that the data sample of a group that is to be selected as a display sample cannot be determined until all data samples of the group have been examined, the data sample of a group that has been selected as a display sample is supplied to the display means at a point between the last data sample of the group and the first data sample of the next, as indicated by the X's in Fig. 3 that are connected by a dashed line.

Reference is now made to the circuit of Fig. 4 that selects the data samples that are to be the display samples in accordance with the invention. Analog data, such as the output of an ECG machine, is supplied by a source 12 to an analog-to#digital converter 14 that supplies digitized data samples to a latch L, that is connected in series with latches L2, L3 and L4. The Q output of each latch is connected to the D input of the next latch in the series so as to form a shift register. The A/D converter 14 and the latches L1, L2, L3 and L4 are strobed by pulses S illustrated in Fig. 4A that are supplied to a lead 16 by a pulse generator 18. Any form of digital counter may be used, but a Johnson counter is satisfactory.The Q outputs of the latches L1, L2, L3 and L4 are respectively connected to the D inputs of latches L5, L6, L7 and L8 as well as to inputs of subtracting means 20, 22, 24 and 26. The other inputs of the subtracting means 20, 22, 24 and 26 are connected to a data output bus 28 so as to receive the data sample of the previous group that was selected as a display sample. The output 28 is connected to a display means 29. The outputs of the subtracting means 20, 22, 24 and 26 are respectively connected to absolute value circuits 20', 22', 24', and 26'. The outputs of the absolute value circuits 20' and 22' are respectively connected to the X and Y inputs of a comparator 30 as well as to input terminals I and ,u of a switch S,.When the value at its input X is less than the value at its input Y, the comparator 30 produces a high state at its output 32. The output 32 is connected via a lead 34 to a control terminal 36 of the switch S,. When the control terminal 36 is in a high state, the output 0 of the switch is connected to its input terminal y.

The outputs of the absolute value circuits 24' and 26' are respectively connected to inputs X and Y of a comparator 38 as well as to input terminals I and jb of a switch S2. When the value of the input X is less than the value at the input Y, the comparator 38 produces a high state at an output 40. The output 40 is connected via a lead 42 to a control terminal 44 of the switch S2 When the control terminal 44 is in a high state, the output 0 of the switch S2 is connected to its input terminal y.

The outputs 0 of the switches S, and S2 are respectively connected to the X and Y inputs of a comparator 46 via leads 48 and 50. When a value at its input X is less than the value at its input Y, the comparator 46 produces a high state at its output 52.

The means for selecting the data sample having the greatest absolute difference from the data sample of the previous group of data samples may include the following logic circuits. An input 54 of an AND gate 56 is connected via an inverter 58 to the output 32 of the comparator 30, and its other input 60 is connected via an inverter 62 to the output 52 of the comparator 46.

An input 64 of an AND gate 66 is connected to the output 32 of the comparator 30, and its other input 65 is connected via the inverter 62 to the output 52 of the comparator 46. An input 68 of an AND gate 70 is connected to the output 52 of the comparator 46, and its other input 72 is connected via an inverter 74 to the output 40 of the comparator 38. An input 76 of an AND gate 78 is connected to the output 52 of the comparator 46, and its other input 80 is connected to the output 40 of the comparator 38.

The conduction of the selected data sample of a group to the output bus 28 and thus to the display means 29 is accomplished as follows. The respective outputs 82, 84, 86 and 88 of AND gates 90, 92, 94 and 96 are respectively connected to the trigger inputs of the latches L5, L6, L7 and L8. The inputs 98, 100, 102 and 104 of the AND gates 90, 92, 94 and 96 respectively are connected via a bus 106 to an output 108 of the pulse generator 18 at which the output strobing pulses S' of Fig. 4A appear and, although not shown, the respective inputs d', c', b' and a' of the AND gates 90, 92, 94 and 96 are respectively connected to the outputs d', c', b' and a' of the AND gates 56, 66, 70 and 78.In a manner to be explained, only one of the outputs d', c', b' and a' will be in a high state when an output strobing pulse S' appears on the bus 106 so that only one of the AND gates 90, 92, 94 and 96 will have both inputs in a high state so as to cause its output to have a high state. The latch L5, L6, L7 or L8 to which that output is connected will be triggered so as to transfer the data sample at its D input to its 0 output and thus to the data sample output bus 28 and the display means 29. The data sample will remain at these points until the strobing pulse S' of the next group of data samples occurs, at which point a new data sample will be conducted to the bus 28.

The overall operation of the circuit of Fig. 4 will now be explained by reference to the signals S and S' of Fig. 4A as well as to data sample values A, B, C and D of group I and A', B', C' and D' of Group II. Assume that the data sample A of group I was selected as the display sample for that group. After the fourth pulse 110 of the input strobing signal S has occurred, the values of the data samples A', B', C' and D' will be at the 0 outputs of the latches L4, L3, L2 and L1 respectively, as indicated. This seeming inversion results from the fact that the data sample A' is the first one of group II to be received so that it advances through all the latches La, L2, L3 and L4 in sequence.The outputs of the subtractors 20, 22, 24 and 26 will be D'-A, C'-A, B'-A and A'-A respectively and the outputs of the absolute value circuits 20', 22', 24' and 26' will be |D'-A|, |D'-A|, |B'-A| and |A'-A| respectively. By inspection, it can be seen that IC'-AI > ID'-AI so that the output 32 of the comparator 30 will be in a high state (+) and cause the output 0 of the switch S, to be connected to its input terminal ,u as schematically indicated by the arrow, so as to supply the value IC'-Al to the X input of the comparator 46.It can also be seen that |A'-A| > | B'-A| so that the output 40 of the comparator 38 will be in a high state (+) and cause the output 0 of the switch S2 to be connected to its input terminal as schematically indicated by the arrow, so as to supply the value (A'-AI to the Y input of the comparator 46. Inasmuch as |C'-A| > |A'-A|, the the output 52 of the comparator 46 will be in a low state (-). Examination of the resulting states at the inputs of the AND gates 56, 66, 70 and 78 shows that the AND gate 66 is the only one having both inputs in a high state so that its output c' is the only one in a high state. Thus, when the output strobing pulse 111 of the group II occurs the output of the AND gate 92 will go to a high state and trigger the latch L6.

The latch L8 then transfers the value of the data sample C' to its Q output and the data sample output bus 28, where it will remain until the next pulse of the signal S' occurs.

Alternative Circuit The circuit of Fig. 5 examines each data sample of a current group in sequence to determine whether its absolute difference from the display sample of the previous group is greater than the absolute difference due to previous data samples in the current group. If so, it is temporarily stored in a latch, and when all current data samples have been examined, the data sample then in the latch is transferred to a display means. An analog data source 114, e.g., an ECG machine, is connected to an A/D converter 11 6 that supplies digitized samples of the analog data to the D input of a latch L11. Its Q output is connected to the D input of a latch L2, and to one input 118 of a subtractor 120.The Q output of the latch L2, is connected to the D input of a latch L3,, and its Q output is connected to the other input 122 of the subtractor 120 as well as to a display means 124.

An output 126 of the subtractor 120 is connected to an absolute value circuit 128, and its output 129 is connected to one input 130 of an AND gate 132. In the interest of simplicity, only one data line has been shown, but any number could be used. The number of AND gates 132 would equal the number of data lines. The output 1 34 of the AND gate 132 is connected to the D input of latch L4', and the Q output of the latch L41 is connected to the X input of the comparator 136. The Y input of the comparator 136 is connected to the output 129 of the absolute value circuit 128. The output 138 of the comparator 136 has a high state only if the value at its X input is less than the value at its Y input and is connected to the D input and is connected to the D input of L5,.The 0 output 140 if Lsl is connected to one input of OR gate 142. One input 144 of an AND gate 146 is connected to the output 147 of the OR gate 142, and the output 150 of the AND gate 146 is connected to the' trigger input of the latch L4, as well as to the trigger input of the latch L2,.

A signal generator 152 supplies the signals s" S2, S3, S4, S5 and S6 shown in Fig. 5A to the indicated points in the circuit: the signal s1 being supplied to the trigger inputs of the A/D converter 116 and the latch L1'; the signal S2 being supplied to the other input 154 of the AND gate 132; the signal S3 being supplied to the other input 156 of the AND gate 146; the signal 54 being supplied to the trigger input of the latch L3,; the signal s5 being supplied to the other input 158 of the OR gate 142; and the signal S6 being supplied to the trigger input of the latch Lsl. One skilled in the art could provide these signals with a Johnson counter, OR gates and astable multivibrators.

Each pulse of the signal s1 causes a different data sample to appear at the Q output of the latch L11 and the D input of the latch L2'. Assume that the data samples in Fig. 5A arrive in the sequence A', B', C' and D' that the display sample that was selected from the previous group of data samples is DS. Also assume that the X input of the comparator 136 has been set to zero value before the first data sample A' arrives in response to the first pulse 159 of the signal s1.

During the data sample A', the output of the subtractor 120 is A'-DS and the output of the absolute value circuit 128 that is applied to the Y input of the comparator 136 is IA'-DSI.

Owing to the fact that the signal S2 at the input 154 of the AND gate 132 is high, the absolute value IA'-DSI passes to the D input of the latch L4,, but its Q output and therefore the X input of the comparator 136 remain at zero value. Inasmuch as this is less than the value IA'-DSI applied to the Y input of the comparator 136, its output has a high state. This high state appears at the D input of Lsl until the first pulse 174 of the signal S6 triggers it to the Q output of L5'.It then passes through the OR gate 142 to the input 144 of the AND gate 146 and, when the first pulse 160 of the signal 53 arrives at the other input 156 of the the AND gate 146, its output goes high so as to trigger the latch L4, and transfer the value IA'-DSI to the Q output of the latch and the X input of the comparator 136. The second pulse 162 of the signal s1 causes the data sample B' to appear at the input 11 8 of the subtractor, but by inspection it can be seen that IA'-DSI > IB'-DSI so that the output 138 of the comparator 136 drops to a low state and the value A'-DS remains at the X input of the comparator.However, when the data sample C' arrives, lC'-DSl > IA'-DSt so that the output 138 of the comparator 136 is high, thereby triggering the latches L4, and L5, as described previously and placing the value IC'-DSt at the X input of the comparator. Inasmuch as ID'-DSI < IC'-DSI, the latches L5, and L4, are not triggered when D' arrives.

Each time the latch L4, is triggered, the latch L2, is triggered so that the data sample A' was transferred to the Q output of the latch L2,. Since the latches were not triggered in response to the data sample B', the data sample A' remained at the Q output of the latch L2,, but when the data sample C' arrived, the latches L2, and L4, were triggered with the result that the data sample C' took the place of the data sample A'. As the latches were not triggered in response to the data sample D', the data sample C' was not removed.

The X input of the comparator 136 is set to a zero value in preparation for the next group of samples as follows. After the last data sample D' in the group has arrived and after the last pulse 164 of the signal 53, the value at the Q output of the latch L2, is C'; but if the data sample D' differed more from DS than C', there would be enough time for D' to reach the Q output of the latch L2,. After enough time has elapsed for this to occur, the signal s2 drops to a low state, as indicated at 166, so as to cause the output of the AND gate 132 and the D input of the latch L4, to drop to a low state or zero value.When a narrow pulse 168 of the signal 53 arrives at the input 1 56 of the AND gate 146, its output 150 will go high and trigger the latch L4, so as to transfer the zero value at its D input to its a output and thus to the X input of the comparator 136 if the other input 156 of the AND gate 146 is also at a high state. As this may or may not be the case, depending on the effect of the sample D', a pulse 1 70 of the signal 55 is applied to the input 1 58 of the OR gate 142. Thus, regardless of the effect of the sample D', the input 144 of the AND gate will be high when the pulse 168 makes its other input 1 56 high so that the latch L4, is triggered. The zero value at the D input of the latch L4, is transferred to its Q output and therefore to the X input of the comparator 136.The circuit is now ready to analyze the next group of data samples.

The data sample C' that is at the D input of the latch L3, is transferred to the display means 129 by application of the pulse 176 of the signal 54 to the trigger input of L3,. The pulse 1 76 occurs before the pulse 168 so as to transfer the selected data sample, in this example C', to the display means 124 before the clearing of L4, and the simultaneous strobing of D' into L2, by the pulse 168.

Whereas the invention can be performed with the circuits of Figs. 4 and 5 in the manner described, it is generally preferable to utilize a microprocessor or computer, especially if they are available for other purposes. Fig. 6 illustrates a flow chart that can be used as a basis for formulating programs for any general purpose processor or computer, but the program set forth below is for the Hewlett-Packard HP 9825A programmable calculator. The numerals within the blocks are the numbers of the related steps in the program.

Analog data is provided by a source 173 to an A/D converter 175 that is timed by a system clock 177 which controls the rate at which the various steps of the program proceed. During the occurrence of a first group of data samples A, B, C and D, the program steps 2, 3 and 4 of block 178 place the value of the data sample of the previous group that was selected as the display sample for that group into the Y register, not shown, where it can be used during the processing of the next group of samples A', B', C' and D' that is a possible display sample at various points in the program is placed in a register DS, not shown. Decision blocks 180, 182 and 184 respectively determine if IA'-YI > IB'-YI, if IA'-YI > IC'-YI, and if tA'-Y( > lD'-Yl. The program progresses from one block to the next only if the answer is affirmative. If all these decisions are affirmative, data sample A' is put in the display register DS, block 186, and as indicated at block 188, it is output to a display means 1 90. If the answer in block 180 is negative, then B' is a possible display sample and is put in the register DS, block 192, until a final determination is made. But before B' is designated as a display sample, blocks 194 and 196 which respectively determine if [ B'-Yl > lC'-YI and if IB'-YI > ID'-YI must yield affirmative answers. If they do, data sample B' which is already in the register DS is inputted to the display device 190 as indicated at block 188.If, however, the decision of the block 194 is negative, data sample C' now becomes a possible display sample and is placed in the register DS, block 198, but before being designated as the display sample, a block 200 must produce an affirmative answer indicating that IC'-YI > ID'-YI. If the answer of the block 200 is affirmative, the data sample C' which is already in the register DS is inputted to the display device 190 as indicated at block 188. If the decision of block 200 is negative, then the data sample D' is placed in the DS register, block 202, and inasmuch as the process is completed, the sample D' is inputted to the display device 190 as indicated at block 188.

If the decision of the block 180 is affirmative, i.e., |A'-Y| > |B'-Y|, but the decision of the block 182 is negative, i.e., |A'-Y| < |C'-Y|, thendata sample C' may be the display sample and is put into the DS register as indicated in block 198. The program then continues from block 198 to determine whether IC'-YI > ID'-Y, block 200, as before. If so, data sample C' is inputted to the display device 190 from the register DS; but if not, data sample D' is the display sample and it is placed in the register DS, block 202. From there, the data sample D' is inputted to the display device 190, block 188. If the answers of the blocks 180 and 182 are both affirmative and the decision of the block 184 is negative, i.e. IA'-YI < ID'-YI, then data sample D' is the display sample and is placed in the register DS, block 202.From there, it is transferred, block 188, to the display device 190.

Program for HP 9825A 0: "enhl":dsp "in enhl" 1: for I = 1 to 8192 by 8 2: otf (K$ [ l, I + 1 ] )#r1; itf (K$ [ 1 + 2, 1 + 3 ] )er2 3: itf (K$ [ l + 4, 1 + 5 ] )or3; itf (K$ [ 1 + 6, 1 + 7 ] )or4 4: CeY 5: if abs (r1 -Y) > abs(r2-Y); gto 10 6: r2#C 7: if abs (r2-Y) > abs (r3-Y); gto 1 3 8: r3#C 9: gto 18 10: if abs (r1 -Y) > abs (r3-Y); gto 16 11: r3#C 12: gto 18 13: if abs (r2-Y) > abs (r4-Y); gto 21 14 r4#C 15: gto 21 16: if abs (r1-Y) > abs (r4-Y); gto 20 17: gto 14 18: if abs (r3-Y) > abs (r4-Y); gto 21 19: gto 14 20: r1 C 21: dspC 22: next I Fig. 7 illustrates an ECG wave formed by using all original data samples occurring every two milliseconds as display samples. Fig. 8 illustrates an ECG wave formed from the same original data samples by using the average of each consecutive group of four as a display sample. Fig. 8 illustrates an ECG wave formed in accordance with this invention from the same original data samples by selecting as the display sample those data samples in each consecutive group of four having the greatest absolute difference with respect to the data sample selected as the display sample for the previous group.Note that the pace pulse P' of Fig. 7 is completely lost in the noise in the ECG wave of Fig. 8, but that it retains its full amplitude in the ECG wave of Fig.

9. This is of significance when implanting or evaluating the performance of a pace maker device in a patient.

In the embodiments of the invention herein described, one data sample in each successive exclusive group of four is selected as a display sample. Whereas this would indicate a severe loss in information content of the resulting ECG wave, as actually occurs in the averaging method of data compression illustrated in Fig. 8, it has been found that the loss in content is considerably reduced by using the described technique. The invention may be applied by using groups containing two or more data samples, but if the number of data samples in a group is not a power of 2, the average of the data samples in a group must be determined by a true divider rather than by eliminating bits of lower significance. The loss of information content will, of course, increase as the number of samples in a group is increased. It is thought that the circuits as well as the program could be altered by one skilled in the art to work with groups having other than four data samples. It will also be appreciated that the particular decisions illustrated in the flow chart of Fig. 6 could be altered as long as a final determination is made as to which data sample of a group differs the most from the previous sample.

Claims (4)

1. Apparatus for compressing data represented by samples occurring at a given frequency in such a manner that they can be displayed without loss of significant detail of the data, the apparatus comprising: an input to which the data sampl#es representing the given variable can be applied, an output, means coupled to said input for selectively applying to said output one sample of each successive group of samples, each group containing a given number of samples, and means for causing said latter means to select a sample in each group that represents a value of the variable that is farthest away from the value represented by the sample selected from a previous group.

2. Apparatus for compressing data represented by samples occurring at a given frequency in such a manner that they can be displayed without loss of significant detail of the data, substantially as hereinbefore described with reference to Figs. 1, 3, 4, 4A, 6 and 9, or with reference to Figs. 1, 3, 5, 5A, 6 and 9 of the accompanying drawings.

3. A method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, the method comprising the steps of: treating the samples as successive groups of samples; and selecting from each group a sample having a value which is farthest away, in magnitude, from the value of the sample selected from a previous group.

4. A method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, substantially as hereinbefore described with reference to Figs. 1, 3, 4, 4A, 6 and 9, or with reference to Figs. 1, 3, 5, 5A, 6 and 9 of the accompanying drawings.