GB2077537A - Digitising circuitry - Google Patents

Abstract

Circuitry for digitising the signal produced by for example a strain gauge bridge (10) comprises a signal processing channel (20) including an amplifier and A-D converter connected to the bridge output by a semi-conductor switch (18) controlled by a microprocessor (22) which periodically changes over the switch (18) so as to digitise a calibration signal derived from the energising source (12) for the bridge by means of a signal attenuating high stability amplifier (32) and a high stability voltage divider (30). The microprocessor scales the output of the channel (20) by a multiplying factor the magnitude of which is such that its product with the value ale represented by the digitised calibration signal is always constant. In this way, any drift is compensated for by change in the magnitude of the multiplying factor. <IMAGE>

Description

SPECIFICATION Improvements relating to digitising circuitry This invention relates to digitising circuitry for providing a digital representation of an analogue input signal produced by an electrical network which is energised by an excitation source and is respon sive to a physical parameter, such as weight, whereby the magnitude of said input signal varies in dependence upon the value of said parameter In known digitising circuitry for use for example in digitising load cell output signals, to obtain a high degree of accuracy, costly high stability components have had to be used throughout with temperature compensation of individual circuit boards and the assembly as a whole.

The object of the present invention is to provide improved digitising circuitry which allows the use of low stability components in the signal processing channel thereof whilst maintaining a high degree of accuracy.

According to the present invention we provide digitising circuitry for producing a digital representation of an analogue input signal produced by an elec trical network which is energised by an excitation source and is responsive to a physical parameter whereby the magnitude of said input signal varies in dependence upon the value of said parameter, said digitising circuitry comprising a signal processing channel to which the input signal can be applied and which includes an analogue-digital converter for digitising said input signal, means for deriving from said excitation source a calibration signal and periodically applying said calibration signal to said signal processing channel and means responsive to the calibration signal after digitisation by said signal processing channel for computing a scaling factor for combination with the digitised input signals whereby any drift in the operating conditions of the signal processing channel can be compensated for by modification of said scaling factor.

The means for deriving the calibration signal from the excitation source conveniently comprises a high stability amplifier (acting as an attenuator) and a high stability voltage dividing network connected to the amplifier, and the output from the amplifier may be applied to the A-D converter as a reference signal.

Thus, in accordance with the invention, any changes in the gain output ofthe signal processing channel with respect to for example time and temp erature are compensated for by appropriate modifi cation of the scaling factor and provided that the ecalibration signal is maintained proportional to the magnitude of the excitation source (which will be the case if a high stability amplifier and voltage divider are employed) the electrical components in the signal processing channel do not need to have high stability characteristics.

Preferably said signal processing channel is pre ceded by switching means operable to couple said channel with said input signal or with said calibra tion signal or with a signal corresponding to a "zero" reference level, the arrangement being such that, during a calibration cycle, the calibration and "zero" reference level signals are coupled to the signal processing channel to enable the computing means to determine the difference therebetween and the computing means thereafter computes the scaling factor such that the product of the scaling factor and said difference is equal to a predetermined constant.

The switching means will normally couple the input signal to the signal processing channel and will only be changed over periodically for calibration purposes. Such switching for calibration purposes may be effected automatically either at regular intervals or at intervals dependent upon the magnitude of the correction, if any, necessary to the scaling factor in a previous calibration cycle or cycles or it may be initiated by an external command, e.g. a manually entered command.

Preferably an AC excitation source is employed as this enables relatively inexpensive CMOS semiconductor switches to be used as the switching means.

The computing means is conveniently embodied within a microprocessor unit which is also programmed to act as a weighted, running average digital filter.

One example of the present invention is illustrated in the accompanying drawing to which reference is now made. As shown, the circuit comprises a load cell 10 in the form of a number of strain gauges connected in a wheatstone bridge configuration and energised by a voltage source 12, the strain gauges being mounted for example on a bending beam or the like to which a weight to be measured is applied.

The source 12 may provide DC excitation but, as previously mentioned, AC excitation is preferred.

Typically, the source 12 provides a squarewave excitation voltage of the order of 20 volts RMS.

The output of the load cell 10 taken from the points 14, 16 is applied, via analogue switching circuitry 18, to a signal processing channel 20 including an amplifier and a ratiometric analogue-to-digital converter and the digitised output from the A-D converter is applied to a microprocessor unit 22 which, inter alia, controls the switching circuitry 18 and is also programmed to act as a weighted, running average digital filter, the filtered output being applied to a display unit 24.The A-D converter is conveniently of the duty cycle type where the input and reference signals are continuously integrated to form pulse trains whose mark-space ratios represent the instantaneous digital magnitude of the input signal, the output signal being in the form of a digital representation of said ratio and the converter having infinite rejection at the digitisation frequency.

The reference signal for the A-D converter is derived from the excitation source 12 via a signal attenuating, high stability reference amplifier 32 whose output is applied to the A-D converter via the line 34. The output of the amplifier 32 is also applied to a high stability voltage divider 30 whose output is applied via line 28 to the switching circuitry 18. Normallythe switching circuitry 18 will be in a condition in which the line 17 from the load cell is connected to the signal processing channel 20. For reasons explained below, the switching circuitry is operable selectively underthe control of the microprocessor unit 22 via line 23 to connect line 28 or line 26 to the signal processing channel 20.Because the excitation source is an AC signal, the switching circuitry 18 may, as previously mentioned, comprise CNIOS semi-conductor switches which are relatively inexpensive compared with the type of switches that wouid be necessary if DC excitation is used.

To compensate for any drift in the signal processing channel gain, e.g. as a result of temperature changes, the output signal from the converter is multiplied by a value M in the MPU 22 whose magnitude is related to the signal channel gain determined during a calibration cycle, as explained below. The calibration cycle may be executed either automatically at intervals or in response to entry of a manual command or the application of a load to the load cell.

During a calibration cycle, the MPU 22 causes the switching circuitry 18 to switch the signal processing channel 20 over from the load cell output 16to the load cell zero reference rail 26 and then to the output 28 of the divider 30 (or vice versa) which provides a voltage proportional to the excitation voltage applied to the load cell by the source 12. The amplifier 32 and divider 30 are designed so that the overall attenuation of the excitation voltage is constant and virtually independent of temperature change, e.g. a drift in gain (attenuation) of no more than one ppmldegree C. The output 34 of the reference amplifier is applied to the A-D converter to provide the usual reference signal input.

If the A-D converter output is equal to a value Z when connected the zero reference level 26 and R when connected to the divider 30, then the multiplier M is computed by the MPU 22 such that M(R-Z) is a non-volatile constant, i.e. the products of the analogue section gain and the periodically calculated multiplier is a constant. In this way, any drift in the signal channel gain is compensated for by variation of the multiplier M such that any deviation of the digitiser output from the true value can be held to the drift occuring within the calibrationlreference signal channel formed by the amplifier 32 and divider 30, i.e. typically one ppm/degree C.

When effected automatically, the calibration cycle may be executed at regular intervals, typically at five minute intervals; however, the timing between successive calibration cycles is preferably made dependent upon the magnitude of the correction effected to the multiplier M during a previous calibration cycle or cycles whereby calibration cycles are carried out at relatively short intervals during periods, e.g.

initial switch-on) in which the multiplier corrections are relatively large and at relatively longer intervals when a steady state condition has been reached wherein only smali, if any, corrections are necessary to the multiplier M.

From the foregoing, it will be seen that the calibra tion system enables low stability components to be used in the entire signal processing channel includ ing the A-D converter, while maintaining virtually zero gain drift with temperature, time etc. The calibration-excitation source signal is conveniently generated using three ultra high stability resistive dividers, each divider having the resistors deposited on a single substrate giving exceptional ratio stabil ity. The combination of a continuously integrating A-D converter and a weighted rur ning average digital filter allows elimination of analogue filtering and therefore the calibration measurements can be made very quickly and typically, about one second of load cell signal processing time is lost every five minutes.

Claims (9)

1. Digitising circuitryforproducing a digital representation of an analogue input signal produced by an electrical network which is energised by an excitation source and is reponsiveto a physical parame terwherebythe magnitude of said input signal varies in dependence upon the value of said parameter, said digitising circuitry comprising a signal processing channel to which the input signal can be applied and which includes an analogue-digital converter for digitising said input signal, means for deriving from said excitation source a calibration signal and periodically applying said calibration signal to said signal processing channel and means responsive to the calibration signal after digitisation by said signal processing channel for computing a scaling factor for combination with the digitised input signals whereby any drift in the operating conditions of the signal processing channel can be compensated for by modification of said scaling factor.

2. Digitising circuitry as claimed in Claim 1 in which the means for deriving the calibration signal from the excitation source comprises a high stability amplifier and a high stability voltage dividing network connected to the amplifier.

3. Digitising circuitry as claimed in Claim 2 in which the output from said amplifier is applied to the A-D converter as a reference signal.

4. Digitising circuitry as claimed in any one of Claims 1 to 3 in which said signal processing channel is preceded by switching means operable to couple said channel with said input signal orwith said calibration signal or with a signal corresponding to a "zero" reference level, the arrangement being such that, during a calibration cycle, the calibration and "zero" reference level signals are coupled to the signal processing channel to enable the computing means to determine the difference therebetween and the computing means thereafter computes the scaling factor such that the product of the scaling factor and said difference is equal to a predeter mined constant.

5. Digitising circuitry as claimed in Claim 4 in which coupling of the calibration signal to said channel is effected automatically either at regular intervals or at intervals dependant upon the mag nitude of the correction (if any) necessary to the scal- ing factor in a previous calibration cycle or cycles.

6. Digitising circuitry as claimed in Claim 4 in which coupling of the calibration signal to said channel is effected in response to an external com mand signal.

7. Digitising circuitry as claimed in any one of Claims 1 to 6 in which said excitation source is an AC excitation source.

8. Digitising circuitry as claimed in any one of Claims 1 to 7 in which said computing means is embodied within a microprocessor unit which is also programmed to act as a weighted, running average digital filter.

9. Digitising circuitry substantially as hereinbefore described with reference to, and as shown in, the accompanying drawing.