GB2077533A

GB2077533A - Demodulator

Info

Publication number: GB2077533A
Application number: GB8117589A
Authority: GB
Original assignee: PHASE TRACK Ltd
Current assignee: PHASE TRACK Ltd
Priority date: 1980-06-09
Filing date: 1981-06-09
Publication date: 1981-12-16
Also published as: GB2077533B

Abstract

An AM demodulator includes a phase-locked loop 6-14 for maintaining the tuning frequency, the loop including an integrating circuit 12 responsive to a phase error signal for controlling a voltage controlled oscillator 6. The output of the integrating circuit 12 has a component proportional to the error signal, and another component proportional to the integral of the error signal which, in the steady state, is zero. The demodulator thus stays tuned during temporary loss of a pilot carrier signal. The demodulator is particularly useful in short wave and medium wave receivers for reducing the effects of multi-path interference. <IMAGE>

Description

SPECIFICATION Demodulator This invention relates to demodulators, and particularly but not exclusively to AM demodulators in radio receivers.

Some receivers employ what is known as homodyne demodulation, in which a product detec tor or multiplier circuit demodulates an AM signal by multiplying it with a reference signal. Homodyne demodulation has a number of advantages over the more conventional envelope demodulation.

A serious problem encountered in radio reception is due to variations in the RF carriers of AM signals.

For example, as is known a receiver may receiver RF signals which have travelled by different paths and which may therefore be subjected to different delays, and this sometimes results in destructive intereference at the radio receiver, with the consequent impairment of reception.

It is desirable to provide a radio receiver utilizing homodyne demodulation, and providing relatively good reception irrespective of attenuation and/or phase or frequency shifting of the carrier of an incoming RF signal.

According to the invention a demodulator comprises a multiplying circuit having a first input for receiving an AM carrier signal and a second input for receiving a reference signal, thereby to provide a demodulated signal at its output, and a phase-locked loop having an output which determines the phase of one of the signals delivered to the multiplying circuit so as to maintain its relationship with the phase of the other signal, wherein the phase-locked loop includes an integrating circuit arranged to receive an error signal indicative of the difference between the phases of the signals delivered to the multiplying circuit, and having an output arranged to control a voltage controlled oscillator which determines the phase of the said one signal.

The phase-locked loop is what is known as a Type II loop; the "type" denotes the number of so-called perfect integrators in the loop. The integrating circuit forms one of these integrators, and the voltage controlled oscillator also performs an integrating function, as is known.

The integrating circuit of the demodulator of the present invention can be most easily achieved using a high-gain amplifying means provided with a feedback loop including a series-connected capacitance.

The integrating circuit provides an output at least a component of which is proportional to the integral of the value of the voltage at the input.

It should be noted that the passive filters found in Type I phase-locked loops have significantly different characteristics from the integrating circuit used in the demodulator of the present invention, and in fact these passive filters do not perform an integrating function at the frequencies of the signals which they handle.

The use of an integrating circuit to control the voltage controlled oscillator of the phase-locked loop has a number of advantages. In, for example, a radio receiver, when the receiver is locked onto an incoming carrier signal and has attained a steady state, the error signal delivered to the integrating circuit substantially disappears. Thereafter, the integrating circuit can continue to deliver whatever control voltage is required to the voltage controlled oscillator.

Because the integrating circuit is operable to provide the required control voltage even with a substantially zero-level input error signal, the receiver will stay correctly tuned even if the carrier briefly disappears.

The use of an integrating circuit in the phaselocked loop also has the advantage that the bandwidth of the loop may be much smallerthan is the case in conventional loops which do not incorporate an integrating circuit. This results in an increased carrier to noise ratio, and also reduces the possibility of the receiver locking onto a different, incorrect carrier signal.

Phase-locked loops conventionally employ a voltage controlled oscillator which produces a signal having a phase which is compared with a further signal, the result of the comparison being used to provide an error signal to control the voltage controlled oscillator. It is known that in such systems there is a finite phase difference between the compared signals, this being necessary to generate the required error voltage to shift the oscillator frequency from its free-running value to the correct frequency and thus keep the signals locked together. In homodyne demodulators this finite phase difference means that there is a slight error in the demodulation operation. This error can, however, be eliminated or at least reduced in a receiver of the invention in which an integrating circuit provides the control voltage for the voltage controlled oscillator.

The integrating circuit in a preferred embodiment provides an output which comprises not only a component which is an integral of the input value, but also a further component which is proportional to the input value.

The time constant of integration should for suitable operation be greater than 10-3 seconds, and a preferred range is about.01 to 1 second. The corresponding 3dB loop bandwidth should be less than 50Hz.

In one embodiment, the phase-locked loop controls the frequency of the reference signal in response to changes in the carrier of the AM signal (which could either be an RF signal or an IF signal). In another embodiment, the phase-locked loop has an output which is used as a local oscillator frequency, and which is delivered to one input of a mixer which has another input connected to receive the incoming RF signal, the output of the mixer providing an AM intermediate frequency signal. A multiplying circuit receives a locally-generated reference signal and the IF signal, and the phase-locked loop prevents the phase of the IF signal from shifting with respect to that of the reference signal.

The drawings originally filed were informal and the print here reproduced is taken from a later filed formal copy.

Arrangements embodying the invention will now be described by way of example with reference to the accompanying drawings, in which: FIGURE 1 is a circuit diagram showing a demod ulating stage in one embodiment of a receiver in accordance with the invention; FIGURE 2 is a circuit diagram of a tuning and demodulating stage of a receiver according to a second embodiment of the invention, and FIGURE 3 illustrates a mute circuit in another embodiment of the invention.

Referring to Figure 1, an incoming signal on input lead 2 is delivered to one input of a multiplier 4. The multiplier 4 also receives, via a 90 phase-shift circuit 5, a reference signal produced by the voltage controlled oscillator6 of a phase-locked loop 8. The loop 8 includes a multiplier 10 receiving the incoming signal as well as an output from the voltage controlled oscillator 6 to produce an error signal used in controlling the voltage controlled oscillator so as to lock the phases of the incoming signal and the reference signal delivered to the multiplier 4. Such a system is known in the art.

The incoming signal on the input lead 2 is an AM signal which may for example be at an intermediate frequency.

The error signal from the multiplier 10 is delivered to an integrating circuit 12, the output of which is used to control the voltage controlled oscillator 6.

The integrating circuit 12 comprises a high input impedance, high gain amplifier 14 having a resistance R, connected in series with its input, and a feedback loop comprising a series connected capacitance C and resistance R2.

The output of the integrated circuit 12 will comprise a component which is proportional to the error signal from the multiplier 10 (the constant of proportionality being determined by the values of the resistances R, and R2), and another component which is the integral ofthevalue of the error signal (the time constant of integration being determined by the values of the capacitance C and the resistance R1). After the receiver has locked onto a signal, the latter com ponentgradually increases, and at the same time the error signal from the multiplier 10, and the proportional component in the output of the amplifier 12, decrease. A steady state is reached wherein the amplitude of the error signal from the multiplier 10 is substantially zero.

As a result of this, the voltage controlled oscillator 6 will continue to produce a reference signal of the correct frequency and phase even if the carrier signal on input line 2 briefly disappears.

The embodiment of Figure 1 can be modified in a number of ways. Furthermore, the invention can be applied to receivers which achieve demodulation in other ways. For example, one known technique involves the use of multiple homodyne demodulators (usually two) in order to achieve the phase cancellation of one or the other of the sidebands of the incoming signal. For example, this could be achieved by a modification of the embodiment of Figure 1, in which the incoming signal on input lead 2 is delivered to a further multiplier which receives a reference signal directly from the voltage controlled oscillator 6. The output of the further multiplier is phase-shifted by 900, and then combined with the output from the multiplier 4. The two signals could be added, or one subtracted from the other, to obtain a demodulated upper or lower sideband.

In another embodiment shown in Figure 2, an aerial 20 is coupled to a band-pass RF filter 22, the output of which is connected to a mixer 24. Here the RF signal is mixed with a local oscillation signal on line 26 to produce an intermediate frequency signal which is delivered to an IF amplifier 28. The IF signal is demodulated by multiplying it, in circut30, with a reference signal. The demodulated signal is then delivered to a low pass audio frequency filter 32, from which a signal is delivered to amplifying circuitry of the receiver.

The reference signal applied to the multiplier 30 via a 90 phase-shift circuit 33 is generated by a reference frequency oscillator 34.

The phase relationship between the IF signal delivered to the multiplying circuit 30 and the reference signal is maintained constant using a phase-locked loop 36 incorporating a voltage controlled oscillator 38 which is used to generate the local oscillation frequency on line 26. The phase-locked loop 36 incorporates a multiplier 40 which generates an error signal dependent upon the difference in phase between the IF signal from amplifier 28 and the refer- ence frequency signal. The error signal is delivered to an integrating circuit 42, the output of which controls the voltage controlled oscillator 38. Thus, changes in the phase relationship between the IF signal and the reference signal applied to the multiplying circuit 30, caused by changes in the incoming carrier signal, produce changes in the output of the multiplying circuit 40.The effect of this is a change in the signal applied by the integrator 42 to the voltage controlled oscillator, and thus a change in the local oscillation signal on line 26, to produce a compensatory change in the phase of the intermediate frequency signal.

Thus, the signals applied to the multiplying circuit 30 are maintained in the correct phase relationship, and this is true even if the incoming carrier signal disappears because of the use of the integrating circuit 42.

The circuit 42 is identical to the circuit 12 of Figure 1, except that there is a switch 44 connected in parallel with the capacitance C. The switch 44, which may be mechanical or electronic, is normally open, but is closed, either manually or automatically, during tun: ing of the receiver to permit proper locking-on to the incoming signal.

In the embodiment shown, thevoltage controlled oscillator 38 may also be used for the main tuning control of the receiver. Tuning is achieved by mechanically or electrically varying the free-running frequency of the voltage controlled oscillator 38.

The invention may also be applied to receivers incorporating frequency synthesizers for generating the local oscillation frequency. In this case, the switch 44 is preferably momentarily closed during frequency setting. In such an embodiment, it is also desirable to mute the audio output during the period in which the receiver is locking onto a desired signal.

A preferred way of doing this is illustrated in Figure 3.

The demodulated output of a demodulation multiplying circuit 50 has a d.c. level indicative of the carrier level, and therefore this can be used to indicate that the receiver has locked onto a signal. This level should therefore be used to switch on and off a mute circuit 52, which when switched on mutes the demodulated output. However, this may have the disadvantage that fading of a carrier signal will cause operation of the mute circuit and therefore interfere with operation. In the arrangement of Figure 3, the output of the demodulation multiplying circuit 50 is delivered via a low pass filter 54 to the reset input of a flip flop 56. The set input of the flip flop is connected to receive a signal when the receiver is switched on, or when the frequency setting of the receiver is altered. The output of the flip flop is used to control the mute circuit 52.Thus, if the receiver is switched on or the frequency setting is changed, the mute circuit is switched on to mute the demodulated output until the receiver locks onto a signal. This causes the flip flop to turn off the mute circuit, and the mute circuit will stay in this condition until the frequency setting is changed.

It is noted that the operation of the muting arrangement described above does not depend upon the details of the rest of the circuitry, and the muting facility is considered to be an independent invention.

The muting arrangement may be used in either of the demodulators described above, irrespective of whether a frequency synthesizer is used.

In the demodulator of Figure 2, there may be provided switching means for switching-in different values of the resistances Rt and R2 during tuning of the demodulator in order to speed up signal acquisition. When the demodulator has locked onto the signal the values of R1 and R2 would be switched back. Since the charge on the capacitor will not be disturbed by the switching of different values of R, and R2there will be no discontinuity in the phase locking.

If the mute arrangement of Figure 3 is used, the switching-in of the different resistances can occur at the same time as the mute is in operation, and hence the flip-flop 56 can be used to control the switching means.

If desired, the demodulators described above can be provided with indicators responsive to the outputs of the integrating circuits to enable a user to determine when the control voltage applied to the voltage controlled oscillator is near a maximum or minimum. This will indicate to the user when retuning is required.

The invention is applicable to the reception of a variety of different types of signals, including double-sideband amplitude modulated, independent sideband, single sideband and vestigial sideband signals with arbitrary carrier levels.

The invention is applicable not only in conventional radio reception, but also in, for example, television reception, point-to-point communications systems, satellite tracking reception, and mobile radio systems. The invention is of particular advantage where there is a large risk of a carrier signal disappearing momentarily, as in point-to-point communications and mobile radio systems, and AM broadcasting. It is felt that the invention may be of most use in short wave receivers and medium wave receivers which are particularly subject to multi-path destructive interference. The use of the invention in short wave receivers for receiving single sideband broadcasts would produce a very significant improvement in reception quality.

Claims

1. An AM demodulator comprising a multiplying circuit having a first input for receiving an AM carrier signal and a second input for receiving a reference signal, thereby to provide a demodulated signal at its output, and a phase-locked loop having an output which determines the phase of one of the signals delivered to the multiplying circuit so as to maintain its relationship with the phase of the other signal, wherein the phase-locked loop includes an integrating circuit arranged to receive an error signal indicative of the difference between the phases of the signals delivered to the multiplying circuit, and having an output arranged to control a voltage controlled oscillator which determines the phase of the said one signal.

2. A demodulator as claimed in claim 1, wherein the integrating circuit comprises a high-gain amplifying means having a feedback loop including a series capacitance.

3. A demodulator as claimed in claim 1 or claim 2, wherein the integrating circuit is operable to produce an output voltage having a component which is proportional to the voltage at its input and a further component which is proportional to the integral of the voltage at the input.

4. A demodulator as claimed in any preceding claim, wherein the voltage controlled oscillator is operable to determine the phase of the reference signal.

5. A demodulator as claimed in any one of claims 1 to 3, wherein the AM carrier signal is an intermediate frequency signal, and the voltage controlled oscillator is operable to determine the phase of the intermediate frequency signal.

6. A demodulator as claimed in any preceding claim, having means for altering the transmission characteristics of the integrating circuit during tuning of the demodulator.

7. A demodulator as claimed in claim 6 when directly or indirectly appendentto claim 2, including a frequency synthesizer for generating a local oscillation frequency, wherein said altering means comprises means for momentarily shorting said series capacitance.

8. A demodulator as claimed in claim 6 when directly or indirectly appendentto claim 2, wherein said altering means comprises means for shorting said series capacitance throughout the tuning of the demodulator.

9. A demodulator as claimed in any preceding claim, wherein said integrating circuit has a time constant of integration which is greater than 10-3 seconds.

10. A demodulator as claimed in claim 9, wherein said time constant is from .01 seconds to 1 second.

11. A demodulator as claimed in any preceding claim, wherein the 3dB bandwidth of the phaselocked loop is less than 50 Hz.

12. A radio receiver having an AM demodulator as claimed in any one of the preceding claims.

13. A radio receiver as claimed in claim 12, operable to receive and demodulate medium wave broadcasts.

14. A receiver as claimed in claim 12 or 13, operable to receive and demodulate short wave broadcasts.

15. A receiver as claimed in any one of claims 12 to 14, operable to receive and demodulate single sideband signals with pilot carriers.

16. A receiver as claimed in any one of claims 12 to 15 operable to receive and demodulate double sideband signals with pilot carriers.

17. A receiver as claimed in any one of claims 12 to 16, operable to use the phasing method of sideband selection.

18. A receiver as claimed in any one of claims 12 to 17, having a mute circuit for muting an audio output of the demodulator, and control means for rendering the mute circuit inoperable in response to reception of a broadcast signal.

19. A receiver as claimed in claim 18, having switching means operable to effect a change in the transmission characteristics of said integrating circuit, said control means being operable to control said switching means.

20. An AM demodulator substantially as herein described with reference to Figure 1 or Figure 2, optionally modified as described with reference to Figure 3, of the accompanying drawings.