GB2075693A

GB2075693A - Spectrum analyzer

Info

Publication number: GB2075693A
Application number: GB8107016A
Authority: GB
Original assignee: Deutsche ITT Industries GmbH; ITT Industries Inc
Current assignee: TDK Micronas GmbH; ITT Inc
Priority date: 1980-03-14
Filing date: 1981-03-05
Publication date: 1981-11-18
Also published as: GB2075693B; IT1136820B; JPS56145365A; DE3009785A1; FR2478355B1; IT8120349A0; FR2478355A1

Abstract

A spectrum analyzer, e.g., for telecommunication application, includes an input A to D converter (AD) for converting an input analog signal to corresponding binary words, these words then being fed via a buffer (PS) and a multiplexer (MX) to a digital filter (DF). Under the action of a control circuit (CS) the filter (DF) is fed with a series of different submultiples of a clock signal. For each submultiples the filter (DF) is also fed into a corresponding set of filter constants from a memory (PF). Spectrum analysis is made by changing the frequency of the clock submultiple signal to the filter and simultaneously supplying the corresponding filter constants from the memory while ensuring that the centre frequency of the filter passband remains constant. <IMAGE>

Description

SPECIFICATION Spectrum analyzer This invention relates to a spectrum analyzer for a signal frequency band which consists of a plurality of subbands. A spectrum analyzer of this kind is described in DE-OS 28 20 645 and converts the amplified input signal by means of an analog-to-digital converter into binary signals appearing in parallel at the converter's output. The numerical values of the centre frequencies fmn = 0 5(fun + fn- 1) of the subbands are contained in, -and can be called up from, a programmable read-onlymemory.

The analog-to-digital converter is fed with a sampling signal of contant frequency fA from a clock generator, and it is followed by a buffer into which the binary words provided by the converter can be transferred serially, and which is followed by a multiplexer. The number a of storage areas of the buffer is chosen so that a > fA/fO. The clock generator contains adjustable frequency dividers.

The binary words contained in the buffer are subsequently processed in a "spin facility" by being repeatedly divided into so-called time slices using a recirculating shift register operated at different clock rates. The output signal of this shift register is converted back to an analog signal by a digital-to-analog converter, and this analog signal is filtered by a band-pass filter. For voice recognition, the output signal of the band-pass filter is then processed in a special manner, which, however, is of no interest within the scope of the invention.

The spectrum analyzer described in the.

above-mentioned DE-OS contains at least one subcircuit which is unsuitable for implementa tion with monolithic integrated circuit technology, namely the aforementioned band-pass filter, which, according to the DE-OS, may be a six-pole Chebyshev filter, for example. As a band-pass filter for analog signals, it thus consists essentially of inductances and capacitances, which are not integrable, as is generally known.

Accordint to the invention there is provided a spectrum analyzer for a signal frequency band consisting of a plurality of subbands, the spectrum analyzer including an analog to digital converter whereby an input waveform is converted to corresponding binary words, a buffer circuit in which the binary words are input in parallel, a digital filter to which the binary words are fed via a multiplexer, a control circuit, a memory accessed via the control circuit, and a clock for synchronising the operation of the converter, buffer, multiplexer and filter, wherein the digital filter and multiplexer are fed from the clock with a clock signal whose frequency is a submultiple of the clock frequency and is adjustable in a stepwise manner via the control circuit, wherein, for each clock frequency submultiple a set of filter constants is supplied from the memory to the filter and that the centre frequency of the filter pass band is constant for all clock frequency submultiple inputs.

The band-pass filter can be realised without inductances and capacitances when implementing the overall arrangement using monolithic integrated circuit techniques. The bandpass filter is realised as a digital filter. In that case, the recirculating shift register, the digital-to-analog converter, and the portion of the control circuit necessary with prior art arrangement for these two units can be dispensed with.

The spectrum analyzer may be used e.g. in voice frequency signalling applications between a telephone subset and an exchange.

The present invention applies the principle of the use of digital filters in such a way that only a single digital filter is required whose constant centre frequency is chosen, and whose constants change with its clock frequencies in such a way that the centre frequency remains constant.

The invention will now be explained in more detail with reference to the accompanying drawing. The single figure of the drawing is a block diagram of a spectrum analyzer incorporating a digital filter.

The analog signal to be analyzed is applied to the analog-to-digital converter AD through the input E; in addition, the analog-to-digital converter AD is fed with a sampling signal of constant frequency fA from the multiple-clock generator TG. Because of the sampling theorem, this constant frequency fA must be at least twice as high as the highest frequency contained in the analog signal.

The output signal of the analog-to-digital converter AD appearing in the form of parallel binary words, is applied to the parallel inputs of the buffer PS, which is also clocked by the sampling signal of constant frequency fA. The number a of storage areas of the buffer PS for the binary words provided by the analog-todigital converter AD is chosen so that a > fA/fO, where f0 is the lower cutoff frequency of the signal frequency band to be analyzed, fk - fo.

The buffer PS is followed by the multiplexer MX, whose output signal is applied to the signal input of the digital filter DF. The programmable read-only memory PF holds the numerical values representing the centre frequencies fmn = 0.5 (fn + fn-1). These numerical values are obtained from the signal frequency band to be analyzed fk - fo, and the number k of subbands according to the recursion formula = = (fk/fo)l/kfnl, where n = 1, 2, 3 ... k.

The numerical values of the centre frequencies can be entered into the programmable readonly memory PF through its write input SE in the known manner.

The width of the passband of the digital filter DF must be chosen to be proportional to the bandwidth k - fk-1 of the highest subband. The centre frequency fM of the digital filter DF is chosen so that

The multiple-clock generator TG supplies the digital filter DF with a clock signal whose frequency fT is adjustable in steps by the control circuit CS, e.g., by suitable adjustment of the adjustable frequency dividers of multiple-clock generator TG, according to the relationship fT = fAfmn/fM. This clock signal with the frequency fT adjustable in steps is also applied to the multiplexer MX.

At the individual clock frequencies fT, the constants of the digital filter DF are so adjusted or changed by means of the control circuit CS and the programmable read-only memory PF that the centre frequency fM of the filter's passband remains constant. The control circuit CS thus acts both on the programmable read-only memory PF and on the multiple-clock generator TG, which is also fed with signals from the programmable read-only memory PF.

The spectrum analysis is thus made by changing frequency of the clock signal of the digital filter DF in steps, simultaneously switching the filter constants while maintaining the centre frequency of the passband. By means of the digital filter DF controlled as described herein, the spectrum analyzer thus performs a signal processing operation comparable to the "time slicing" disclosed in the above-mentioned DE-OS 28 20 645 but is much simpler in construction and, in particular, suitable for being implemented using integrated-circuit techniques. Realization by suitably programming a microcomputer is also possible.

Claims

1. A spectrum analyzer for a signal frequency band consisting of a plurality of subbands, the spectrum analyzer including an analog to digital converter whereby an input waveform is converted to corresponding binary words, a buffer circuit in which the binary words are input in parallel, a digital filter to which the binary words are fed via a multiplexer, a control circuit, a memory accessed via the control circuit, and a clock for synchronizing the operation of the converter, buffer, multiplexer and filter, wherein the digital filter and multiplexer are fed from the clock with a clock signal whose frequency is a submultiple of the clock frequency and is adjustable in a stepwise manner via the control circuit, wherein, for each clock frequency submultiple a set of filter constants is supplied from the memory to the filter passband is constant for all clock frequency submultiple inputs.

2. A spectrum analyzer for a signal frequency band fk - fo, which consists of k subbands whose cutoff frequencies are given by the relation = (fk/fo)l/kl, n = 1, 2, 3...

and whose numerical values, representing centre frequencies fmn = 0.5 (fn + fn1) are contained in a programmable read-only memory and can be called up via a control circuit, with a band-pass filter and with an analog-to- digital converter at the input end which is supplied with a sampling signal of constant frequency a from a clock generator and is followed by a buffer into which the binary words provided by the analog-to-digital converter can be transferred serially and which is followed by a multiplexer, the number a of storage areas of the buffer for the binary words being chosen so that a > fA/fO, and the clock generator containing adjustable frequency dividers, wherein the output of the multiplexer is connected to the input as a digital filter; wherein the width of the passband of the digital filter is proportional to the bandwidth of the highest subband; wherein the centre frequency (fm) of the digital filter is chosen so that

wherein the frequency (fT) of the clock signal of the digital filter is adjustable in steps by means of the control circuit according to the relationship tor = fAfmn/fM;; wherein at the individual clock frequencies, the constants of the digital filter are adjusted by means of the control circuit and the programmable readonly memory in such a way that the centre frequency of the passband of the digital filter remains constant, and wherein the control circuit controls a multiple-clock generator which generates, in addition to the sampling signal for the analog-to-digital converter, which signal is also the write and shift clock for the buffer, the clock signal for the digital filter, which signal is also the multiplexer clock, by means of frequency dividers adjustable via the programmable read-only memory.

3. A spectrum analyzer substantially as described herein with reference to the accompanyong drawings.

4. A telecommunication exchange provided with one or more spectrum analyzers as claimed in claim 1, 2 or 3.

5. A method of spectrum analyzer sub stantially as described herein with reference to the accompanying drawings.