GB2072912A - Optical character reading system - Google Patents

Abstract

An optical character reading system in which printed characters are scanned with a two-dimensional photoelectric sensor, the output signals from which are processed through right and left frame detecting circuits (13-24). The right and left frame detecting circuits detect the left and right edges of the character and if the character is broader than the sensor, respective frames of the character as determined by the detected edges are stored in memories 23, 24. A circuit combines the white/black patterns stored in memories 23, 24 and recognises the character being scanned. <IMAGE>

Description

SPECIFICATION Optical character reading system This invention relates to an optical character reading system for reading characters, symbols, etc. which may be larger than the range of a sensor.

A conventional optical character reading device is as shown in FIG. 1. In the conventional device, the image of a character, a symbol, etc.

(hereinafter referred to merely as "a character") 6 on a sheet 5 is formed on an image sensor 2 comprising photoelectric conversion elements through an optical system 1. Analog signal outputted by the sensor is converted into a binary signal in correspondence to the white background of the sheet and the black character by a binary coding circuit 2, whereby the character is recognized by a recognition circuit 4. In this case, the image sensor 2 is electrically run (scanning) in a vertical direction. If the image sensor 2 is a twodimensional sensor, the sensor is electrically run in horizontal directions 8, while the optical system or the sheet is mechanically moved, whereby the characters are read. If the image sensor 2 is a onedimensional sensor, then the optical system or the sheet is mechanically moved, whereby the characters are read.The sheet 5 is irradiated by a light source (not shown).

As is clear from the above description, in the case of optically reading a character, in order to cover the character two-dimensionally with the one-dimensional sensor, it is necessary to move the image sensor 2 in the directions 8 at a constant speed relative to the sheet 5. In the case where the movement speed of the image sensor 2 relative to the sheet 5 is unknown, it is required to store white/black patterns over the entire character region. Accordingly, the storage capacity must be increased, which results in an increase in the manufacturing cost of the device.

In the case where, even with a two-dimensional sensor, its movement speed relative to the sheet is changed, the sensor is applied to the case only where the entire character to be read is set in the range of the sensor as shown in the part (a) of FIG.

2. Accordingly, if it is required to read a character 6 which is larger than the horizontal width of the range of the sensor as shown in part (b) of FIG. 2, then it is necessary to move the sensor at a constant speed with respect to the sheet similarly as in the case of the one-dimensional sensor, or to store white/black patterns over the entire character regions. In the latter case, it is necessary to increase the storage capacity more than that in the use of the one-dimensional sensor.

A technical concept of processing with a two dimensional sensor of large bit arrangement a character large in width is disadvantageous in the following points: (i) A two-dimensional sensor large in size is expensive, and (ii) the time required for the recognition process is increased.

Because of these disadvantages, heretofore it is difficult and uneconomical to read a character larger than the range of the sensor.

An object of the present invention is to make it simple to read and recognize a character which is larger than the range of the sensor.

This invention will be described with reference to its preferred embodiments.

In the accompanying drawings:- Figure 1 is an explanatory diagram showing a conventional optical character reading device. The parts (a) and (b) of Figure 2 are explanatory diagrams for a description of the relation between the range of a sensor and a character. The parts (a) through (c) of Figure 3 are diagrams for a description of the principle of an optical character reading system according to this invention. Figure 4 is a block diagram of a right and left frame detecting circuit according to one embodiment of the invention. Figure 5 is a block diagram of a column black cell detecting circuit. Figure 6 is a time chart indicating various signals applied to the column black cell detecting circuit.The parts (a) through (d) of Figure 7 are explanatory diagrams for a description of the relation between a white/black pattern and the distribution of black cells. Figure 8 is a diagram for a description of the principle of a recognition process system in which right and left frame characteristics are extracted.

Figure 9 is a block diagram showing a recognition process section according to the recognition process system described with reference to Figure 8. Figure 10 is a condition transition diagram of column characteristics in the recognition process section in Figure 9. Figure 11 is a condition transition diagram of frame characteristics in the recognition process section in Figure 9. Figure 1 2 is a diagram for a description of the character recognition which is carried out by combining frame characteristics. Figure 1 3 is a block diagram showing another embodiment of the invention, to which a recognition process system is applied in which the character recognition is carried out by extracting the frame characteristic of a combined frame.Figures 14 and 1 5 are explanatory diagrams showing different characters which are recognized by combining right and left frames.

The part (a) of FIG. 3 is a diagram for a description of the principle of this invention. A white/black pattern obtained when the left end of a character 6 to be read reaches the left end of the range 11 of a sensor, and a white/black pattern obtained when the right end of the character 6 reaches the right end of the range 12 of the sensor are taken out, so that the character is recognized by using the two picture white/black patterns.

Therefore, even if the horizontal width of the character 6 to be read is larger than the range 11 or 1 2 of the sensor, the character can be read satisfactorily, and the left picture shown in the part (b) of FIG. 3 and the right picture shown in the part (c) of FIG. 3 can be obtained irrespective of the horizontal movement speed.

Shown in FIG. 4 is a block diagram of a right and left picture detecting circuit in an optical character reading system according to one embodiment of the invention. In FIG. 4, reference numeral 3 designates a binary coding circuit adapted to binary-code analog signals which are read by a a two-dimensional sensor comprising photo-electric conversion elements arranged in two-dimensional manner. In the cells of the photoelectric conversion elements arranged twodimensionally, a cell which has detected black will be referred to "a black cell". Then, the output of the binary coding circuit 3 is applied to a column black cell detecting circuit 13 operating to detect the presence of black cells in each column (in a vertical direction) and to a temporary storing buffer memory 14 operating to temporarily store white/black patterns.The column black cell detecting circuit 13 outputs a left end black cell detection signal 1 5 representative of the detection of black cells in the leftmost column, a left side character element detection signal 1 6 representative of the fact that black cells are continuously present in several lines on the left side except for the leftmost column, a right side character element detection signal 1 7 when black cells are continuously present in several lines on the right side except for the rightmost column, and a right end black cell detection signal 1 8 representative of the detection of black cells in the rightmost column. The term "several lines" is the number of lines corresponding to the minimum horizontal width of a character to be read.

The column black cell detecting circuit 1 3 is shown in FIG. 5 in more detail. The arrangement of the circuit 13 will be described with reference to the case where binary-coded signals are inputted in a parallel mode for every line.

In this case, in addition to binary-coded signals BW1 through BWn corresponding to the vertical columns, a line clock pulse CK1 synchronous with a binary signal for every horizontal line line (1 through m), a frame clock pulse CK2 synchronous with the process of one frame, a clear signal CL1 whose timing is slightly later than that of the frame clock pulse CK2 are applied to the column black cell detecting circuit 1 3. For the detection of black cells, a one-bit register 100 and an OR circuit 101 are provided in combination for every column, the data in the register 100 is renewed by the line clock pulse CK1. In FIG. 5, reference numeral 102 designates output registers, and reference numeral 103 designates AND circuits.

FIG. 6 is a time chart for various signals in FIG.

5. In FIGS. 5 and 6, like reference characters designate like signal.

With respect to the binary-coded signal BW1 through BWn, when the first line data are applied to the OR circuits 101, the first line data are set in the registers 100 with the aid of the line clock pulse CK1.Thereafter, up to the m-th line, the data are set in the registers 100 after being subjected to iogical sum with the data in the registers 100 in the OR circuits, whenever the line clock pulse CK1 is applied thereto. Therefore, when a black cell is present in a column, the content of the respective register 100 is raised to "1".For the rightmost and leftmost columns, the contents of the registers 100 are directly set in the corresponding output registers 102, and therefore the left end black cell detection signal 1 5 and the right end black cell detection signal 1 8 are set in the respective output registers 102. The contents of the registers 100 for several lines on both sides except for both ends are applied to the respective AND circuits 103, and the outputs of the AND circuits 103 are set in the respective output registers 102 with the air of the frame clock pulse CK2, as a result of which the left side character element detection signal 1 6 and the right side character element detection signal 1 7 are set in the respective output registers 102.After the frame data have been set in the output registers 102 with the aid of the frame clock pulses CK2, the registers 100 are cleared by the clear signal CL1.

The binary signals of white/black patterns stored in the temporary storing buffer memory 14 as described above are written in a left frame buffer memory 23 while a left frame detection signal 21 is at "1", and the binary signals are written in a right frame buffer memory 24 while a right frame detection signal 22 is at "1 ". Thus, the left frame with the left end as a reference and the right frame with the right end as a reference are stored in the buffer memories 23 and 24, respectively.The left frame detection signal 21 is the output of an AND circuit 1 9 which receives the left end black cell detection signal 1 5 through an inverter 1 5a and the left side character element detection signal 1 6. The right frame detection signal 22 is the output of an AND circuit 20 which receives the right end black cell detection signal 18 through an inverter 1 8a and the right side character element detection signal 1 7.

The relation between the white/black pattern on the sensor and the distribution of black cells in the vertical columns is changed by moving the sensor in a horizontal direction, for instance as indicated in the parts (a) through (d) of FIG. 7 in the stated order.

In the parts (a) through (d) of FIG. 7, reference characters xl through x4 show white/black patterns due to the relation between the range 10 of the sensor and the character 6, and y1 through y4 show the distribution of black cells due to the relation between the part 25 where no black cells are present in the vertical columns and the part 26 where black cells are present.

The white/black pattem xl in the part (a) of FIG.

7 is for the case where the left end black cell detection signal (LBF) 1 5 is at "0" and the left side character element detection signal (LCF) 1 6 is at "1". If the scanning speed is low, then the frame having the same positional relationship can be repeatedly obtained. Therefore, in order that, with respect to a character, only the frame which satisfies the conditions that the LBF is at "0" and the LCF is at "1" as described above is obtained as the left frame, the following process is carried out: In the case where the above conditions are satisfied. a left frame'flag (LF) is assumed as "1", and in the other case, it is assumed as "O". It is assumed that the left frame flag immediately before the left frame flag being processed now is represented by BLF.Then, only when BLF LF = 1 (where BLF is the complement of BLF) the white/black pattern at that instant can be obtained as a left frame.

The white/black pattern shown in the part (c) of FIG. 7 is for the case where the right side character element detection signal (RCF) 1 7 is at "1" and the right end black cell detection signal (RBF) is at "O". When the conditions are satisfied, a right frame flag (RF) is assumed as "1", and in the other case, it is assumed as "O". It is assumed that the right frame flag immediately before the right frame flag being processed is represented by BRF. Then, only when BRF RF = 1 (where BRF is the complement of BRF), the white-black pattern is obtained as a right frame.

In a manner as described above, the data of the white/black pattern xl in the part (a) of FIG. 7 are stored in the buffer memory 23, and the data of the white black pattern x3 in the part (c) of FIG. 7 are stored in the buffer memory 23.

In the present invention, recognition process is carried out by utilizing the white/black pattern data stored in the left frame buffer memory 23 and the right frame buffer memory 24. For this purpose, employed is a recognition process system in which characteristics are extracted from the right and left frames and the characteristics thus extracted are combined to recognize a character, or a system in which the white/black pattern data of the right and left frames are combined and a composed frame obtained by the data combination is utilized to recognize a character.

FIG. 8 is a diagram for a description of the principle of the recognition process system in which the characteristics of the right and left frames are extracted to recognize a character. A left frame 30 and a right frame 31 are provided by the right and left frame detecting circuit FIG. 4.

The black cells in the horizontal lines of the white/black pattern data of the right and left frames 31 and 30 are subjected to logical sum, so that the area in which the number of lines having black cells is more than a predetermined value is assumed as a vertical character area 33, and the other areas are assumed as empty area 32 and 33. By utilizing the white/black pattern data in the vertical character area 33 of the left or right frame, the characteristics of the left or right frame are extracted.

It is assumed that, for instance, a frame is of a white/black pattern of n x m bit arrangement; n bits in the horizontal direction and m bits in the vertical direction, and the vertical character area 33 is from 11 to 12 in the vertical direction. In this case, first, column characteristic, as viewed in the vertical direction extracted from the white/black pattern of the two left end columns, and then the column characteristic of the white/black pattern of the next two columns obtained by shifting one column right is extracted. This operation is repeatedly carried out up to the right end column, until (n - 1) column characteristics are extracted.

FIG. 9 is a block diagram showing a recognition process section according to the recognition process system described with reference to FIG. 8.

The recognition process section comprises: a column characteristic extracting circuit 35 forming a sequence circuit with a latch circuit 36; a frame characteristic extracting section forming a sequence circuit with a latch circuit 38; and right and left frame composing section 41 having a left frame code memory 39 and a right frame code memory 40 on its input side.

A white/black pattern data 42 for two columns from the left frame buffer memory or the right frame buffer memory is applied, in a 2-bit parallel mode, to the column characteristic extracting section 35 m times corresponding to the number of bits in the vertical direction. Thus, the section 35 is accessed by the data 42 and the content of the latch circuit 36, and the output of the section 35 is latched by the latch circuit 36. Accordingly, the content of the latch circuit 36 is changed successively as shown in FIG. 1 0 which is a condition transition diagram, and a condition corresponding to a 2-bit input in the final stage is applied, as a column characteristic code 43, to the frame characteristic extracting section 37. In FIG.

10, when the 2-bit parallel inputs are both "white" in the initial condition a, then the initial condition a is maintained as it is. If the 2-bit parallel inputs are both "black", then the condition a is shifted to a condition b. Thereafter, if the 2-bit parallel inputs are both "white", then the condition b is shifted to a condition c. Thereafter, if the 2-bit parallel inputs are both "black", then the condition c is shifted to a condition d. Thereafter, if the 2-bit parallel inputs are both "white", then the condition d is shifted to a condition e. Thereafter, if the 2-bit parallel inputs are both "black", then the condition e is shifted to a condition f, and if the 2-bit parallel inputs are of the final stage, then the condition f is inputted, as the column characteristic code 43, into the frame characteristic extracting section 37.

The left or right frame column characteristic code 43 from the latch circuit 36 of the column characteristic extracting section 35 is applied to the frame characteristic extracting section 37 (n - 1) times. The section 37 is accessed by the column characteristic code 43 and the content of the latch circuit 38, and the output of the section 37 is latched by the latch circuit 38. Accordingly, the content of the latch circuit 38 is successively changed as indicated in FIG. 11 which is a condition transition diagram, and a condition corresponding to the final stage column characteristic code input is applied, as a frame characteristic code 44, to the left frame code memory 39 of the right frame code memory 40 with the aid of a signal 45 or 46.

Either in the case of extracting the left frame characteristics first, or in the case of extracting the right frame characteristics first, the timing from the instant that the application of the output of the left frame buffer memory or the right frame buffer memory to the column characteristic extracting section 35 is started until the frame characteristic is obtained by the frame characteristic extracting section 37 is known, and therefore the frame characteristic taking signals 45 and 46 can be applied to the left frame code memory 39 and the right frame code memory 40, respectively, in synchronization with the timing with which the frame characteristic can be obtained.That is, a clock pulse synchronous with the shifting of the cells in the vertical direction is applied to the latch circuit 36 of the column characteristic extracting section 35, and a clear signal is applied thereto in synchronization with the shifting in the horizontal direction. A clock pulse is applied to the latch circuit of the frame characteristic extracting section 37 in synchronization with the horizontal shifting before the clear signal is applied to the column characteristic extracting section 35, so that the latch circuit receives the output of the column characteristic extracting section 35 to conduct the necessary frame processing, and thereafter a clear signal is applied to the latch circuit. Thus, as described above, the signals 45 and 46 can be applied to the memories 39 and 40, respectively.

In FIG. 11, when an input a'-1 is available in the initial condition a', then the condition a' is shifted to a condition b'. Thereafter, if an input b'-1 is provided, than the condition b' is shifted to a condition c'. If inputs provided thereafter are only ones c'-1 which overlaps one another, then the condition c'is maintained as the final stage, and the condition c' is written, as the frame characteristic code 44, into the left frame code memory 39 or the right frame code memory 40. It should be noted that the frame characteristic is such that the configuration of a part of or the whole of a character to be read is coded, and therefore a plurality of codes are given to one character. The same code is given to parts of different characters as the case may be.Thus, the frame characteristic code 44 is extracted in the condition transition indicated by A, B and C in FIG. 11.

Accordingly, characters can be identified by combining the frame characteristic codes as shown in FIG. 2. For instance, if the right frame characteristic code R is B when the left frame characteristic code L is A, then the character can be identified as "5". if the code R is C, then the character can be recognized as "9". If the right frame characteristic code R is C when the left frame characteristic code L is B or C, then the character can be read as "3".

The right and left frame composing section 41 operates to combine the characteristics of the right and left frames, to carry out character recognition, as described with reference to FIG. 4.

The section 41 receives as a higher address a frame characteristic code 44 applied to the left frame code memory by accessing the code 44 with the aid of the signal 45, and receives as a lower address a frame characteristic code 44 applied to the right frame code memory by accessing the code 44 with the aid of the signal 46. In the section 41, these address data are combined, and its recognition result 47 is outputted.

In the above description, in order to extract the right and left frame characteristics, the column characteristics are extracted by using two lines in the vertical direction, and the frame characteristics are extracted by utilizing the column characteristics thus extracted; however, instead of two lines, three lines or more can be used.

Extraction of the line characteristics instead of the column characteristics may be carried out by using a plurality of lines in the horizontal direction in a circuit similar to that in the case of the column characteristics extraction, so that the frame characteristics are extracted by utilizing the line characteristics thus extracted.

The recognition process system in which, after the frame characteristics have been extracted from the right and left frame white/black patterns, the frame characteristics are combined to recognize the character, has been described.

However, a recognition process system different from the above-described one may be employed in which the combination of the right and left frame white/black patterns is first carried out to form one combination frame, and the frame characteristics of the combination frame are extracted to recognize the character. One example of the latter system will be described with reference to FIG. 1 3.

In FIG. 1 3, reference numeral 50 designates a left frame buffer memory; 51, a right frame buffer memory; 52 and 53, column number registers; 54, a difference degree calculating circuit for calculating a difference in bit arrangement in the vertical columns (hereinafter referred to as "a difference degree" when applicable); 55, a minimum value register in which a minimum value of difference degree is set; 56, a column number register for storing a column number giving a minimum value, and 57, a difference degree minimum value comparator circuit.

The rightmost end column number of the character pattern in the left frame which has been set in the left frame buffer memory 50 is set in the column number register 52. On the other hand, all of the column numbers in the right frame which have been set in the right frame buffer memory 51 are sequentially set in the column number register 53.

The bit pattern of the rightmost end column number in the character pattern is read out of the left frame buffer memory 50 according to the content of the column number register 52, while the bit pattern of each column number in the right frame is read according to the content of the column number register 53, and the bit patterns thus read are applied to the difference degree calculating circuit 54. When the first difference degree calculation is carried out by the calculating circuit 54, the difference degree is applied through the comparator circuit 57 to the minimum value register 55, where it is set.When the second (third, fourth, and so forth) difference degree calculation is carried out by the calculating circuit 54, the difference degree outputted by the calculating circuit 54 is compared with the difference degree which has been set in the minimum value register 55, in the comparator circuit 57. When the former difference degree is smaller than the latter difference degree, then the former difference degree instead of the latter one is set in the minimum value register 55, and the column number of the smaller difference degree is set in the register 56.

Thus, the difference degree calculation and comparison with respect to the bit pattern of the rightmost end column number of the right frame are carried out, as a result of which the column number of the right frame, which has the minimum difference degree from the bit pattern of the rightmost column number in the left frame, is set in the column number register 56.

In the case where character recognition is carried out by combining the contents of the buffer memories 50 and 51, the white/black patterns are successively read out of the left frame buffer memory 50 beginning with one of the column number 1 until the column number coincides with the content of the column number register 52.

After the white/black patterns of the left frame have read up to that of the column corresponding to the content of the column number register 52, for the white/black patterns of the right frame the white/black patterns of up to the column number n are successively read by referring to the content of the column number register 56.

In the case of a character in FIG. 14, the white/black data of from the left end column to the column 70 are read in the left frame (a).

Thereafter, in the right frame (b), the white/black data of from the column 71 which is the minimum in the difference degree from the bit pattern of the aforementioned column 70 up to the rightmost column are read out, to recognize the character.

In the case of a character in Fig.15, the character can be within each of the right and left frame (b) and (a). Therefore, the character can be recognized by piling the column 72 on the column 73. In practice, the pattern is equal to that of the white/black data of the left frame only.

As is apparent from the above description, in the present invention, the white/black patterns of the frames formed on the sensor when the left end of a character or symbol which is larger than the range of the sensor reaches the left end of the range of the sensor and when the right end of the character or symbol reaches the right end of the range of the sensor, are detected, and the white/black patterns thus detected are combined to recognize the character or symbol. Thus, a character or symbol larger than the range of the sensor can be positively read.

Furthermore, the optical character reading system according to the invention has a merit that, as the sensor employed in the invention is a twodimensional sensor, the phase difference of a character or symbol can be detected with high accuracy.

Claims (5)

CLAIMS 1. An optical character reading system in which a sheet on which characters, symbols, etc. are described is irradiated, the characters, symbols, etc. are scanned with a sensor comprising photoelectric conversion elements arranged twodimensionally, and output signals of said sensor are processed to read the characters, symbols, etc., characterised in that a right and left frame detecting circuit for detecting outputs of said sensor is provided, said right and left frame detecting circuit having buffer memories provided respectively for right and left frames, white/black patterns of frames formed on said sensor when the left end of a character, a symbol or the like which is larger than the range of said sensor has reached the left end of the range of said sensor and when the right end of said character, symbol or the like has reached the right end of the range of said sensor are detected by said right and left frame detecting circuit, and said white/black patterns detected by said right and left frame detecting circuit is subjected to combination process to recognize said character, symbol or the like which is larger than the range of said sensor. New claims or amendments to claims filed on 15/5/81. Superseded claims 1. New or amended claims:

1. An optical character reading system in which a sheet on which characters are described is illuminated, the characters scanned with a sensor comprising photoelectric conversion elements arranged two-dimensionally, and output signals from said sensor are processed to read the characters comprising: right and left frame detecting circuits for detecting outputs of said sensor, said right and left frame detecting circuits comprising buffer memories provided respectively for right and left frames, white/black patterns of frames formed on said sensor when the left side of a character which is larger than the range of said sensor has reached the left end of the range of said sensor and when the right side of said character has reached the right end of the range of said sensor being detected by said right and left frame detecting circuits, and means for combining said white/black patterns detected by said right and left frame detecting circuits to recognize said character.

2. An optical character reading system in which a sheet of characters on which characters are described is illuminated, the characters scanned with a sensor comprising photoelectric conversion elements arranged two-dimensionally and output signals from the sensor are processed to read and recognize the characters comprising: a binary coding circuit receiving inputs from said sensor; a temporary storage buffer memory receiving outputs from said binary coding circuit; a column black cell detecting circuit receiving inputs from said binary coding circuit; a left frame buffer memory receiving inputs from said temporary storage buffer memory and said column black cell detecting circuit; a right frame buffer memory receiving inputs from said temporary storage buffer memory and said column black cell detecting circuit; a column characteristic extracting circuit receiving data in serial-parallel fashion from one of said left and right frame memories; a latch having inputs coupled to receive outputs from said column characteristic extracting circuit and outputs of said latch being coupled to second inputs of said column characteristic extracting circuit; a frame characteristic extracting circuit having inputs coupled to receive said outputs from said first latch; a second latch having inputs coupled to receive outputs from said frame characteristic extracting circuit, said latch having outputs coupled to second inputs of said frame characteristic extracting circuit; a left frame code memory and a right frame code memory having inputs coupled to receive outputs from said second latch; a right and left frame composing section receiving inputs from said left and right frame code memories,

3.The optical character reading system of claim 1 wherein said means for combining comprises a first column number register having inputs coupled to receive outputs of said left frame buffer memory and having outputs coupled to inputs of said left frame buffer memory; a register having inputs coupled to receive outputs of said right frame buffer memory having outputs coupled to control inputs of said right frame buffer memory; a second column number register having outputs coupled to inputs of said register; a difference degree calculating circuit having inputs coupled to said outputs of said left frame buffer memory and said right frame buffer memory; a comparator circuit having one set of inputs coupled to receive outputs from said difference degree calculating circuit; a minimum value register having inputs coupled to comparison outputs of said comparator and having outputs coupled to a second set of inputs of said comparator, said second column number register having inputs coupled to receive outputs from said comparator.

4. The optical character reading system of claim 2 wherein said column black cell detecting circuit comprises a set of OR gates each having one input coupled to receive a corresponding output from said binary coding circuit; a set of flipflops having a data input coupled to an output of a corresponding OR gate, a data output of each of said flip-flops being coupled to a second input of the corresponding OR gate, each of the clock and clear inputs of said flip-flops being coupled to a corresponding clock pulse source; a second set of flip-flops, first and second ones of said second set of flip-flops being coupled to receive outputs from end ones of said first set of flip-flops; a set of AND gates, one of said AND gates being provided for each flip-flop of said second set of flip-flops except for said end ones of said flip-flops, said AND gates having inputs coupled to receive outputs from flip-flops of said first set of flip-flops and outputs of said AND gates being coupled to corresponding ones of flip-flops of said second set of flip-flops.

5. The optical character reading system of claim 3 wherein said difference degree calculating circuit comprises; a non-coincidence determining circuit; an AND gate having one input coupled to receive a comparison output of said noncoincidence circuit and a second input coupled to a clock pulse source; and a count-up counter having a count-up input coupled to an output of said AND gate and a clear input coupled to a second source of clock pulses.