GB2071875A - Control of dc motor speed - Google Patents

Abstract

A dc motor 10L, 10R driven by a train of current pulses is controlled by sampling the back e.m.f. generated by the motor during the intervals between said drive pulses, averaging the sampled voltage values in integrator 28, comparing the averaged value of the samples with a second voltage in comparator 22, and varying the mark-space ratio of the pulse train in dependence on any variation in said compared values in a sense to maintain a predetermined rotational speed of the motor. The second voltage is a decaying voltage, and the time at which the decaying voltage equals the averaged voltage value determines the period of the drive pulses to the motor and hence the mark- space ratio of the pulse train. <IMAGE>

Description

SPECIFICATION Control of dc motors This invention relates generally to control systems for controlling the speed of dc motors, and it is particularly concerned with a system for controlling such motors so that their speed can be maintained constant at a desired value.

In the use of dc motors it is common for there to be variations in the load on the motor drive shaft due to any one of a variety of outside influences. The rotational speed of the motor can also be affected by voltage variations in the electrical power supply to the motor.

Many different systems have been proposed in the past in attempts to control the speed of dc electric motors. A number of these make use of the phenomenon that when a dc motor is not being driven, its inertia will cause it to continue rotating, and under these circumstances it will generate a back e.m.f. which is proportional to the speed of rotation. One such motor control system is described in UK patent specification 1145301, and a development of this is described in an article entitled "towards better control of small dc motors" in the July 1 972 edition of "Wireless World".

In each of these prior systems the drive to the dc motor is by voltage pulses from a freerunning multivibrator and each application of power is of full power and for a fixed time. In effect, these known systems use pulse frequency modulation to control the motor speed. In the intervals between pulses the back e.m.f. is monitored and compared with a constant reference value, the result of the comparison determining whether the subsequent pulse is accelerated or retarded, and thereby tending to correct any variation in the motor speed.

It is an object of the present invention to provide a motor control system which is an improvement on these known systems in certain respects. It is an object of the present invention to provide a motor control system in which the back e.m.f. from the motor is used as a control parameter in a negative feedback control loop, and in which instead of using pulse frequency modulation to control the motor speed the mark-to-space ratio of the driving pulses is varied to maintain the motor speed constant. It is another object of the present invention to provide a motor control system in which is is not necessary to provide a regulated or even smoothed voltage supply to the motor in order to be able to achieve accurate control of its speed of rotation. In the known systems referred to above, a common voltage supply is used both to power the motor and to power the speed control circuit.

This has therefore meant that it has been necessary to incorporate smoothing means in the system in order to remove voltage spikes, ripples, etc. The need to include such smoothing means in the motor power supply circuit considerably increases the overall cost of the system, particularly in the case of large motors. With the control system of the present invention it is only necessary to smooth the voltage supply to the speed control circuit itself, without the need specially to smooth the voltage supply which powers the motor.

In accordance with the present invention there is provided a dc motor control system comprising a dc motor, means to provide a train of current pulses the drive said motor, sampling means arranged to monitor the back e.m.f. generated by the motor during the intervals between said drive pulses and to average the sampled voltage values, and comparator means arranged to compare the averaged value of the samples with a second voltage and to vary the mark-space ratio of the pulse train in dependence on any variation in said compared values in a sense to maintain a predetermined rotational speed of the motor.

Preferably, said second voltage is a decaying voltage with constant decay characteristics, the time at which the decaying voltage equals the averaged voltage value from said sampling means determining the period of the drive pulses to the motor and hence the markspace ratio of the pulse train.

In a preferred arrangement, the power supply to the motor has not more than one voltage supply line in common with the power supply to the sampling means and comparator means.

In order that the invention may be fully understood, one embodiment of motor control system in accordance therewith will now be described in detail by way of example and with reference to the accompanying drawing which is a schematic circuit diagram of the control system.

Referring to the drawing, this shows two dc motors 1 OL and 1 OR which are arranged to be driven from a common drive circuit. Each motor 1 OL, 1 OR is connected to a positive voltage supply line 1 2. The other side of each motor is connected by way of the contacts of a relay RL1, through a power Darlington transistor TR1 to a negative power supply line 14, which can be at earth potential. A diode D1 is connected between the movable arm of the realy RL1 and the positive supply line 12, in the collector circuit of the power transistor TR 1, to protect it against excessive voltage swings.

The motor control circuit includes a logic NAND gate 1 6 having three inputs. Overall control of the motor drive is by the input signal to terminal 1 8. A repetitive pulse train is also applied to the logic gate 1 6 at terminal 20. The pulse train alternates between HIGH and LOW values, therby defining 'mark' periods during which the motor is driven and 'space' periods during which the motor speed is sampled. These drive/sample pulses are provided by an oscillator (not shown). The output of the logic gate 16 is connected by way of a capacitor C1 to the negative input of a comparator 22.A resistance R1 which is connected between this negative input and a negative voltage line 24 for the logic circuit constitutes a RC circuit with the capacitance cm. A diode D2 is connected in parallel with the resistance R1. The output of the comparator 22 is both Fed back to one of the logic gate 16 inputs and also applied to the base of a drive transistor TR2. The emitter of the drive transistor TR2 is connected to the common positive voltage line 12 and its collector is connected to the base of the power Darlington transistor TR 1.

The repetitive pulses at terminal 20 are supplied also to an analogue gate 26. The input side of the analogue gate 26 is connected to the fixed contacts of the relay RL1 by way of a resistive network R2 and R3, and a pair of isolating diodes D3 and D4. A variable resistance R4 and R5 is connected in each path of the potential divider chain. The output of the analogue gate 26 is connected to the negative input of an integrator 28. The positive input of the integrator 28 is connected by way of one resistance R6 to the common positive voltage line 12 and by way of another resistance R7 to the logic circuit negative supply line 24. The output of the integrator 28 is connected to the positive input of the comparator 22.

The operation of the motor control system is as follows. The overall control of the motor drive is effected by the input signal at terminal 1 8. This input signal is variable between high and low. When this input signal is low, the e output of the logic gate 16 is high and tie negative input of the comparator 22 is rrn'r,tqired low bv the resistance R1. The drive pteess fron, the oscillator which are fed in at ter final 20 have a mark-to-space ratio between the limits of 10% and 90%.With the terminal 18 input in the low condition, there is nc drive to the motors even when the drivezsample input 20 is high. Thus, when the dr-ve/sample input 20 is high, this causes The analogue gate 26 to be closed as it has a low reeistai ee input to output. With no back e n,.f. from the motors, the negative input of +.ie integi-ator 28 is taken high, driving the integrattor output to negative saturation. This is a volt or so above the saturation. the circuit negative supply line 24 and is applied as the positive input to the comparator 22.

the output of the comparator is thus held F.iyh, keeping the drive transistor TR2 turned .f and also the power transistor TR 1 When the input signal at terminal 18 goes '.igh, if the drive/sample signal on terminal 20 goes high also. i.e. at the start of a sarnplinu period then the output of the logic gate 16 goes low, causing the junction of capacitance C1, diode D2 and resistance R1 to go low also. This junction point is clamped to the line 24 by the diode D2.When the signal on terminal 20 returns to the low condition, i.e. at the end of a sampling period, the output of logic gate 16 goes high, causing via capacitance Cl, the negative input of the comparator 22 to go high. The comparator output therefore goes low, turning the drive transistor TR2 on. This in turn supplies current to the base of the power transistor fR1, turning it on and enabling current then to flow through one of the motors 1 OL, 1 OR via the contacts of the relay RL1.

The voltage on the negative input of the comparator 22 decays by leakage through resistance R1 until it becomes less than the voltage on the positive input, whereupon the output of the comparator 22 goes high, causing the power transistor TR1 to turn off. This sequence is repeated after each sampling period of the pulse train at terminal 20.

As the motor speed increases, so a back e.m.f. is produced in the periods when the motor is not being driven. This e.m.f. appears at the relay contact as a negative potential with respect to the common positive supply line 12, and appears at the input of the analogue gate 26 potentially divided by the resistive network R2, R3 and isolated by the diodes D3, D4 respectively.

During each sample period, i.e. during the space periods of the pulse train, the analogue gate 26 allows the aforesaid negative potential to be applied to the negative input of the integrator 28. The positive input of the integrator 28 is maintained at a fixed reference potential by the resistive potential divider formed by the resistances R6 and R7. As the negative input to the integrator 28 is driven more negative than this fixed reference voltage, so the output of the integrator is driven more positive with a time constant determined by its capacitor and the effective input resistance. This, in effect, averages the samples of the back e.m.f.

The averaged back e.m.f. is used to control the mark-space ratio of the pulse train in the following way. If the motor speed increases above the predetermined value, then the output of the integrator 28 rises and the positive input of the comparator 22 also rises, thus defining an earlier point, in time, on the C1, R1 discharge voltage characteristic at which the comparator output switches high and terminates the drive pulses. Thus, as the averaged value of the back e.m.f. becomes greater, the driving pulse period becomes narrower. Conversely, if the rotational speed of the motor is less than the preset arbitrary target speed, the averaged back e.m.f. will cause an increase of the mark-space ratio of the pulse train, i.e. the driving pulse period will become broader, and hence the motor speed will increase.

The variable resistances R4 and R5 connected to the relay terminals and forming part of the e.m.f. potential divider chain enable one to effect calibration of different motors to a set value of rotational speed.

In the circuit described above, the averaging time constant which is determined by the components C1 and R1, and also the sampling-drive pulse frequency, have been chosen to operate correctly with an electrical supply to the dc motors 1 OR, 10L of fully rectified 50Hz ac, i.e. repetitive half sine wave.

It will thus be appreciated that variations in the averaged value of the back e.m.f obtained from the samples fed to the negative feedback control loop will affect the mark-space ratio of the pulses in the pulse train which drives the motor. Moreover, the power supply to the logic circuitry, i.e. the voltage supply on lines 1 2 and 24, which has only a small current requirement, can readily be regulated, smoothed and stabilised and is connected to the power circuit only by way of the common positive line 1 2. By divorcing the negative line for the power circuit from that for the logic circuit, one need only smooth and stabilise the voltage for the logic circuitry, without having to go to the additional trouble and expense of smoothing and stabilising the voltage supplied to the power circuit.

Claims (10)

1. A dc motor control system comprising a dc motor, means to provide a train of current pulses to drive said motor, sampling means arranged to monitor the back e.m.f. generated by the motor during the intervals between said drive pulses and to average the sampled voltage values, and comparator means arranged to compare the averaged value of the samples with a second voltage and to vary the mark-space ratio of the pulse train in dependence on any variation in said compared values in a sense to maintain a predetermined rotational speed of the motor.

2. A system as claimed in claim 1, in which said second voltage is a decaying voltage with constant decay characteristics, the time at which the decaying voltage equals the averaged voltage value from said sampling means determining the period of the drive pulses to the motor and hence the mark-space ratio of the pulse train.

3. A system as claimed in claim 1 or 2, in which the power supply to the motor has no more than one voltage supply line in common with the power supply to the sampling means and comparator means.

4. A system as claimed in any preceding claim, in which the mark-space ratio of the pulses in the pulse train is variable between the limits of 10% and 90%.

5. A system as claimed in any preceding claim, in which said sampling means and said comparator means comprise part of a negative feedback control loop, said sampling means including an integrator having its output connected to an input of a comparator circuit.

6. A system as claimed in claim 5, in which the other input of the comparator circuit is connected to the output of a logic gate which switches between two alternative output values in dependence on the occurrence of the pulses of the pulse train, the voltage at said other input of the comparator circuit constituting said second voltage and being arranged to decay by leakage until it equals the voltage at said input, whereupon the drive to the motor ceases.

7. A system as claimed in claim 5 or 6, in which the integrator has a first input connected to gate means which receives the sampled back e.m.f. voltages and is controlled as to its open/closed state by the pulses of the pulse train, and a second input which is held at a fixed reference potential.

8. A system as claimed in claim 7, which includes an e.m.f. potential divider chain between the motor and the gate means, said chain including a variable resistance to permit the system to be adjusted for different motors.

9. A system as claimed in any preceding claim, in which the output of said comparator means is connected to a switching transistor which is connnected to a power transistor connected to the motor through a relay.

10. A dc motor control system substantially as hereinbefore described with reference to the accompanying drawing.