GB2067307A

GB2067307A - Improvements in Apparatus for a Method of Diagnostic Testing of Electrically Controlled Machinery

Info

Publication number: GB2067307A
Application number: GB7944125A
Authority: GB
Original assignee: PCL REPROGRAPHIC ENG SERVICES
Current assignee: PCL REPROGRAPHIC ENG SERVICES
Priority date: 1979-12-21
Filing date: 1979-12-21
Publication date: 1981-07-22

Abstract

In a method and apparatus for testing electrically or electromechanically controlled machinery, a plurality of input signals representative of the operative states of preselected parts of the machinery, and provided at an input (32) are received and stored in a predetermined order in a first storage means (42). Data signals representative of the required values of said input signals are stored in a second storage means (44). The data from the respective stores (42 and 44) is compared in a predetermined sequence by means of a microprocessor operating according to a predetermined program contained within a program store (40). In the event of a mismatch between the compared data signals, the relevant data signals which have been received from the signal input (32) are caused to be read from the relevant store (42) and displayed on a visual display (50). A further display (52) indicates the particular comparison step at which a mismatch was found, and thus enables identification of the relevant part of the machinery from which the input signals were received. <IMAGE>

Description

SPECIFICATION Improvements in Apparatus for a Method of Diagnostic Testing of Electrically Controlled Machinery This invention relates to a method of apparatus for the diagnostic testing of electrically or electromechanically controlled machinery.

Examples of such machinery use a controller to cause the machine to carry out a sequence of operations and at the end of the sequence to stop the operation of the machine or to cause it to repeat the sequence one or more times until it is eventually instructed to stop. Examples of such machinery are electronically-controlled machine tools and photocopying machines.

It is becoming increasingly common to use microprocessors to control modern machinery in place of the normal logical or mechanical or manual means of controlling sequential operation of the machine. The normal method of utilising a microprocessor for sequential control is to programme a microprocessor device to sense the condition of switches or other types of sensor in the machine and to perform logical operations within the microprocessor which result in a control signal being produced at an output of the microprocessor device which is, in turn, used to change the condition of the machine under control.

The signals produced by the microprocessor are unfortunately of the order of only a few volts, being a level shift, which can be regarded as a logical 0 or 1, between the supply fed to the microprocessor and the common or ground supply rail. It is therefore necessary to amplify these small signals to enable larger currents or voltages to be switched within the equipment under control.

The most common means of switching in use today is the relay or in the case of a device requiring electrical to mechanical conversion, a solenoid.

When a failure occurs either in the controlling electronic circuitry or the relay/solenoid circuit, an engineer is faced with two alternative methods of diagnosing the fault to enable him to repair the machine.

He can: 1) substitute one by one components until the fault is rectified.

2) locate by means of test equipment the faulty component.

Both of these methods as described are time consuming, laborious and expensive. The first method could be carried out by an unskilled engineeer, but would not be cost effective. The second method could not be employed by unskilled engineers, and this then reduces the number of engineers capable of carrying out the repair. This could lead to equipment being out of commission for an unacceptable long time which may, at least, be inconvenient and unprofitable due to the time needed to enlist skilled engineering technicians.

It is an object of the invention to provide a method of and apparatus for locating faults in the control and switching circuitry of a machine and for enabling their diagnosis and repair by unskilled engineers who would normally only carry out routine servicing and the like.

According to the invention there is provided apparatus for testing electrically or electromechanically controlled machinery, the apparatus comprising input means for receiving a plurality of input signals representative of the operative states of preselected parts of the machinery, first storage means for storing said input signals in a predetermined order, second storage means for storing data signals representative of the required values of said input signals, means for comparing corresponding input signals and data signals in a predetermined sequence and to produce an output signal to indicate whether the input signal is a correct or an incorrect value, control means responsive to said output signal and in the event that said input signal is correct, for causing said means for comparing to compare the next succeeding corresponding input signals and data signals to produce a second output signal and so on, means for counting the number of comparison operations carried out and in the event of an incorrect output signal for providing an indication of the number of the comparision step and for indicating the digital value of the corresponding input signal.

The apparatus according to the invention may include a microprocessor for controlling its operation.

According to the invention there is also provided a method of testing an electrically or electronically controlled machine, the method comprising the steps of obtaining a plurality of input signals representative of the value of the electrical signal appearing at preselected parts of the machine, storing a plurality of data signals representative of the value of signals to be expected at the corresponding part of the machine in normal operation, comparing corresponding input and data signals to obtain an output signal indicative of correct operation or of incorrect operation of the machine, in the event of a correct output signal in a predetermined sequence comparing the corresponding input and output signals of another part of the machine to produce a second output signal and so on, and in the event of an incorrect output signal obtaining an indication of the number of the step in the sequence of comparison steps, an indication of the value of said incorrect signal and determining the fault in the machine from the indicated incorrect input signal.

The input signals can be obtained, and compared, in groups, for examples in groups of six binary signals to make up a six bit word or as is more usual, an eight bit word in which two of the bit places, say the two most significant bits are unused or used for control purposes.

The invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 shows a simple circuit of part of an input unit for use with the apparatus according to the invention, Figure 2 shows a block schematic diagram of an embodiment of apparatus according to the invention, Figure 3 is a flow chart illustrating part of the apparatus of Figure 2.

Referring to Figure 1 there is shown a typical relay circuit 10 of an equipment under test, and comprises a switching PNP transistor 14 having its emitter coupled to the positive rail 1 5 of a power supply (not shown) and its collector coupled through a solenoid or relay coil 16 to the earth line 17 of the power supply. A control signal applied to terminal 18 is coupled through a resistor 20 to the base of transistor 14. In operation, when the transistor 14 is turned on by a negative signal applied to terminal 18, a large current flows through the emitter collector junction of the transistor 14 and through the solenoid or relay coil 16 to energise it. Thus, in the absence of a control signal, terminal 18 is at a positive potential and the junction 22 of the transistor 14 and element 16 is at or near earth potential because the transistor is nonconducting.On the application of a negativegoing signal to terminal 18 the resulting current through the element 16 and the consequent voltage drop across it will cause the potential to rise at junction 22.

There are four causes of failure in this, comparatively simple, circuit 10. There are:~ 1) failure of the switching signal to be applied to the transistor 14 base, 2) failure of the emitter/collector junction of the transistor 14, 3) failure of the interconnecting wiring to and from the reiay/solenoid coil 16, 4) failure of the relay/solenoid coil 1 6 itself.

Figure 1 also shows a buffer unit 24 for use with the invention. The buffer unit 24 is arranged to provide a signal output equivalent to logical 0 or 1 depending upon the state of the circuit 1 0, and comprises an amplifier 26 having an input 26a coupled to a positive voltage line 27 by way of a resistor 29 and to an input terminal 23 by way of a diode 25 poled as shown. If terminals 22 and 23 are connected together the output 26b of the amplifier provides an indication of the operative state of the circuit 10. For example, under no input signal conditions output 26b of the input buffer 24 is returned or pulled down to Ov level by way of the diode 25 and rnlay/soleg,oid coil 16.Upon application of a signal inptt tq,the base of transistor 14 the voltage at the test point 22 will rise and the buffer input will be pulled high due to the blocking action of the applied voltage across the coil 16 and the pull-up resistor 29 on the input buffer 24. If no change of state is evident, it can be deduced that although a signal was applied to the transistor 14, the relay/solenoid 16 did not operate and that the transistor 14 or wire connection is at fault. If on the other hand the buffer in-put is high during no input signal condition at terminal 18, then the transistor emitter/collector junction has shorted or the relay/solenoid coil 16 is open circuit or the wire connection 19 to the relay/solenoid coil 16 is at fault.

Figure 2 shows a block diagram of one embodiment of apparatus 30 according to the invention. Twenty four input channels are shown at 32 for clarity although any number of channels may be utilized dependent upon the machinery under test. Data is inputed to the equipment via selectable input buffers such as the buffers 24 of Figure 1 in 8-bit format, this being the capacity of the processor registers as described. Thus in each 8-bit word the six least significant bits represent the "high/low information" of four input channels.

So for 24 input channels 4 data words would be required. The two most significant bits in each 8bit word of data are ignored to allow them to be used as control inputs if required. The data is routed by way of a bi-directional data bus 34 and loaded into the accumulator 38 of the central processing unit (C.P.U.) 36. The C.P.U. may include a microprocessor such as a MOSTEK Z80.

This function is under the control of the C.P.U. 36 which obtains its instructions from a programme store 40 sequentially as required. The accumulator 38 contents are then transferred into a temporary store 42 for later use. The programme now repeates and inputs the data in a 8-bit format from the next 6 input buffers and so on until all 24 inputs have been stored. The next part of the programme is to compare the data in the temporary store 42 with the control data representative of the data which should be received at the inputs 32 if the equipment under test is operating correctly. This data is stored in appropriate addresses in the data store 44 which in this case is a read only memory (R.O.M.).When the temporary store 42 is loaded with the information from all of the input signals coupled to input 32 on H.L. register 46 is loaded with the first address of the data store 44 and the D.E.

register 48 is loaded with the first address of the temporary store 42. The C.P.U. 36 then inputs data from both addresses and performs a logical compare function in the accumular 38. This is achieved by addressing the temporary store 42 to read out the first data word representative of the signal levels of the first six input channels into the accumulator 40. Then the corresponding data word representative of the values of the first six input channels when the equipment under test is operating correctly is read out from the data store 44 and subtracted from the first data word in the accumulator 38. If the equipment under test is functioning correctly when the information in the accumulator is all zeros and the C.P.U. 36 steps to compare the next data word in the temporary store 42 and so on. If the two sets of data compare the program continues after incrementing the H.L. 8 D.E. registers 46, 48 respectively to the next addresses in store. To enable the data to be identified in the event of a non-compare condition that is the equipment is functioning incorrectly, a third B.C. register 50 is also incremented to record the number of passes that have occurred. In the event of a non compare the programme aborts and jumps to a new routine which is stored in the programme memory 40. This new routine takes the data from the present temporary store 42 address and feeds it into a 6-bit data latch 50 which switches on or off light emitting diodes shown as display 50a to 50f. These indicators 50a to 50f reflect the logic state of the 6-bits of data in the latches.As a non compare situation must arise from a data error in the temporary store, the display need only be compared visually with a listing of fault conditions to indicate the fault in the equipment under test. To enable easy location of the error code the contents of the B.C. register 50 are also displayed on a display 52 in normal numeric form, thus the error codes can be listed numerically. As the machinery proceeds with its task, checks can be made at regular intervals by causing the C.P.U.

36 to be interrupted at pre-selected times as required. The C.P.U. would then repeat the process as described until the machinery has finished its task.

Figure 6 shows a simple flow diagram which illustrates the operation of the apparatus 30 in a slightly different mode of operation wherein each word at input 32 (that is six channels of information) is tested before the C.P.U.

programme steps to the next input word. It is believed that the diagram is sufficiently clear to be understood by a man in the art and to require no further description apart from stating that:~ 1) The HL and DE registers contain a 16-bit binary address which is recognized only by the device which is addressed, i.e. temporary store or data store.

2) The BC register is used as a counter to record the number of passes made through the programme.

3) The data and temporary stores are random access memories.

4) The programme store is a read-only memory and contains sequential instructions for C.P.U.

operation.

5) All registers assume a clear (All zero's) condition on power up or reset.

Claims

1. An apparatus for testing electrically or electromechanically controlled machinery, said apparatus comprising input means for receiving a plurality of input signals representative of the operative states of preselected parts of the machinery, first storage means for storing said input signals in a predetermined order, second storage means for storing data signals representative of the required values of said input signals, means for comparing corresponding input signals and data signals in a predetermined sequence and to produce an output signal to indicate whether the input signal is a correct or an incorrect value, control means responsive to said output signal and in the event that said input signal is correct, for causing said means for comparing to compare the next succeeding corresponding input signals and data signals to produce a second output signal and so on, means for counting the number of comparison operations carried out and in the event of an incorrect output signal for providing an indication of the number of the comparison step and for indicating the digital value of the corresponding input signal.

2. An apparatus as claimed in Claim 1, wherein said comparing means, said control means and said counting means are provided by a programmed microprocessor.

3. An apparatus for testing electrically or electro-mechanically controlled machinery, substantially as described herein with reference to the accompanying drawings.

4. A method of testing an electrically or electronically controlled machine, said method comprising the steps of obtaining a plurality of input signals representative of the value of the electrical signal appearing at preselected parts of the machine, storing a plurality of data signals representative of the value of signals to be expected at the corresponding part of the machine in normal operation, comparing corresponding input and data signals to obtain an output signal indicative of correct operation or of incorrect operation of the machine, in the event of a correct output signal in a predetermined sequence comparing the corresponding input and output signals of another part of the machine to produce a second output signal and so on, and in the event of an incorrect output signal obtaining an indication of the number of the step in the sequence of comparison steps, an indication of the value of said incorrect signal and determining the fault in the machine from the indicated incorrect input signal.

5. A method as claimed in Claim 4, wherein said input signals are obtained and compared in groups of binary signals, which signals are associated with one another to form a binary word.

6. A method of testing an electrically or electronically controlled machine, substantially as described herein with reference to the accompanying drawings.