GB2067117A - Bonding semi-conductor bodies to aluminium thick-film circuits - Google Patents

Bonding semi-conductor bodies to aluminium thick-film circuits Download PDF

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Publication number
GB2067117A
GB2067117A GB8041035A GB8041035A GB2067117A GB 2067117 A GB2067117 A GB 2067117A GB 8041035 A GB8041035 A GB 8041035A GB 8041035 A GB8041035 A GB 8041035A GB 2067117 A GB2067117 A GB 2067117A
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GB
United Kingdom
Prior art keywords
thick
aluminium
bonding
circuit
thin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8041035A
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GB2067117B (en
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UK Secretary of State for Defence
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UK Secretary of State for Defence
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Filing date
Publication date
Application filed by UK Secretary of State for Defence filed Critical UK Secretary of State for Defence
Priority to GB8041035A priority Critical patent/GB2067117B/en
Publication of GB2067117A publication Critical patent/GB2067117A/en
Application granted granted Critical
Publication of GB2067117B publication Critical patent/GB2067117B/en
Expired legal-status Critical Current

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/22—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating taking account of the properties of the materials to be welded
    • B23K20/233—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating taking account of the properties of the materials to be welded without ferrous layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01032—Germanium [Ge]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Die Bonding (AREA)

Abstract

A semiconductor body (3) is bonded to an aluminium thick-film circuit (2) on a substrate (1) by coating the body with a thin layer of evaporated aluminium and diffusion- bonding the body to the circuit by pressing them together (4) at an elevated temperature. <IMAGE>

Description

SPECIFICATION Improvements in or relating to bonding semi-conductor bodies to aluminium thick-film circuits This invention relates to bonding semi-conductor bodies to aluminium thick-film circuits.
It is known from British Patent Specification Number 1,389,542 to join a semiconductor body member to a support member of ceramic material or metal by a method wherein between substantially flat facing surfaces of the two members there is applied a malleable metal body, a mechanical bond between the members via the intermediate malleable body being obtained by pressing the members together at a steady pressure normal to the flat surfaces of between 6.5 and 32.5 N/mm2 at a temperature above ambient but below the melting point of the malleable metal body at the said pressure and below the lowest temperature at which a liquid phase would form at the said pressure by interaction of the elemental components of the malleable metal body and members at the facing surfaces; the pressure and temperature were together applied to achieve within a period not exceeding 30 seconds a bond between the members having a bond tensile strength minimally of 20% of the ultimate tensile strength of the malleable metal body. It is explained in this prior specification that pressures between these limits were chosen to obtain a sufficiently strong bond without fracturing the semi-conductor material. The lower and upper temperature limits were dictated by the melting points of all the materials involved in the bonding and near the bonded area and were specified as being 75 C and 300 C respectively. The time taken for the bonding process was in all cases less than 30 seconds and in some cases less than 5 seconds. The materials suggested for use as the intermediate layer were generally soft solders, as foils or coatings.The choice of material depended on the materials to be bonded. Where materials to be bonded were subject to oxidation, it was found necessary to coat or metallise the surfaces with gold, to a thickness of about 8 microns.
In the interests of long-term reliability, it is desirable that, so far as possible, the connections between semiconductor chips and the thick-film circuits to which they are bonded should involve only a single metal, in order to avoid the formation of intermetallic compounds. Where an aluminium thick-film circuit is used, e.g. as formed by an aluminium metallising paste of the kind described in British Patent Specification Number 1,378,520, existing techniques for bonding chips to thick-film circuits cannot provide such an all-aluminium system; it is an object of the present invention to provide a method enabling the latter to be achieved. An additional advantage is that no metallic interlayer, i.e. corresponding to the malleable metal body of Specification Number 1 389,542, is required.
According to the present invention a method of bonding a semiconductor body to an aluminium thick-film circuit comprises coating the relevant surface of the body with a thin layer of aluminium, and diffusion-bonding said surface to the thick-film circuit by pressing said body and said circuit together at an elevated temperature to obtain a bond by diffusion across the interface between said thin layer and said circuit.
The thin layer of aluminium may be formed on the semiconductor body by vacuum evaporation, and may subsequently be fired on to the body, e.g. at about 475 C; however such firing is not necessary where adequate adhesion of the layer is obtained without it. The layer may be not greater than 5 ym thick, suitably about 1.5 tim thick.
Preferably the pressure is in the range 10 to 80 Nmm-2. Preferably the temperature is in the range 250 to 450 C. Preferably the pressure is applied for a time of at least 1 minute and not substantially exceeding 10 minutes; it has been found that the use of much longer times. e.g.
20 minutes, can cause bond failure, the reason being unknown.
While in general the higher pressures (and temperatures) give stronger bonding, the pressure must not be so great as to cause damage to the semiconductor body by cracking. To some extent the permissible pressure is temperature-dependent, e.g. in one set of experiments using silicon bodies, the maximum permissible pressure without cracking was 40 Nmm-2 at 400 C, increasing to 60 Nmm-2 at 250 C. Suitable combinations of pressure, temperature and duration can be established by experiment.
The present invention will now be described by way of example only with reference to the accompanying drawing, which is a diagrammatic cross-section (not to scale) showing the bonding of a silicon chip to an aluminium thick-film circuit formed on an alumina substrate. In this drawing an alumina substrate 1 has printed and fired thereon an aluminium thick-film circuit 2. A silicon chip 3 has its lower face coated with a thin aluminium layer (not shown) formed by vacuum evaporation; this face is placed in contact with circuit 2.Pressure is applied between chip and substrate, as indicated by the arrow 4, by a press having electrically heated platens of stainless steel, e.g. similar to that shown in Fig. 1 of Specification Number 1,389,542 but desirably having both platens heated and incorporating thermocouples for temperature control, to effect diffusion bonding between the thin aluminium layer and the thickfilm circuit. The pressing step is performed in air, no protective atmosphere being necessary.
In one series of experiments using 3.0 x 3.0 mm silicon dice 140 jim thick (simulating semiconductor chips), having one surface coated with a vacuumevaporated aluminium layer approximately 1.5 jurn thick, the following results were obtained. The quality of the bond was assessed by determining the shear stress at which the bond failed.
Pressure Temp Time at Temp Failure Shear Stress Specimen (Nmm-2) ( C) (mins) (Nmm-2) 1 60 250 10 1.1 2 40 350 10 > 4.8 3 40 400 10 > 2.2 In the experiments the dice were bonded to an aluminium thick-film layer approximately 15 jtm thick simulating a thick-film circuit, which was formed using Engelhard T1486 paste printed and fired on an alumina substrate. Other experiments have indicated that acceptable bonds may be obtainable using pressing durations considerably shorter than the 10 minutes used for the above specimens, e.g. 1-2 minutes, under suitable conditions.
Although described with reference to the bonding of silicon semiconductor bodies, the method is also applicable to semi-conductor bodies of other materials, e.g. germanium, capable of being aluminised.

Claims (13)

1. 1. A method of bonding a semiconductor body to an aluminium thick-film circuit comprising coating the relevant surface of the body with a thin layer of aluminium and bonding said surface to the thick-film circuit by pressing said body and said circuit together at an elevated temperature to obtain a bond by diffusion across the interface between said thin layer and said circuit.
2. A method as claimed in claim 1 wherein said thin layer is formed by vacuum evaporation.
3. A method as claimed in claim 1 or claim 2 wherein said thin layer is fired on to said body.
4. A method as claimed in any preceding claim wherein said thin layer is not more than 5 jilm thick.
5. A method as claimed in any preceding claim wherein the pressure is in the range 10 to 80 Nmm-2.
6. A method as claimed in any preceding claim wherein the temperature is in the range 250 to 450 C.
7. A method as claimed in any preceding claim wherein the pressure is applied for at least 1 minute and not substantially more than 10 minutes.
8. A method as claimed in any preceding claim wherein the semi-conductor body is made of silicon.
9. An aluminium thick-film circuit having a semiconductor body bonded thereto by a method as claimed in any preceding claim.
10. A method of bonding a semiconductor body to an aluminium thick-film current, said body having a relevant surface coated with a thin layer of aluminium, comprising pressing said body and said circuit together at an elevated temperature to obtain a bond by diffusion across the interface between said thin layer and said circuit.
11. An aluminium thick-film circuit waving a semiconductor body bonded thereto by a method as claimed in claim 10.
1 2. A method of bonding a semiconductor body to an aluminium thick-film circuit as claimed in claim 1 or claim 10 and substantially as hereinbefore stated.
13. An aluminium thick-film circuit having a semiconductor body bonded thereto by a method as claimed in claim 1 or claim 10 and substantially as hereinbefore described.
GB8041035A 1980-01-02 1980-12-22 Bonding semi-conductor bodies to aluminium thick-film circuits Expired GB2067117B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8041035A GB2067117B (en) 1980-01-02 1980-12-22 Bonding semi-conductor bodies to aluminium thick-film circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8000039 1980-01-02
GB8041035A GB2067117B (en) 1980-01-02 1980-12-22 Bonding semi-conductor bodies to aluminium thick-film circuits

Publications (2)

Publication Number Publication Date
GB2067117A true GB2067117A (en) 1981-07-22
GB2067117B GB2067117B (en) 1983-07-06

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2540673A1 (en) * 1983-02-03 1984-08-10 Ni Pt I Sistem Planirou Uprav Rectifier elements mfr.
US4546409A (en) * 1982-04-02 1985-10-08 Mitsubishi Denki Kabushiki Kaisha Device for cooling semiconductor elements
EP0242626A2 (en) * 1986-04-22 1987-10-28 Siemens Aktiengesellschaft Method for mounting electronic components on a substrate
EP0330896A2 (en) * 1988-03-03 1989-09-06 Siemens Aktiengesellschaft Method for attaching semiconductor components to substrates, and arrangement for carrying it out
EP0336514A1 (en) * 1988-04-08 1989-10-11 Koninklijke Philips Electronics N.V. Method of providing a semiconductor body on a support
EP0615284A2 (en) * 1993-03-11 1994-09-14 Kabushiki Kaisha Toshiba Electronic circuit device
US5353980A (en) * 1992-07-07 1994-10-11 Northern Telecom Limited Affixing dielectric resonator on PCB

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546409A (en) * 1982-04-02 1985-10-08 Mitsubishi Denki Kabushiki Kaisha Device for cooling semiconductor elements
FR2540673A1 (en) * 1983-02-03 1984-08-10 Ni Pt I Sistem Planirou Uprav Rectifier elements mfr.
EP0242626A2 (en) * 1986-04-22 1987-10-28 Siemens Aktiengesellschaft Method for mounting electronic components on a substrate
EP0242626A3 (en) * 1986-04-22 1989-01-25 Siemens Aktiengesellschaft Berlin Und Munchen Method for mounting electronic components on a substrate
EP0330896A2 (en) * 1988-03-03 1989-09-06 Siemens Aktiengesellschaft Method for attaching semiconductor components to substrates, and arrangement for carrying it out
EP0330896A3 (en) * 1988-03-03 1991-01-09 Siemens Aktiengesellschaft Method for attaching semiconductor components to substrates, and arrangement for carrying it out
EP0336514A1 (en) * 1988-04-08 1989-10-11 Koninklijke Philips Electronics N.V. Method of providing a semiconductor body on a support
US4961528A (en) * 1988-04-08 1990-10-09 U.S. Philips Corporation Method of providing a semiconductor body on a support
US5353980A (en) * 1992-07-07 1994-10-11 Northern Telecom Limited Affixing dielectric resonator on PCB
EP0615284A2 (en) * 1993-03-11 1994-09-14 Kabushiki Kaisha Toshiba Electronic circuit device
EP0615284A3 (en) * 1993-03-11 1995-03-22 Tokyo Shibaura Electric Co Electronic circuit device.

Also Published As

Publication number Publication date
GB2067117B (en) 1983-07-06

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PCNP Patent ceased through non-payment of renewal fee