GB2064918A - Data communication systems - Google Patents
Data communication systems Download PDFInfo
- Publication number
- GB2064918A GB2064918A GB7941539A GB7941539A GB2064918A GB 2064918 A GB2064918 A GB 2064918A GB 7941539 A GB7941539 A GB 7941539A GB 7941539 A GB7941539 A GB 7941539A GB 2064918 A GB2064918 A GB 2064918A
- Authority
- GB
- United Kingdom
- Prior art keywords
- data
- interface circuit
- highway
- switch means
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/16—Half-duplex systems; Simplex/duplex switching; Transmission of break signals non-automatically inverting the direction of transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40267—Bus for use in transportation systems
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Dc Digital Transmission (AREA)
Abstract
In a data communication system where a user is connected to a common highway via an interface circuit including an isolating transformer 25, the interface circuit includes a transistorised push-pull reversing switch (16, 17, 20, 21) for converting data to be transmitted to the highway to a bipolar drive for the transformer hence allowing more efficient use of the transformer. The data reception mode is detected by gates 29 and 30 which initiate, via VMOS switches 26, 27, isolation of the reversing switch to avoid interaction thereof with the received waveform. <IMAGE>
Description
SPECIFICATION
Data communication systems and interface circuits for use in such systems
This invention relates to data communications systems in which data is transferred between stations of the system by way of a common data highway. The invention further relates to an interface circuit for interfacing a data transmitting station of the system to the data highway.
A data communication system, for example an information system for an aircraft, may comprise a plurality of sub-systems or stations between which data is transferred, via a common data highway, in the form of multiplexed serial digital signals. When used in certain fields of use, particularly aircraft, such systems may have to meet fairly stringent performance specifications laid down by the authorities controlling that field. Thus, standards may be set regarding the purity ofthewaveform of the signal applied to the data highway and regarding adverse interactions between the stations of the system and the highway. These standards may thus affect the design of circuits which interface the stations and the highway.
According to one aspect of the invention there is provided an interface circuit, for use in a data communication system wherein data is transferred between stations of the system by way of a common data highway, the interface circuit being for interfacing a data transmitting station of the system to the highway and comprising::
input means for connection to receive signals from the transmitting station,
a transformer for connection to said highway,
reversing switch means which is connected between said input means and said transformer and which is operable, in dependence upon the level of a signal received via said input means, to cause current to flow in one or the opposite direction through a winding of the transformer, and
isolating switch means connected to said input means and operable in response to a control signal received via said input means for disconnecting said transformer winding from said reversing switch means.
According to another aspect of the invention, there is provided a data communication system including a common data highway for transferring data, a data transmitting station and an interface circuit as described above connected between the data transmitting station and the data highway.
For a better understanding of the invention and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying drawings in which:
Figure 1 is a diagram illustrating the layout of a data communication system of the kind to which the invention relates, and
Figure 2 shows part of a remote terminal of a data communication system and a circuit for interfacing the terminal to a data highway.
As shown in Figure 1, a data communications system for use, for example, in the information system of an aircraft may comprise a series of stations between which data is to be transferred in the form of multiplexed serial logic signals by way of a common highway or bus 5. The cable forming the highway 5 may be duplicated to give any desired level of redundancy as shown by the dashed lines 6.
The system will normally include a terminal 1 which controls or initiates the transfer of data along the data highway and which is often called a "Bus controller". Each subsystem, i.e. each device or functional unit of the system to and or from which data is to be transferred by way of the highway, is connected to the highway by way of a "remote terminal" which has the function of properly interfacing the subsystem to the data highway. The remote terminal may be comprised as a separate unit which is connected between the subsystem and the highway, the subsystem 2 and the remote terminal 3 being arranged in this way in Figure 1, or the elements of the remote terminal may be incorporated into the subsystem to form a combined unit such as the unit 4.
In the Figure, only two subsystems are shown but it will be appreciated that there may well be several more such subsystems, even a large number, all connected to the same data highway. A practical system might also include other elements (not shown), for example a special terminal which monitors and records data appearing on the highway.
The remote terminals of the system ensure that the data is sent out to the highway in the digital signal code and word format chosen for the system.
By way of example, the code chosen might be the "Manchester II biphase level" in which a logic one comprises a positive pulse followed by a negative pulse and a logic zero comprises 3 negative pulse followed by a positive pulse.
Figure 2 shows the output stage 7 of a remote terminal, which is operable both to receive and to transmit data via the highway 6 (not shown in Figure 2), and an interface circuit for ensuring thetransmis- sion of well shaped code pulses to the highway whilst lessening any disadvantageous interactions between the terminal and the highway.
The output stage 7 comprises an encoder/decoder which may be in the form of an integrated microcircuit and which encodes the data received via other terminal stages (not shown). The encoded data appears as conjugate pulses at the output terminals 8 and 9 of the encoder. At any instant, while data is being transmitted, one of the inputs 8 and 9 will be "high" while the other is low, which one is high and which one is low being dependent upon whether a "high" or a "low" digital signal level is to be transmitted. The "high" and "low" digital signal levels may or may not correspond to logic values "1" and "0" respectively of the data code. For example, if the chosen code is the aforementioned
Manchester II bi-phase level, in which either logic value comprises both a "high" and a "low" digital level, there will not be such correspondence.
The pulses at the terminals 8 and 9 are applied to the inputs of respective active gating circuits 12 and 13 which act as buffer amplifiers. The pulses from the circuit 12 are fed via respective inverting ampli fiers 14 and 15 to the base terminals of two transistors 16 and 17 while the pulses from the circuit 13 are fed via respective inverting amplifiers 18 and 19 to the base terminals of two transistors 20 and 21.The transistors 16 and 20 have their collector/emitter paths connected in series between a positive voltage supply line + V and a ground supply conductor 0 of the interface circuit and, suitably biased by resistors 22 and 23 and capacitor 24, the two transistors form a first push-pull switch having a first switching state, in which the transistor 16 is turned on by the low output of circuit 12 acting via inverter 14 while the transistor 20 is turned off by the converse output of circuit 13 acting via inverter 18, and a second switching state in which the individual transistor states are reversed, i.e. transistor 16 is off while transistor 20 is on.Thus, while the switch is in its first state, the interconnection point between the transistors 16 and 20 is connected to the ground supply conductor while, in the second state, this interconnection point is connected to the positive supply conductor + V. The two transistors 17 and 21 are connected to form a second push-pull switch similar to the first but, because of the way in which the circuits 12 and 13 are connected to the transistors 17 and 21, when data is being transmitted the second transistor switch is always in its second switching state when the first switch is in its first state and vice versa.
The two ends of a winding 25a of an isolating transformer 25, of which another winding 25b is connected to the data highway, are connected to the interconnection points between the two transistors of the first and second switches respectively, in one case directly and, in the other case, via an isolating switch in the form of two VMOS switches 26 and 27 connected in series and "back-to-back". While data is being transmitted, the switches 26 and 27 are both conductive.Thus, during such transmission, the two ends of the transformer winding 25a are connected to respective ones of the positive and ground supply conductors + V and 0, which end is connected to which conductor, and hence the direction of current flow through the winding, being dependent upon which of the two transistor switches formed by transistors 16,17,20 and 21 is in its first switching state and which is in its second state, and hence also upon whether a "high" or a "low" digital signal level is being issued by the output stage 7 of the terminal.
Hence the digital signals forming the data to be transmitted are applied to the data highway by providing a bipolar drive to the transformer 25, which drive thus makes use of both sides of the hysteresis loop of the transformer and enables it to be smaller than would be the case if a unipolar drive were provided.
In order to give any desired lengthening of the rise and fall times of the pulses applied to the transformer, a capacitor 28 may be connected between the transistor interconnection points of the two transistor switches.
When data is to be received by the terminal, the first and second switches are disconnected from the transformer to ensure that there is no adverse interaction between the switches and the received waveform. This function is carried out by the isolating switch formed of the two VMOS switches 26 and 27. Such switches have a low "on" resistance and so have little effect on the waveform of the signal applied to the transformer when data is being transmitted. When "off", such switches act as diodes and this is why, here, two of them are used connected back-to-back. When data is to be received, the two outputs 8 and 9 of the encoder/decoder both supply a "high" digital signal level. As a result, all of the transistors 16, 17,20 and 21 are turned off.The outputs of the two gating circuits 12 and 13 are additionally connected to respective inputs of each of two "And" gates 29 and 30 of which the outputs are connected via respective arrangements of transistors 31,32 and 33, 34, with associated biasing and current limiting resistors 35 to 39, to the source terminals of respective ones of the two VMOS switches 26 and 27. When encoder/decoder outputs 8 and 9 are both high, the gates 29 and 30 give output signals which, via the transistors 31 and 33, cause the transistors 32 and 34 to become conductive hence connecting the gate and source terminals of the two VMOS switches 26 and 27 to a negative supply conductor -V of the circuit. The VMOS switches are thus turned off.In addition, any drive leakage current passing therethrough is shunted to the negative conductor thus improving the isolation afforded by the switches. The data signals received from the data highway pass to two data input terminals of the encoder/decoder, which terminals are connected directly to respective ends of the transformer winding 25a.
The inputs of the gates 12 and 13 are connected via resistors 10 and 11 to a positive voltage source +V'. These resistors merely ensure that should the encoder/decoder 7 be inadvertently disconnected from the gates, the gates receive input potentials which result in the transistors 16, 17 and 20,21 being made non-conductive.
The winding 25b of the transformer 25 may be connected as desired to the data highway, for example in either of the two known ways which have been deemed acceptable for aircraft systems. In one of these, the two ends of the winding 25b are simply connected via two isolating resistors to the two wires of the cable forming the data highway. In the other, a coupling transformer is interposed between the transformer 25 and the highway.
Using the interface circuit shown in Figure 2, it will be appreciated that, in addition to the fact that the transformer 25 is used more efficiently than would be the case if it were provided with a unipolar drive, any deviation from an ideal zero crossing point of the transmitted digital signals is dependent upon any differences between the turn-on times of the transistors 16,17,20 and 21 and not, as might be the case with other simpler circuits, upon the possibly much larger difference between the turn-on and the turn-off times of any one transistor.
Claims (12)
1. An interface circuit, for use in a data communication system wherein data is transferred between stations of the system by way of a common data highway, the interface circuit being for interfacing a data transmitting station of the system to the highway and comprising:
input means for connection to receive signals from the transmitting station,
a transformer for connection to said highway,
reversing switch means which is connected between said input means and said transformer and which is operable, in dependence upon the level of a signal received via said input means, to cause current to flow in one or the opposite direction through a winding of the transformer, and
isolating switch means connected to said input means and operable in response to a control signal received via said input means for disconnecting said transformer winding from said reversing switch means.
2. An interface circuit according to claim 1, wherein said reversing switch means comprises a transistor switch circuit for providing a push-pull drive to said transformer winding.
3. An interface circuit according to claim 2, wherein the circuit includes two conductor portions for receiving respective electrical supply potentials during use of the circuit and wherein said reversing switch means comprises first and second transistor switches connected to respective ends of said winding and to said two conductor portions, each switch having first and second switching states in which the corresponding end of said winding becomes connected to one and the other of the two conductor portions respectively, the reversing switch means further comprising drive means for causing the first and second transistor switches to enter the first and second states respectively and, alternatively, for causing the first and second transistor switches to enter the second and first states respectively, in dependence upon said level of said received data signal.
4. An interface circuit according to claim 3, wherein each of the first and second transistor switches comprises two transistors of which the collector to emitter paths are connected in series between said two conductor portions, the point of connection between the two transistors being connected to the respective end of said winding.
5. An interface circuit according to any preceding claim, including a capacitor connected to said reversing switch means for lengthening the rise and fall times of data signals applied to said highway.
6. An interface circuit according to any preceding claim, wherein said isolating switch means comprises a semiconductor switch connected between one end of said transformer winding and said reversing switch means.
7. An interface circuit according to claim 6, wherein said isolating switch means comprises a series, back to back arrangement of two VMOS switches.
8. An interface circuit according to any preceding claim, wherein said input means comprises two input terminals for receiving conjugate signal levels representative of said data from said transmitting station and the interface circuit includes control means for sensing the presence of identical signal levels at the two input terminals and for then causing the isolating switch means to disconnect said transformer winding from said reversing switch means.
9. An interface circuit, for use in a data communication system wherein data is transferred between system stations by way of common data highway, the interface circuit being for interfacing a data transmitting station of the system to the highway and being substantially as hereinbefore described with reference to Figure 2 of the accompanying drawings.
10. A data communication system including a common data highwayfortransferring data, a data transmitting station and an interface circuit according to any preceding claim connected between the data transmitting station and the data highway.
11. A system according to claim 10, wherein the data transmitting station is further operable for receiving data from the data highway and comprises, for receiving such data, an input connected directly to said transformer winding.
12. A data communication system substantially as hereinbefore described with reference to the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7941539A GB2064918B (en) | 1979-12-01 | 1979-12-01 | Data communication systems |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7941539A GB2064918B (en) | 1979-12-01 | 1979-12-01 | Data communication systems |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2064918A true GB2064918A (en) | 1981-06-17 |
GB2064918B GB2064918B (en) | 1983-12-21 |
Family
ID=10509550
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7941539A Expired GB2064918B (en) | 1979-12-01 | 1979-12-01 | Data communication systems |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2064918B (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3247834A1 (en) * | 1982-12-23 | 1984-06-28 | Siemens AG, 1000 Berlin und 8000 München | CIRCUIT BLOCK |
EP0247675A1 (en) * | 1986-05-26 | 1987-12-02 | AT&T NETWORK SYSTEMS NEDERLAND B.V. | Transmitter for ISDN S-bus interface circuit |
EP0250334A2 (en) * | 1986-06-20 | 1987-12-23 | Société Anonyme dite: CEGELEC | Interface for connecting a device to a coaxial cable |
GB2265069A (en) * | 1992-03-11 | 1993-09-15 | Soundcraft Electronics Ltd | Reducing crosstalk in networks |
US7526350B2 (en) | 2003-08-06 | 2009-04-28 | Creative Technology Ltd | Method and device to process digital media streams |
-
1979
- 1979-12-01 GB GB7941539A patent/GB2064918B/en not_active Expired
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3247834A1 (en) * | 1982-12-23 | 1984-06-28 | Siemens AG, 1000 Berlin und 8000 München | CIRCUIT BLOCK |
EP0247675A1 (en) * | 1986-05-26 | 1987-12-02 | AT&T NETWORK SYSTEMS NEDERLAND B.V. | Transmitter for ISDN S-bus interface circuit |
EP0250334A2 (en) * | 1986-06-20 | 1987-12-23 | Société Anonyme dite: CEGELEC | Interface for connecting a device to a coaxial cable |
FR2600475A1 (en) * | 1986-06-20 | 1987-12-24 | Alsthom Cgee | INTERFACE FOR CONNECTING AN APPARATUS TO A COAXIAL CABLE AND COUPLER INCORPORATING SUCH AN INTERFACE |
EP0250334A3 (en) * | 1986-06-20 | 1988-08-10 | Cgee Alsthom Societe Anonyme Dite: | Interface for connecting a device to a coaxial cable, and a coupler incorporating such an interface |
GB2265069A (en) * | 1992-03-11 | 1993-09-15 | Soundcraft Electronics Ltd | Reducing crosstalk in networks |
GB2265069B (en) * | 1992-03-11 | 1995-10-04 | Soundcraft Electronics Ltd | Improvements in or relating to networks |
US7526350B2 (en) | 2003-08-06 | 2009-04-28 | Creative Technology Ltd | Method and device to process digital media streams |
US8954174B2 (en) | 2003-08-06 | 2015-02-10 | Creative Technology Ltd | Method and device to process digital media streams |
Also Published As
Publication number | Publication date |
---|---|
GB2064918B (en) | 1983-12-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |