GB2064898A

GB2064898A - A drive arrangement for a stepping motor

Info

Publication number: GB2064898A
Application number: GB8038618A
Authority: GB
Original assignee: Ebauches SA; FRANCE EBAUCHES SA
Current assignee: Ebauches SA; FRANCE EBAUCHES SA
Priority date: 1979-12-06
Filing date: 1980-12-02
Publication date: 1981-06-17
Also published as: DE3044468A1; FR2471077B1; JPS5691698A; FR2471077A1

Abstract

The drive arrangement comprises circuitry for detecting the passage of the motor current through a relative maximum while a drive pulse is applied to the motor. The duration of the drive pulse, which ordinarily has a predetermined minimum duration T0, is increased by a predetermined amount DELTA T if no maximum is observed during the time T0. If no current maximum is detected during the detection pulse, the detection pulse is prolonged by one or more increments of predetermined lengths, up to a predetermined maximum duration. The drive pulse is also prolonged each time the detection pulse is prolonged. In one preferred embodiment, a memory circuit (13), which is reset after each drive pulse, which is reset after each drive pulse, stores the maximum value of the motor current observed during a given pulse as of a given instant. A comparator (12) compares the stored value to the instantaneous value of the current, the comparator output changing state when the current falls after passing through a relative maximum. <IMAGE>

Description

SPECIFICATION Drive arrangement for a stepping motor The present invention relates to a drive arrangement for a stepping motor, in which electric drive pulses are supplied to the winding of the motor, and a detecting device monitors the variation of the current passing through the winding of the motor during the application of a drive pulse. The duration of the drive pulse is varied as a function of the torque resistance exerted on the motor in order to conserve energy. This is particularly important in certain applications of micromotors, particularly in the field of watches, in which the source of energy used for the driving of the motors comprises an electric battery.

It is the object of the present invention to decrease the consumption of electrical energy by the motor beyond what has previously been possible so as to permit the use of batteries of very small size and/or to extend the life of the batteries or other power source.

It is another object of the invention to increase the reliability of operation of the motor, by providing a real-time control therefore with dynamic detection of the motor's rotation.

The drive pulses which drive a stepping motor must be of sufficient duration for the rotor to overcome the resistance torque and to move one step. When this condition is fulfilled, the current flowing through the winding of the motor passes through a relative maximum. It the motor encounters great torque resistance, the current peak is substantially delayed, and the drive pulse must be longer than when little resistance is encountered.

Accordingly, the drive arrangement of the invention is characterized by the fact that the detection device comprises means for detecting the passage of the motor current through a relative maximum and control means are provided for increasing the duration of the drive pulse from a predetermined minimum duration To by a predetermined amount AT if the relative maximum of the current has not been reached by the end of the predetermined minimum pulse duration To.

The detection device may comprise a comparator the output of which changes state responsive to the decrease in the motor current after the current passes through a relative maximum. A memory circuit memorizes the peak value of the current and inputs a voltage representative thereof to the non-inverting input of the comparator. The comparator continuously compares the decreasing instantaneous value of the current with the stored peak value.

In order to ensure the detection of the passage of the current through a relative maximum, the detection device preferably further comprises means for producing a detection pulse and means for interrupting the detection pulse at the end of the minimum-width drive pulse of duration To. The detection pulse can also be ended after the passage of the current through a relative maximum, in which case the device further comprises means for terminating the detection pulse if no relative maximum in the motor current is detected within a predetermined interval of time. Means for delaying the generation of the detection pulse with respect to the drive pulse is also provided.

In accordance with one particular embodiment, the drive pulse of the motor may be prolonged by a sequence of several preferably equal intervals ATi until after the passage of the current through the relative maximum or until a predetermined maximum duration has been reached.

The present invention will be better understood by reference to the following description of several preferred embodiments and to the accompanying drawings, in which: Figure 1 is a graph showing the form of the current when the motor turns through one step; Figure 2 is a graph showing the form of the current when the motor has not turned completely or is blocked; Figure 3 shows a circuit diagram of a part of one preferred embodiment of the drive device of the invention; Figure 4 shows graphically the form of the drive pulse and of the corresponding detection pulse according to the embodiment of Figure 3; Figure 5 shows graphically the form of the drive pulse and the form of the corresponding detection pulse according to a second preferred embodiment of the invention;; Figure 6 is a graph showing the current, the detection pulse and the drive pulse used in the second preferred embodiment as they appear when the motor turns normally through one step; Figure 7shows in succession the form of the current, the form of the detection pulse and the form of the drive pulse of the second preferred embodiment in the event that the motor turns with difficulty; Figure 8 shows the form of the current, the form of the detection pulse and the form of the drive pulse in the second preferred embodiment when the motor is blocked;; Figure 9 shows in succession, by way of comparision, the form of the drive pulse of the motor as it appears in the first preferred embodiment of the invention, the form of the drive pulse of the motor as it appears in the second preferred embodiment of the invention, the form of the drive pulse as it appears in a conventional motor controlled by a multiple-pulse closed-loop control, and the form of the drive pulse as it appears in a motor having no control; Figure 10 is a flow chart summarizing the operation of the embodiment of Figures 3 and 4; Figure ii is a timing diagram explaining the operation of the circuit of Figure 3; and Figure 12 is a flow chart summarizing the operation of the second preferred embodiment of the invention.

The drive device of the present invention detects the rotation of a stepping motor by means of a dynamic detection, i.e. by means of a detection process carried out during the rotation of the motor. Figures 1 and 2 show graphically the intensity of the current in the winding of the motor as a function of the time under two different load conditions. When the motor is turning normally, the current as shown in Figure 1 passes through a relative maximum, called 1max or peak, and then decreases and passes through a relative minimum Imjn. In the event that the motor encounters a resistance torque sufficient to stop it, the current intensity as shown in Figure 2 increases continuously, asymptotically approaching the peak value Imam.

Figure 3 shows, by way of example, one preferred embodiment of a drive device in accordance with the invention. A circuit of a known type, indicated schematically by block 10, generates the drive pulse and detects or monitors the motor current and produces an output which is representative of motor current The feeding of the motor is effected preferably by a transistor bridge, known per se. The aforesaid output of circuit 10 is input to acurrent-voltageconverter 11 whose output is connected directly to the inverting input of a comparator 12 and indirectly, via a circuit 13 which memorizes the peak voltage, to the non-inverting input of the comparator 12. The memorization circuit 13 comprises a capacitor 14 having one end connected to a diode 15 and having its other end grounded, so that the capacitor charges as long as the motor current is rising.The diode 15 is oriented to allow the capacitor 14 to charge while the motor current rises. After the motor current passes through a peak, or relative maximum, the diode 15 prevents the discharge of the capacitor 14. The peak current value is represented by the charge on the capacitor 14, which stores the "memorized" value.

The resetting of the memory device to zero, is effected by a circuit indicated schematically by block 16. The resetting circuit 16 may, for example, comprise a transistor having its emitter grounded and its collector connected between the diode 15 and the capacitor 14, together with a pulse generator which applies a reset pulse to the base of the transistor to actuate it to allow the capacitor 14 to discharge thereacross, for example at the end of each drive pulse.

The output of the comparator 12 is connected to one input of a NAND gate 17, whose second input is connected to one output of a frequency divider 18 which is connected to an oscillator 19, for instance a quartz ocillator. In the embodiment shown in Figure 3, the frequency divider 18 supplies a pulse train having a frequency of 128 Hz to the second input of the NAND gate 17 and a pulse train of a frequency of 64Hz to one input of a NOR gate 21. The output of the NAND gate 17 is connected via an inverter 20 to the second input of the NOR gate 21. In this way pulses of either 3.9 msec or 7.8 msec duration appear at the output of the NOR gate 21, as will be explained below.The output of NOR gate 21 is fed back to circuitry included in block 10 to control the length of the drive pulse in a manner to be described below generated by the circuit 10.

Figure 4 shows the shape of the drive pulse of the motor and the shape of the detection pulse which correspond to the embodiment described with reference to Figures 3. The drive pulse, represented graphically in the upper part of Figure 4 by a voltage as a function of time, has a minimum duration To which may be extended once by a time AT, equal for instance to To, if a relative maximum of the current is not detected during the interval To. The detection pulse is preferably delayed by a time TA with respect to the drive pulse and terminates simultaneously with the drive pulse To.

This adjustment of the duration of the drive pulse as a function of the resistance torque exerted on the motor is due to the comparator of Figure 3 which changes state when the current decreases after having passed through a relative maximum, as will now be explained with reference to Figures 3 and 11.

Figure 11 is a timing diagram illustrating the operation of the circuit of Figure 3. As can be seen from Figures 3 and 11, the frequency divider 18 generates two pulse trains. A pulse train having a frequency of 64 Hz is applied to one input of the NOR gate 21, while a second pulse train having a frequency of 128 Hz is applied to one input of the NAND gate 17. Each rising edge and each falling edge of each pulse in the 64 Hz train coincides with the falling edge of a respective pulse in the 128 Hz pulse train, as shown in Figure 11.

Each drive pulse is initiated at time to by circuit 10. As is indicated in Figure 11, to occurs when the 128 Hz pulse and the 64 Hz pulse become low together, i.e. their falling edges coincide. The low state of the 128 Hz pulse serves as a detection pulse for that coinciding drive pulse. As previously explained the current in the motor rises, and a voltage representative thereof is applied to both inputs of the comparator 12. The rising voltage applied to the non-inverting input of comparator 12 also serves to charge capacitor 14. Since the voltage applied to both inputs of comparator 12 is the same, the output of the comparator 12 is low, i.e. a logic 0. The output of NAND gate 17 is therefore high, as long as the detection pulse is present and the voltage at the first input of NOR gate 21, inverted by inverter 20, is therefore low.At this time, as shown in Figure 11, the voltage applied by frequency divider 18 to the other input of NOR gate 21 is low, so that the output of NOR gate 21 is high. If the motor is turning normally, the motor current will reach a peak value and then decline, as shown in Figure 1. In this case, shown in the right-hand part of Figure 11, where it is assumed that the peak current voltage is reached and detected before the rising edge of the 128 Hz pulse and hence before the end of the detection pulse it will be understood from Figure 3 that the capacitor 14, which has charged to a value representative of the peak motor current, is prevented by diode 15 from discharging.

As a result, capacitor 14 ensures that the voltage representative of the peak current continues to be applied to the non-inverting input of comparator 12, while the voltage applied to the inverting input thereof is representative of the instanteous value of the motor current, which is now falling. As soon as the voltages being applied to the two inputs of the comparator 12 become different as a result of this the output of the comparator 12 rises to a high, or logic 1, value. As soon as the detection pulse ends, i.e. the 128 Hz pulse goes high at TA + TB, the output of NAND gate 17 goes down and the voltage applied to the first input of the NOR gate is therefore high. The output of NOR gate 21 becomes consequently low, and terminates the drive pulse generated in circuit 10; in this case the duration of the drive pulse is approximately 3.9 msecs.

The case in which no current relative maximum is detected during the presence of the detection pulse is illustrated in the left-hand portion of Figure 11. In this case, the output of the comparator 12 remains always at the low, or logic 0 level, so that the voltage applied to the first input of NOR gate 21 is always low. As a result, the output of NOR gate 21 is high for as long as the voltage at its second input, i.e. the 64 Hz line, is also low. Thus, the output of NOR gate 21 has the form of a pulse equal in length to a 64 Hz pulse, i.e.

approximately 7.8 msec in duration.

The drive circuit 10 includes circuitry (not shown) which examines the output of NOR gate 21 during the generation of each drive pulse to determine whether or not the duration of the drive pulse is to be extended.

The exact nature of this circuitry is not critical, and any suitable arrangement of conventional digital electronic elements could be used. The function of this circuitry is as follows. A certain specified time TA after the beginning of a drive pulse, the drive circuit 10 examines the output of NOR gate 21. In the event that no current relative maximum has been detected, the output of the NOR gate 21 will be high until approximately 7.8 msec after the beginning of the drive pulse as shown in the left-hand portion of Figure 11 when the drive pulse is then terminated. If the motor is turning normally, as shown in the right hand portion of Figure 11 the output of the NOR gate 21 will become low 3.9 msec after the beginning of the drive pulse to terminate the drive pulse as previously described.

The operating program ofthe embodiment described above is shown in the flow chart of Figure 10.

In accordance with another preferred embodiment of the invention, the drive pulse can be prolonged by one or a series of increments. Referring to Figure 5, which shows the drive pulse and the corresponding detection pulse graphically, it is seen that the drive pulse of the motor has a predetermined minimum duration To. However, as a function of the resistance to turning applied to the motor, the drive pulse can be

extended by one or more time intervals ATi, for instance AT1, AT1 + AT2, AT1 + AT2 + AT3, ATa + AT2 + AT3 + AT4 or AT, + AT2 + AT3 + AT4 + AT5. The intervals AT may be of any predetermined duration but are preferably equal so that the minimum pulse To, which corresponds to the duration of the minimum pulse for a normally turning motor, can be extended by an integral number of elementary intervals AT1.

The operating program of the device described is shown in the flow chart of Figure 12.

When the motor is turning normally, the curves of the current in the winding and the shapes of the detection and drive pulses correspond respectively to the three graphs of Figure 6. A time delay TA relative to the beginning of the drive pulse defines the start of the detection pulse. The detection pulse continues until the current I starts to decrease after having passed through its relative maximum or peak value. The output of the comparator changes state. The duration of the control pulse of the motor is extended by an increment AT1 so that the total pulse has a duration of To + AT1.

In the event that the motor is turning with difficulty, the curves have the shapes shown in the graphs of Figure 7. As previously, a time delay TA defines the start of the detection pulse. This pulse will be longer since the passage to the maximum current which triggers the change in state of the comparator is delayed by the resistance torque. In the example shown, the drive pulse has the duration To + 3AT1 or ATo + AT, + AT2 + AT3, in which To represents the predetermined minimum pulse duration.

The detection pulse lasts until time TM = TA + T8. This duration corresponds to a pulse which stops within the second increment AT2. The drive pulse is extended until the end of the second increment and, as safety margin, there is added a third increment AT3.

In the case of Figure 8 the motor is stopped. The detection pulse is time-delayed in such a manner that it begins a period of time TA after the beginning of the drive pulse and ends a period of time TA + TB max after the beginning of the drive pulse. The drive pulse ends at the same time as the detection pulse and has a total duration To+5ATj.

By way of example, TA = 2 sec.; To = 3 sec.; AT1 = 1 sec.

128 128 Therefore the drive pulse can assume the following values: To + ate 4 sec. To + 2aTiSec.

128sec. 128 To + 3AT; = 6 sec. To 128sec. T0 + 4AT = 7 128 sec.

To + 5ATe = 8 128sec.

Figure 9 shows, by way of example, the shape of the pulses of the motor in the event that the motor is turning normally, with difficulty, in the case of a closed loop control with multiple pulses and in the case of a drive without closed loop. ts corresponds to the duration of the stabilization of the rotor, which is at least of the order of 15.6 ms.

The following table makes it possible to compare the experimental results obtained, corresponding to graphs of Figure 9.

Duration of the drive pulse The motor is turning: CaseA Case B Case C Case D normally: 3.9 ms 3.9 ms 3.9 ms 7.8 ms with difficulty: 7.8 ms 4.9/5.9/ > 11.7 ms 7.8 ms 6.8/7.8 ms not at all: 7.8 ms 7.8 ms > 11.7 ms 7.8 ms Case A corresponds to the first preferred embodiment, to which the graph of Figure 4 refers.

Case B corresponds to the second preferred embodiment, to which the graph of Figure 5 refers.

Case C corresponds to a closed-loop control with multiple pulses.

Case D corresponds to a drive without control.

This table shows that the effective consumption of power of a motor with the control system of the invention, especially of the embodiment of Figure 5, is equal to one-half that of a device without closed-loop control when the motor is turning normally. It is also less than that of a system with closed-loop control with multiple pulses when the motor is not able to turn normally. Case B, which illustrates the second preferred embodiment described in detail with reference to Figure 5, is more flexible, due to its five possible pulse durations and furthermore saves energy in cases where motor movement is difficult.

In the two embodiments described, the saving in energy attained in no way affects the reliability of operation of the system, which is substantially the same as that of the known systems.

Other experiements have been carried out on the arrangement of the invention, involving, in particular, accelerated forward operation with closed loop control.

The following table summarizes the numerical results obtained.

Case A Case B Case C Case D Minimum total duration for one step (in ms); 23.4 23.4 B42.9 23.4 Maximum frequency of the motor (steps/second): 42 42 < 23 42 As in real-time closed-loop control, there is only one pulse per step of the motor. The accelerated forward speed can be as rapid as in the non-controlled systems, which is not true in the case of systems with multiple pulses.

Furthermore, one also benefits from the saving in energy during the accelerated forward operation, which has already been recorded for normal operation.

Claims

1. A drive arrangement for a stepping motor, said arrangement comprising: means for supplying to the winding of the stepping motor electrical drive pulses having a predetermined minimum duration To, detection means for continuously determining the amount of torque resistance encountered by the motor while a said drive pulse is being applied thereto: and control means arranged to cause an increase by a predetermined amount AT in the duration of said drive pulse when the motor encounters more than a normal amount of torque resistance.

2. The arrangement of Claim 1, wherein said detection means comprises means for detecting when the motor current passes through a relative maximum value in order to determine the torque resistance being encountered by the motor.

3. The arrangement of Claim 2, wherein said detection means is adapted to generate a signal indicating that it has detected passage of the motor current through a relative maximum, and wherein said control means is adapted to increase the duration of said drive pulse by said amount AT if, during said minimum duration To of said drive pulse, said control means does not receive said signal from said detection means indicating detection of the passage of the motor current through a relative maximum.

4. The arrangement of Claim 3, wherein said detection means is adapted to continue monitoring the motor current after the lapse of said minimum duration To to determine whether and when passage of the motor current through a relative maximum occurs.

5. The arrangement of Claim 4, wherein said control means is adapted to extend said duration of said drive pulse repeatedly by respective predetermined increments until the passage of the motor current through a relative maximum is detected or until the passage of the motor current through a relative maximum is detected or until said drive pulse has attained a predetermined maximum duration Tmax, which ever occurs first.

6. The arrangement of Claim 5, wherein said predetermined increments are equal.

7. The arrangement of Claim 3, wherein said control means is adapted to terminate said drive pulse after said drive pulse has attained a predetermined maximum duration Tmax regardless of whether said detection means has detected a motor current relative maximum.

8. The arrangement of Claim 2, wherein said detection means comprises means for generating a detection pulse and further comprises second generating means for generating a signal that indicates detection of a motor current relative maximum, said second generating means being adapted to generate said signal only while it is receiving said detection pulse.

9. The arrangement of Claim 8, wherein said means for generating said detection pulse is adapted to begin generating said detection pulse a predetermined length of time after the beginning of said drive pulse.

10. The arrangement of either of Claims 8 or 9, wherein said means for generating said detection pulse is adapted to terminate said detection pulse a length of time To after the beginning of said drive pulse.

11. The arrangement of Claim 8, wherein said detection means comprises comparator means adapted to generate a first output signal after it has detected the passage of the motor current through a relative maximum and adapted to generate a second output signal when it has not detected a motor current maximum.

12. The arrangement of Claim 8, wherein said detection means comprises a resettable memory means for storing a value representative of the largest motor current which has occurred since said resettable memory means has last been reset, and said detection means further comprising means for comparing said stored value with a signal representative of the instantaneous value of the motor current.

13. The arrangement of Claim 8, wherein said means for generating said detection pulse is adapted to terminate said detection pulse when said detection means detects a motor current maximum.

14. The arrangement of Claim 8 or 13, wherein said means for generating said detection pulse is adapted to terminate said detection pulse a predetermined length of time TB after the beginning of said detection pulse, regardless of whether a motor current maximum has been detected in the meantime.

15. The arrangement of Claim 14, wherein said means for generating said detection pulse is adapted to terminate said detection pulse not less than a predetermined minimum period of time AT after the end of said detection pulse.

16. A process for electrically driving a stepping motor, said process comprising the steps of: generating a drive pulse having a predetermined minimum duration To and applying itto the winding of the motor to be driven; monitoring the current in said motor for detecting the passage of the motor current through a relative maximum; and if a motor current maximum is observed before a time period equal to To has elapsed for the beginning of the drive pulse, terminating said drive pulse at a first predetermined time and if a motor current maximum is not observed before a time period equal to To has elapsed, then continuing to generate said drive pulse and to apply it to said motor for an additional period of time.

17. A drive arrangement for a stepping motor substantially as hereinbefore described with reference to the accompanying drawings.