GB2063606A - Retrace driven horizontal deflection circuit - Google Patents

Abstract

A resonant horizontal deflection circuit that includes a field-effect transistor 50 in its output stage is disclosed. The inherent high input impedance of the field-effect transistor eliminates the need for a driver transformer so that the horizontal driver stage 14 may be directly coupled to the output stage. Also the bilateral conduction characteristics of the field-effect transistor's drain-source channel eliminate the requirement for the conventional damper diode. <IMAGE>

Description

SPECIFICATION Retrace driven horizontal deflection circuit Background of the Invention This invention relates to a circuit arrangement for producing a sawtooth current through a line deflection coil in an image display apparatus such as a video monitor or television receiver.

In a conventional image display apparatus, including a cathode-ray tube (CRT), horizontal deflection of the electron beam is achieved by developing a periodically recurring sawtooth current in an inductive magnetic deflection yoke. The development of such a deflection signal is usually accomplished by a horizontal output stage comprising an output transistor (which functions as an electronic switch), the emitter-collector path of which is coupled in series with the deflection yoke and a dc voltage source. The transistor is alternately actuated, by a driver stage driven by an oscillator, between its conductive or ON condition and its nonconductive or OFF condition in order to effectively alternately connect and disconnect the dc voltage source and the yoke.Each ON-time interval of the output transistor comprises approximately the second half of a horizontal trace interval and each OFF-time interval coincides with approximately the first half of a trace interval plus a retrace interval. Because of the inductive nature of the yoke, applying a fixed potential thereto during the ON-time of the electronic switch results in linearly increasing current flow through the yoke in one direction. In response to turning the electronic switch OFF, the yoke current ceases to increase and a retrace interval is initiated. A damper diode, connected in shunt with the switch, passes the yoke current during the first half of each line trace interval. During this time, linearly decreasing current flows through the yoke in the other direction.

When the electronic switch is turned OFF at the end of a trace interval to terminate the increasing yoke current, the stored magnetic field in the yoke collapses and develops a relatively high amplitude retrace or flyback voltage pulse across the yoke. This flyback voltage is sometimes used to generate the high voltage required for an anode of the CRT.

Summary of the Invention According to the present invention, a resonant horizontal deflection circuit includes a field-effect transistor, hereinafter referred to as a FET, in the output stage. The inherent high input impedance of the FET is utilized to eliminate the need for a driver transformer so the horizontal driver stage is directly coupled to the horizontal output stage. Furthermore, the bilateral conduction characteristics of the FET drain-source channel are utilized to eliminate the damper diode normally present in resonant horizontal deflection circuits.

Current flows through the yoke and the FET in one direction during the second half of each trace interval, while the energy remaining at the end of retrace in the yoke produces current through the yoke in the opposite direction during the first half of each trace interval.

At the end of each trace interval, the yoke produces cosinusoidal current flow in a retrace capacitor.

It is therefore an object of the present invention to provide a circuit for producing a sawtooth current through a horizontal deflection coil in an image display apparatus.

It is another object of the present invention to provide a circuit for producing a sawtooth current through a horizontal deflection coil in an image display apparatus that includes a FET in the output circuit.

It is a further object of the present invention to provide a circuit for producing a sawtooth current through a horizontal deflection coil in an image display apparatus that does not require a damper diode.

It is still another object of the present invention to provide a circuit for producing a sawtooth current through a horizontal deflection coil in an image display apparatus that does not require a drive transformer.

Brief Description of the Drawings Various features and advantages of the present invention will become apparent upon consideration of the following description, taken in conjunction with the accompanying drawings wherein: Figure 1 is a schematic diagram of a prior art horizontal deflection circuit useful for explaining the advantages of the present invention; Figure 2 is a schematic diagram of the present invention; and Figure 3 comprises various signal waveforms helpful in explaining the circuits of Fig.

1 and Fig. 2.

Detailed Description of the Preferred Embodiment Even though horizontal deflection circuits are well known to those skilled in the art, the present invention may be best understood by first referring to Fig. 1 wherein an example of the prior art is illustrated.

Turning now to a structural description of the system of Fig. 1, block 10 represents a horizontal oscillator of an image display device for producing an alternating signal (specifically a rectangular shaped signal) having a frequency equal to the horizontal scanning frequency of the image display device. Preferably, oscillator 10 is free running and is automatic frequency controlled to insure that precise frequency and phase synchronism is maintained between the synchronizing pulses of the signal to be displayed and the scanning signal developed by this system. A rectangular wave output of oscillator 10 may be achieved by any of a variety of different circuit arrangements.

The output signal of oscillator 10 is applied to the input terminals of a driver or amplifier stage. One output terminal of oscillator 10 is connected to ground while the other output terminal is connected to the base of NPN transistor 14. The emitter of transistor 1 4 is grounded and the collector electrode thereof is coupled through the primary winding 1 9 of a transformer 20 to the positive terminal 21 of a source of d.c. operating potential. Positive potential source 21 is coupled to ground through decoupling capacitor 22.

The output of the driver stage is coupled to the input of a horizontal output stage. One terminal of secondary winding 23 of transformer 20 is grounded while the other terminal is connected to the base of NPN transistor 28, the emitter of which is connected to ground.

The collector of transistor 28 is connected to one terminal of magnetic deflection yoke 33.

The other terminal of deflection yoke 33 is connected to the positive terminal 35 of a source of d.c. potential. With this arrangement, a series circuit is provided which includes positive potential source 35, deflection yoke 33, and the emitter-collector conduction path of output transistor 28. Positive terminal 35 is coupled to ground via decoupling capacitor 36.

A damper diode 38, shunted by retrace capacitor 39, is coupled between the upper terminal of yoke 33 and ground. That is, the cathode terminal of diode 38 is directly connected to the upper terminal of the yoke while the anode of the damper diode is grounded.

The primary winding 41 of horizontal output transformer 42 is connected in parallel with yoke 33. High voltage secondary 43 has its lower end coupled to ground, the upper end thereof may be used to drive a highvoltage power supply.

In describing the operation of the scanning and high voltage generating system of FIG. 1, reference is also made to the idealized voltage and current waveforms of FIG. 3 which are present at various points in the circuit of FIG.

1. There are eight waveforms in FIG. 3, identified by the letters A-H, respectively. The points in the circuit of FIG 1 at which these voltages appear are indicated by corresponding letters.

Horizontal oscillator 10 develops at its output terminals the signal of waveform A which has a frequency equal to the horizontal scanning frequency of the image display device.

This signal is applied between the base and emitter of driver transistor 14 to switch the transistor alternately between its conductive and nonconductive states. Specifically, in response to each positive pulse component of waveform A the base of transistor 14 is forward biased and driven into saturation.

Current therefore flows from positive potential source 21 through primary winding 19 and the collector-emitter path of transistor 14 to ground. Each negative pulse component of waveform A reverse biases the base-emitter junction of transistor 14, turning the transistor OFF and terminating the collector-emitter current flow.

During the intervals in which transistor 14 is in its OFF condition, its collector is established at a positive potential with respect to ground, whereas when the transistor is in its ON condition the collector is effectively coupled to the emitter thereby clamping the collector to ground. Hence, the voltage waveform appearing at the collector is that shown by waveform B in Fig. 3. This signal is 180 degrees out of phase with waveform A.

The rectangular shaped voltage signal of waveform B is transformed and translated by transformer 20 to the base of output transistor 28. Windings 1 9 and 23 of the transformer are wound so that no phase reversal occurs from primary to secondary. Hence, the waveform of the voltage signal appearing at the upper terminal of secondary winding 23 is in phase with the signal at the upper terminal of primary winding 19. The signal applied to the base of transistor 28 will appear as waveform C in FIG. 3. For convenience of illustration, the relative amplitudes of the signals of waveforms A, B and C have not been shown in FIG. 3.

Each positive pulse of waveform C is applied across the base-emitter junction of transistor 28 and is of sufficient magnitude to forward bias the junction and establish transistor 28 in its saturated or ON state. Current is thus produced in the output circuit of transistor 28 in the direction from positive potential source 35, through yoke 33 and primary winding 41 in parallel, and then through the collector-emitter path of transistor 28 to ground. Because of the inductive nature of yoke 33 and primary 41, the amplitude ofthe collector current increases from zero in linear fashion as shown in waveform D in FIG. 3.

The current rises linearly from zero starting from the instant transistor 28 is turned ON by the positive voltage pulse of waveform C.

Damper diode 38 may be ignored while transistor 28 is turned ON because it is cut off by potential source 35 which establishes its cathode positive with respect to tis anode. Transistor 28 remains conductive and its collector current continues to increase linearly until the instant at which waveform C changes from positive to negative. At that time, the base of transistor 28 becomes negative with respect to the emitter to the extent necessary to reverse bias the base-emitter junction and cut off transistor 28 thereby terminating the flow of collector current.

At the instant transistor 28 is turned OFF the linearly increasing current, flowing through the yoke and winding 41 in the direction from the collector to the emitter of transistor 28, is abruptly terminated. When the yoke and primary winding current cease to increase, the magnetic fields which built up in yoke 33 and transformer 42 during the interval of rising current collapse. This field collapse induces a relatively high amplitude retrace or flyback pulse across yoke 33 and primary 41. As viewed at the upper terminals of the yoke and primary winding with respect to ground the retrace pulses are positive with respect to ground as shown by waveform E in FIG. 3. The retrace voltage pulses of waveform E are stepped up by transformer 42 to produce higher potential pulses at secondary winding 43.These higher potential pulses may, for example, be applied to a high-voltage rectifier for producing an anode voltage for the image display device.

At the end of each line-tace interval the collapsing magnetic fields in yoke 33 and primary 41 also produce cosinusoidal current flow into retrace capacitor 39. This is shown by the current waveform F in FIG. 3 during the first half of each retrace interval indicated by the symbols t1-t2. During the second half of each retrace interval, namely during the period designated t2-tS, current flows out of retrace capacitor 39 and into yoke 33 and primary winding 41. At time t3, the energy stored in the yoke and the primary winding produce linearly decreasing current, lasting for approximately one-half of the trace interval, out of the yoke and primary winding and through diode 38, as shown by waveform G in FIG. 3.

As shown by waveform D in FIG. 3 current flows from positive potential source 35 and through yoke 33 and primary winding 41 in one direction during the second half of each trace interval, while the energy remaining at the end of retrace in the yoke and primary winding effect current flow through yoke 33 and primary winding 41 in the opposite direction during the first half of each trace interval, as evidenced by waveform G in FIG. 3. During the trace interval the yoke current is a combination of that current flowing through transistor 28 and damping diode 38, and during retrace the yoke current is cosinusoidal since it is the same current that flows through retrace capacitor 39.

Referring now to FIG. 2, therein I have illustrated a retrace driven deflection circuit constructed according to my invention. In FIGS. 1 and 2 similar elements have like reference numbers.

Turning now to a structural description of the system of FIG. 2, block 10 represents the previously described conventional horizontal oscillator. The output signal of oscillator 10 is applied to the input terminals of a conventional driver or amplifier stage. One output terminal of oscillator 10 is connected to negative potential osurce 56 while the other output terminal is connected to the base of NPN transistor 1 4. The emitter of transistor 1 4 is connected to negative potential source 56.

The output of the driver stage is directly connected to the input of the horizontal output stage by virtue of the fact that the collector electrode of transistor 14 is connected to the gate electrode of FET 50. The source electrode of FET 50 is connected to negative potential source 56 and the drain electrode thereof is connected to one terminal of primary winding 41 of transformer 42. The upper terminal of primary winding 41 is connected to a suitable source of positive potential 54. Also connected to the drain electrode of FET 50 and the lower terminal of primary winding 41 is one plate of retrace capacitor 39. The other plate thereof is connected to negative potential source 56. The drain of FET 50 is connected to one terminal of magnetic deflection yoke 33.The other terminal of deflection yoke 33 is connected to one plate of trace capacitor 52 the other plate thereof being connected to negative potential source 56.

Thus, it can be seen that the present invention eliminates the need for the driving transformer and damper diode of the prior art.

Specifically, transformer 20 and diode 38 of FIG. 1 have been eliminated.

The impedance transforming capability of transformer 20 is no longer needed because of the well-known high input impedance of FET's such as FET 50. The output of the driver stage may, therefore, be directly connected to the input of the horizontal output stage. Damper diode 38 which, in conjunction with transistor 28, provides bilateral switching action to produce the sawtooth waveform yoke current is no longer required. The need for a damper diode is obviated because the drain-source channel of an FET is bilateral not unilateral as the collector-emitter path of a transistor is. The above FET characteristics are well known to those skilled in the art. Those desiring more information concerning the operating characteristics of FET's are referred to the "Handbook for Transistors" by John D.

Lenk, copyright 1 976 by Prentice-Hall, Inc., which is herein incorporated by reference.

The present invention operates in essentially the same manner as previously described for the prior air circuit of FIG. 1. An exception being that FET 50 is operated as a bilateral switch and NPN transistor 28 which it replaces may only be operated as a unilateral switch. Circuit operation may be best understood by assuming the following circuit conditions: capacitors 39 and 52 have been previously charged to a level equal to that of positive potential source 54 and that FET 50 has just been turned on by a positive pulse from driver transistor 14. Current is thus produced in the output circuit of FET 50 in the direction from trace capacitor 52 through yoke 33 and the drain-source channel of FET 50 to negative potential source 56.

The current through yoke 33 continues to increase linearly until the instant at which the output of the driver stage changes from positive to negative. At that point, FET 50 is turned off thereby terminating the flow of current from drain to source of FET 50.

When FET 50 is turned off, the energy stored in the magnetic field of yoke 33 will begin to flow through retrace capacitor 39 to negative potential source 56. When the transfer of energy from yoke 33 to retrace capacitor 39 is complete, the current will reverse and flow from retrace capacitor 39 through primary winding 41 to positive potential source 54 and through yoke 33 to capacitor 52 thereby generating the negative half of the retrace current. The voltage across capacitor 39 will decrease until it is equal to approximately one diode drop (0.6 volt) below the voltage of negative potential source 56. At this point, FET 50 will begin conducting in the direction from its source electrode to its drain electrode. The energy stored in yoke 33 will now transfer to retrace capacitor 52.

When FET 50 is turned ON again by the output of the driver stage, the current flow through the drain-source channel of FET 50 reverses and the above-described cycle repeats.

In summary, current flows through yoke 33 and FET 50 in one direction during the second half of each trace interval, while the energy remaining at the end of retrace in the yoke effects current flow through yoke 33 in the opposite direction during the first half of each trace interval. At the end of each trace interval yoke 33 produces cosinusoidal current flow in capacitor 39. Hence, the yoke current waveform is similar to waveform H of FIG. 3. During trace it is the current flowing through FET 50 (in both directions) and during retrace it is cosinusoidal as it is the same current that flows through capacitor 39.

It may be observed in the foregoing specification that such specification has not been burdened by the inclusion of large amounts of detail and specific information relative to such matters as biasing, timing and the like since all such information is well within the skill of the art. It should also be noted that the particular embodiment of the invention which is shown and described herein is intended as merely illustrative and not as restrictive of the invention. Therefore, the appended claims are intended to cover all modifications to the invention which fall within the scope of the foregoing specification.

Claims (10)

1. A circuit arrangement for producing a sawtooth current through a line deflection coil of an image display device comprising: a source of rectangular-shaped pulses at the horizontal line rate of the image display device; amplifying means connected to an output terminal of said pulse source; a field-effect transistor having gate, drain and source electrodes, connected so as to receive the output of said amplifying means at its gate electrode; and a resonant circuit comprising the line deflection coil coupled between said drain electrode and said source electrode.

2. A circuit arrangement for producing a sawtooth current through a line deflection coil of an image display device comprising: a source of rectangular-shaped pulses at the horizontal line rate of the image display device; amplifying means connected to receive the output of said pulse source; a bi-directional switching means connected so as to receive the output of said amplifying means; and a resonant circuit comprising the line deflection coil coupled across the output of said bidirectional switching means.

3. The circuit arrangement according to claim 2 wherein said bi-directional switching means comprises a field-effect transistor connected to receive the output of said amplifying means at its gate electrode.

4. A circuit arrangement for producing a sawtooth current through a line deflection coil of an image display device comprising: a source of rectangular-shaped pulses at the horizontal line rate of the image display device; a bi-directional switching means connected so as to receive said rectangular-shaped pulses; and a resonant circuit comprising the line deflection coil coupled across said bi-directional switching means.

5. The circuit arrangement according to claim 4 wherein said bi-directional switching means comprises a field-effect transistor connected to receive said rectangular-shaped pulses at its gate electrode.

6. The circuit arrangement according to claims 1, 2, or 4 wherein said resonant circuit further comprises a trace capacitor and a retrace capacitor.

7. A circuit arrangement for producing a sawtooth current through a line deflection coil of an image display device comprising: a source of rectangular-shaped pulses at the horizontal line rate of the image display device; a field-effect transistor having gate, drain and source electrodes, connected so as to receive the output of said amplifying means at its gate electrode; and a resonant circuit comprising the line deflection coil coupled between said drain electrode and said source electrode.

8. A circuit arrangement for producing a sawtooth current through a line deflection coil of an image display device comprising: a source of rectangular-shaped pulse at the horizontal line rate of the image display device; a bi-directional switch connected so as to receive said rectangular-shaped pulses; and a resonant circuit comprising the line deflection coil coupled across the output of said bidirectional switching means.

9. A circuit arrangement for producing a sawtooth current through a line deflection coil of a image display device, which coil is part of a resonant circuit; switching means applying voltage to the deflection coil during the trace interval and the retrace interval; characterized in that: said switching means comprises a fieldeffect transistor.

10. A circuit arrangement substantially as herein particularly described with reference to Fig. 2 of the accompanying drawings.