GB2063515A - A control device for a vending machine - Google Patents

Abstract

Programmable timer circuits (153) in a vending machine are provided for the respective dispensing drive units (154-1 ... 154-m), e.g. for concentrated drink, sugar, milk and hot water. Drive signals are supplied to the respective drive units for a preset time in response to the outputs of the programmable timer circuits (153). Setting means (155, 156, (159), 161) are provided for programming a desired operation time and duration of each of the programmable timer circuits by setting a rise time after starting vending, and a fall time, by means of digital switches or the like whereby both the rise time and the fall time can be programmed as desired. A further setting means (159) is provided for setting each combination of the programmable timer circuits (153) (i.e. the drive units) to be used for vending of each article. Extra switches (160) are also provided for enabling increasing or decreasing of the quantity of a desired article constituent element according to the purchaser's preference. If the purchaser selectively operates a desired one of the extra switches (160), the operation time of the corresponding programmable time circuit (153) is modified and the quantity to be dispensed of the desired article constituent element thereby is adjusted. Accordingly, the purchaser can purchase an article of a desired flavour, such as, for example, coffee with slightly increased sugar. <IMAGE>

Description

SPECIFICATION A control device for a vending machine This invention relates to a control device for a vending machine.

In a vending machine of a type in which a cup and different materials, such as concentrated drink, sugar, and hot water are sequentially dispensed in preset time sequence and the different materials are mixed and served at each vending, a plurality of drive units are provided for respective article constituent elements such as a cup and different materials and the respective article constituent elements are dispensed in preset time sequence by controlling driving of these drive units at a preset timing.

A prior art control device for this type of vending machine is disadvantageous in that it is not suitable for general uses because timing of operation of each drive unit in the prior art control device is fixed. Since timing of dispensing article constituent elements is varied depending upon the kind of article and the type of vending machine, it has heretofore been necessary to provide a control device for exclusive use of each type of vending machine. In a vending machine for preparing and vending coffee, for example, nozzle diameters and dispensing speeds are different depending upon the type of vending machine and, accordingly, dispensing time of each material differs one type of vending machine from another even in a case of preparing coffee of the same flavour.For this reason, each type of vending machine requires a control device for its exclusive use so that the control device can enable each drive unit to operate at its proper time according to the type of vending machine. The requirement for provision of a control device for exclusive use of each type of vending machine hampers improvement of productivity with resulting difficulty in reducing costs of manufacture. For a proprietor of a vending.

machine, the entire control device must be replaced if an article to be vended is changed or mixing ratios of materials are changed. This is apparently uneconomical and the proprietor becomes reluctant to change an article or mixing ratios.

It is, therefore, an object of the present invention to provide a universal type of control device applicable to all types of vending machines in which a plurality of drive units are separately driven in a preset time sequence and a desired article is supplied by association of these drive units. This object is achieved by providing, for each drive unit, programmable timer means for controlling time for supplying a drive signal to each drive unit separately and individually and timer operation time setting means for programming the operation time of each programmable timer means as desired. This object is preferably achieved by further providing timer selection setting means for setting each combination of programmable timer means to be used for vending of each article.By setting operation times of respective programmable timer means and combination thereof as desired by these setting means, modes of driving the respective drive units are set as desired and the control device thereby is used as a universal type control device. Alternatively stated, the control device becomes applicable to any type of vending machine simply by changing contents of the respective setting means suitably. In addition, since the function of the vending machine can be changed by changing the contents of the setting means, an article to be vended or mixing ratios of materials can be changed simply and economically.

It is another object of the invention to provide a control device capable of adjusting quantity to be delivered of desired article constituent elements according to the purchaser's preference in a vending machine of a type in which article constituent elements including a cup and various materials are sequentially dispensed in a preset time sequence to prepare and vend a desired article. This object is achieved by providing extra switches for selecting increase or decrease of supply quantity of a desired article constituent element according to the purchaser's preference and changing the operation time of a corresponding one of the programmable timer means by the selective operation of the extra switches.

It is known that the vending machine comprises an up-down counter circuit adding amounts of deposited coins and subtracting a vend price and an amount to be paid out as change and a comparator circuit comparing the sum of deposited coins having been counted by the counter circuit with the vend price and thereupon judging whether an article is vendible or not.

According to the present invention, these circuits relating to coin controlling are collected together in a coin control unit and, aside from this coin control unit, the programmable timer means, the timer operation time setting means, the timer selection setting means and a control circuit relating thereto are collected together as a vend control unit. By separating the coin control unit from the vend control unit as described above, it is possible to replace the entire vend control unit by a vend control unit of a different construction, leaving the coin control unit as it is. This arrangement contributes to increasing applicability of the coin control unit.

Fig. 1 is a block diagram schematically showing an embodiment of the present invention; Fig. 2 is an electrical circuit diagram showing an example of a coin control unit of Fig. 1 in detail; Fig. 3 is an electrical circuit diagram showing an example of a vend control unit of Fig. 1 in detail; Fig. 4 is a time chart illustrating an example of a programmable timer circuit shown in Fig. 3; Fig. 5 is a block diagram schematically showing another example of the vend control unit of Fig. 1; Fig. 6 is a block diagram schematically showing another embodiment of the invention; and Fig. 7 is an electrical circuit diagram showing an example of a vend control unit of Fig. 6 in detail.

Referring first to Fig. 1, a coin control unit 10 is a part which counts an amount of deposited coins (or bills), compares it with vend price of an article to judge whether the article is vendible or not and pays out change after subtracting the vend price of the sold article from the amount of deposited coins. A coin detector 1 51 detects whether a deposited coin (or bill) is a true coin or a counterfeit one and generates coin detection signals CD1-0D3 corresponding to respective denominations of coins which have been found true. A change payout mechanism 1 52 pays out, upon receipt of a change payout signal PO,O, PO5 or PO1, a coin of a denomination corresponding to the change payout signal as change.

A vend control unit 1 50 comprises a programmable timer circuit 1 53. The programmable timer circuit 1 53 includes programmable timers T,Tm which correspond to m drive units 154-1 through 154-m provided on the vendor mechanism side. The drive units 154-1 through 154-m correspond to m kinds of constituent elements of the article (i.e., cup, concentrated drink, sugar, milk, hot water etc.). If a timer output (one of T10TmO) is produced by the programmable timer circuit 153, the drive unit (one of 154-1 through 154-m) corresponding to the timer is driven and an article constituent element corresponding to the drive unit is delivered out.The drive units 154-1 through 154m are composed of a solenoid, a pump, a motor or the like depending upon the nature of the corresponding article constituent element. One drive unit (154-1 through 154-m need not necessarily correspond to one article constituent element but one article constituent element may be dispensed by a combination of a plurality of drive units. A rise time setter 1 55 is provided for setting rise time of the respective timers T,--T, as desired. A fall time setter 1 56 is also provided for setting fall time of the these timers TgTm as desired. The operation time of the respective timers T1Tm is determined by the rise and fall times set by these setters 1 55 and 1 56.

The vend control unit 1 50 also receives outputs StSn of article selection switches 157-1 through 157-n corresponding to n kinds of articles from the vendor mechanism side and selectively stores a single one of these outputs if a plurality of signals S,Sn are produced.The stored signal (one of S1Sn) is applied to read address inputs of a vend price setting unit 1 58 and a timer selection setting unit 1 59. The vend price setting unit 1 58 stores preset vend prices (SPISPn) corresponding to respective articles by means of a diode matrix circuit or the like device and a vend price SPi (where "i ' is one of 1 through n) corresponding to a single article selection signal (one of S,'--S,') applied to the reading address input of the unit 1 56 is read out.The timer selection setting unit 1 59 stores preset combinations of timers TTm (i.e., the drive units 1 54-1 through 1 54-rn) used for vending of respective articles and one of time selection signals T,STmS representing the preset combinations of the timers is read out in response to the single article selection signal (one of S1'--Sn') applied to the reading address input of the unit 1 59. In the programmable timer circuit 153, timers (TtTm) corresponding to the timer selection signal (one of T,Tn) read from the timer selection setting unit 1 59 only are enabled.

An extra switch group 1 60 provided on the vendor mechanism side is a group of switches for increasing or decreasing quantity of constituent elements of the article such as concentrated drink, sugar and milk according to the purchaser's taste.

Outputs of the extra switch group 1 60 are applied to a quantity increase-decrease encoder 1 61. This encoder 161 outputs data representing increase or decrease of a particular article constituent element in accordance with manipulation of a switch in the switch group 160. The output data of the quantity increase-decrease encoder 161 causes the programmable timer circuit 1 53 to change the fall time of the timer so that the operation time of the timer for the particular article constituent element increases or decreases and the quantity of the article constituent element to be dispensed thereby is adjusted. A coin amount indicator 1 62 indicates an amount (or a balance) of deposited coins counted by the coin control unit 10.A clear switch 88 is a switch operated by the purchaser upon finishing purchasing for settling the account and receiving change, if any.

In the coin control unit 10 shown in Fig. 2, coin detection signals C101-CD3 provided by the coin detector 151 are applied to a pulse generator 163.

The pulse generator 163 generates coin pulses C10, C5 and C, in accordance with denominations of the coins. The coin pulses C,O, C5 and C, which correspond, for example, to 100 yen, 50 yen and 10 yen respectively are applied to up-down counters 21,22 and 23 corresponding to the respective denominations (100 yen, 50 yen and 10 yen) through OR gates 18, 19 and 20. The output of an OR gate 24 applied to up-down control inputs of the up-down counters 21, 22 and 23 initially is "O". The output "0" of the OR gate 24 instructs addition and the output "1" subtraction. Accordingly, the deposited coins are up-counted by the counters 21, 22 and 23 by the respective denominations. In case the vending machine is adapted to accept a bill (e.g. 100 yen), a device capable of detecting bills is used as the coin detector 1 51 and a counter for counting bills is additionally provided.

The counting outputs of the counters 21, 22 and 23 are applied to an addition circuit 25 in which a sum of the amounts of the deposited coins is computed. A signal representing a sum (or balance) K of the amounts of the deposited coins outputted by the addition circuit 25 is applied to a comparator circuit 26 and also to a coin amount indicator 1 62 in which the sum (or balance) of the amounts of the deposited coins is indicated. The addition circuit 25 produces an all-zero signal R0 when the sum (or balance) is zero. The all-zero signal R0 is supplied to respective circuits in the coin control unit 10 as a reset signal and also to the vend control unit 150 through the line 13.The all-zero signal R0 is also applied to article selection switches 157-1 through 157-n on the vendor mechanism side via a coupler 164 (Fig. 1). The coupler 164 supplies power to the switches 1 571 through 157-n when the all-zero signal R0 is "O", i.e., upon deposition of a coin.

The all-zero signal R0 supplied to the vend control unit 150 (Fig.3) through the line 13 is applied to memory circuits 184-1 through 184-n and 185-1 through 185-m. These memory circuits 184-1 through 184-n and 185-1 through 185-m are in a writing mode when the all-zero signal R0 is "1", i.e., in a stand-by mode (a state in which no coin is being deposited) and memorize in this writing mode set data of rise times TR1TRm and fall times TD,TDm of the timers T1Tm which have been set in the timer rise time setting unit 1 55 and the timer fall time setting unit 1 56.As the all-zero signal R0 has been turned to "O" upon deposition of a coin, the memory circuits 184-1 through 185-m enter a readout mode, delivering out the stored data TR1TRm and TD1TDm. The setting unit 155 includes a set of switches 1 55-1 through 1 55-n for suitably setting the rise times TR1TRm of the timers T1Tm, whereas the setting unit 156 includes a set of switches for suitably setting the fall time TD,TDm of the timers T1--Tm.Suitable rise times TR,TRm and fall times TD,TDm are preset by the switches 155-1 through 156-m in accordance with purpose of using the timers T,Tm By selectively depressing an article selection switch (one of 157-1 through 157-n) for a desired article, one of the article selection signals S,Sn is supplied to the vend control unit 150.In the vend control unit 150 shown in Fig. 3, the article selection signals S1--Sn are stored in SD flip-flops 168-1 athrough 168-n via AND gates 165-1 through 165-n and OR gates 166-1 through 166-n and 167-1 through 167-n. The AND gates 165-1 through 165-n are provided for causing a single one of the article selection signals S,Sn to be stored in one of the SD flip-flops 168-1 through 168-n. The AND gates 165-1 through 165-n receive time division timing pulses Ta1-Ta and a signal which is produced by combining all of the outputs of the SD flip-flops 168-1 through 168-n through an OR gate 169 and thereafter inverting it by an inverter 170.The SD flip-flops 168-1 through 168-n are driven by a clock pulse provided therefor to output the applied signals with delay of one bit time (i.e., one period of the clock pulse). The time division timing pulses Ta1Tan are pulses which are generated at each period of the clock pulse, i.e., the pulse Ta1 being generated upon lapse of the first one period, the pulse Ta2 upon lapse of a next one period etc., the pulse Tan being generated upon lapse of an n-th period. Accordingly, the pulses Ta1-Ta are generated every n-th period of the clock pulse.

Since the coin control unit 10 and the vend control unit 150 can be operated asynchronously with each other, different clock pulses may be used in the two control units. A clock pulse of a high rate may be used for the coin control unit 10 which generally performs a counting operation at a high speed whereas a clock pulse of a low rate (e.g. in the order of milliseconds) may be used for the vend control unit 150.

Since AND gates 165-1 through 165-n are enabled in time division by the pulses Ta1-Ta, only one of the article selection signals S1--Sn is selected at one time division time slot even if a plurality of article selection signals are simultaneously produced by simultaneous depression of a plurality of article selection switches 157-1 through 157-n. If, for example, the signals S, and Sn rise at the timing of the pulse Ta1, the signal S, only is selected by the AND gate 165-1 and the signal Sn is inhibited by the AND gate 165-n. Then, the SD flip-flop 168-1 storing the signal S, outputs a signal "1" at a next timing of the pulse Ta,. The output of the OR gate 169 thereby is turned to "1" and the output of the inverter 170 to "O" so that the AND gates 165-1 through 165-n are all disabled.Accordingly, the signal Sn is inhibited by the AND gate 165-n at a timing of the pulse Tan. Thus, a single article selection signal S, is selected. The output of the SD flip-flop 168-1 storing the selected signal S, is fed back to the AND gate 171-1. The AND gate 1 71-1 receives at another input thereof the article selection signal S, and the output of the AND gate 171-1 is fed back to the SD flip-flop 168-1 through the OR gates 166-1 and 167-1.

Accordingly, the selected single article selection signal (S,) only is held by the SD flip-flop (168-1) as long as the signal (S,) is present.

The single article selection signal (one of S1'Snl) held by one of the SD flip-flops (168-1) through 168-n is outputted by the vend control unit 160 and applied to the vend price setting unit 158 and the timer selection setting unit 159. In the vend price setting unit 158, data representing vend prices SP,SPn corresponding to the respective articles is set by a diode matrix circuit and the vend price SPi (one of SP,SPn) of the selected article corresponding to the input single article selection signal (one of S,'Snl) is read from the vend price setting unit. The data representing the read out vend price SPi is supplied through the line 10 to the comparator circuit 26 (Fig. 2) of the coin control unit 10. The line 14 actually consists of lines of a plurality of bits but is represented by a single line for convenience of illustration. In the timer selection setting unit 1 59, combinations of timers corresponding to respective articles are set by a diode matrix circuit and timer selection signals T1S--TmS representing times T1--Tm are read out in accordance with the input single article selection signal (one of S1'Snl). If, for example, timers T1, T2, T5 and T7 are used for vending of a particular article, the timer selection signals T1S, T2 S, T5 S and T7S representing these timers are simultaneously read out.

The comparator circuit 26 shown in Fig. 2 compares the vend price SP, supplied through the line 14 with the amount (or balance) K of deposited coins supplied from the addition circuit 25 and outputs an OK signal if the article is vendible. More specifically, the comparator circuit 26 receives a no change signal NC representing that coins stored to be paid out for change have run out from the change payout control circuit 30 and outputs a signal "1" (i.e., the OK signal) only when the amount (or balance) k of deposited coins is equal to the vend price SPi, i.e., k = SPi, whereas it outputs a signal "1" (i.e. the OK signal) if the amount (or balance) of deposited coins is equal to, or greater than, the vend price SPi, i.e., K > SPi.When there is no coin at all in a change coin (or coin to be returned to a depositer) storing tube (not shown) or the number of coins left in such tube is below a predetermined one, the no change signal NC is generated in response to a no-change detection signal NC' from the change payout device 152 (Fig. 1).

The OK signal outputted by the comparator circuit 26 is applied to the vend control unit 1 50 and loaded in a SD flip-flop 173 through an OR gate 172. The signal "1" loaded in the SD flip-flop 173 is self-held therein through an AND gate 174 and an OR gate 172. The AND gate 174 receives at other inputs thereof the outpute of the OR gate 169 and the output of a NAND gate 175. The output "1" of the OR gate 1 69 represents that the single article selection signal (one of 5,15,n) is stored in one of the SD flip-flops 168-1 through 168-n. The output of the NAND gate 175 is normally "1" and is turned to "0" when the OK signal falls to "0" after once rising to "1". Such falling of the OK signal from "1" to "0" sometimes occurs in a state in which coins for change have run out.If the condition "K=SPj" is satisfied in the comparator circuit 26 in the course of depositing coins in a state in which coins for change have run out, a signal "1" is stored in the flip-flop 1 73. If a coin is additionally deposited in this state, the condition becomes "K > SPi" so that the comparator circuit 26 does not produce an output "1" in the state in which coins for change have run out. Accordingly, the OK signal falls to "O". The AND gate 175 receives the output of the SD flip-flop 1 73 and a signal produced by inverting the OK signal by an inverter 176. As the OK signal is turned from "1" to "0", the NAND gate 175 is enabled and produces an output "0" and the SD flip-flop 173 is released from the self-holding state.Alternatively stated, the SD flip-flop 173 which has once been set to a vend possible mode is immediately reset if a state in which vending is not possible is detected later.

The output of the SD flip-flops 73 is applied to a timer 177 and the output of the timer 177 in turn is applied to AND gates 178-1 through 178n. The AND gates 178-1 through 178-n receive at other inputs thereof the Outputs of the SD flip-flop 168-1 through 168-n and a signal produced by inverting the all-reset signal AR by an inverter 17^9.

The outputs of the AND gates 178-1 through 178-n are fed back to the SD flip-flops 1 68-1 through 168-n through the OR gates 167-1 through 1 67-n. The output of the inverter 1 79 is normally "1". Accordingly, as the OK signal representing that vending is possible is stored in the SD flip-flop 173, the SD flip-flops 168-1 through 168-n are brought into a self-holding state so that storage of the single article selection signal (one of S'1Sln) is maintained.

The output of the timer 177 is supplied to the line 16 at the vend start signal VS and also to AND gates 180-1 through 1 80-m. The AND gates 1801 through 180-m receive at another input thereof the timer selection signals T1STmS read from the timer selection setting unit 1 59 and the output- of the AND gates 180-1 through 180-m are applied to memory circuits 181-1 through 181 -m.

The vend start signal VS outputted by the timer 177 brings the AND gates 180-1 through 180-m into conduction causing the timer selection signals T1STmS to be stored in the memory circuits 181-1 through 181-m.

The signal VS on the line 1 6 is applied to the timer 70 and the load control input of the register 71 of the coin control unit 10 (Fi. 2). The register 71 receives at its data input the data representing the vend price SPi read from the vend price setting unit 1 58 applied through the line 1 4e and this data is stored in the register 71 in accordance with the signal VS from the line 16.The signal VS on the line 1 6 is applied also to the extra switch group 160 (Fig. 1) provided on the vendor mechanism side to enable increase or decrease of article constituent elements by operation of the extra switch group 1 60. If a particular switch in the extra switch group 160 is depressed, the quantity increase-decrease encoder 1 61 outputs increase or decrease data Td1Tdm (Fig. 3) corresponding to the selected timers (T1Tm) in response to depression of the switch. The outputted increase or decrease data Td1TDm is stored in memory circuits 182-1 through 182-m in the vend control unit 150.The quantity increase-decrease encoder 161 is composed, e.g., of a diode matrix circuit.

The delay time TM1 of the timer 177 is set at, e.g. about 100 ms for waiting for complete stabilization of reading from the vend price setting unit 1 58 and the timer selection setting unit 1 59.

Thus, the completely stabilized read out outputs SPt and TISTmS are loaded in the register 71 and the memory circuits 181-1 through 181-n in response to the output signal VS of the timer 177.

Since the vend price setting unit 1 58 and the timer selection setting unit 1 59 are provided outside of the base plate or chip of the vend control unit 1 50 and are freely replaceable, there is likelihood that noise occurs in the rise portion of signals and reading of the signals therefore becomes instable in case these units 1 58 and 1 59 are accessed by the signals S1'Snl outputted by the vend control unit 1 50 and the read out outputs are fed back to the back plate or chip of the vend control unit 1 50 (or the coin control unit 10). It is for this reason that the timer 1 77 is provided.

The vend start signal VS applied to the coin control unit 10 through the line 1 6 is further delayed by the timer 70. The output of the timer 70 is applied to a readout control input of the register 71 and also to the memory collection control circuit 73 for bringing the circuit 73 into a money collection mode. The data SPi loaded in the register 71 in response to the signal VS from the line 1 6 is read therefrom in response to the output of the timer 70 and thereafter is applied to the money collection control circuit 73. Upon receipt of a signal "1 " from the timer 70 through a line 74, the money collection control circuit 73 subtracts the vend price SPi stored in the register 71 from the counts of the counters 21 - 23 in which the amount of the deposited coins is computed.This subtraction is made by converting the amount of the coins equivalent to the vend price SPi to a sum of lower denomination coins, utilizing counts of respective denominations stored in the respective counters. More specifically, a count K10 of the counter 23 for the 10-yen coin which is the smallest denomination coin is compared with the vend price SP provided by the register 71. If the count K10 is larger than or equal to the vend price SPi i.e., K10 > = SPi, a signal "1" is supplied to the OR gate 24 through a line 75 to bring the counter 23 into a subtraction mode, pulses corresponding to the vend price SPi are provided on a 10-yen line L1, and the pulses on the line L1 are applied from the OR gate 20 to the counter 23 for subtractingf the vend price SPi.If the count K10 is smaller than the vend price Spi, e i.e., K10 < SPi, the count of the counter 22 for the 50-yen coin is transferred to the 10-yen coin counter 23, that is, 50 yen is subtracted from the amount of coins deposited in the 50-yen counter 22 and this 50 yen is added to the count of the counter 23, this operation being repeated until the condition K10 > SPi is satisfied. If the subtraction from the count of the 50-yen counter 22 is not sufficient, the count of the 100-yen counter 21 is transferred to the count of the 10-yen counter 23. Upon satisfaction of the condition K10 > SPi by transferring the amount of the 100-yen or 50-yen coins to the count of the 10-yen counter, the vend price SPi is subtracted from the count of the counter 23.The above described operation enables a balance to be left in counters for coins of large denominations among the counters 21 - 23 so that the coins of large denominations can be paid out as change. Alternatively stated, coins of a small denomination which are more frequently used for change than coins of large denominations can be stored in the coin box to a maximum extent possible whereby shortage of change can be prevented.

On the other hand, the output of the timer 70 is fed back as a timer start signal ST to the vend control 1 50 through the line 17 and is stored in a memory circuit 1 83. Upon loading of the timer start signal ST in this memory circuit 183, counting of time in the programmable timer circuit 1 53 is started. The delay time TM2 by the timer 20 is set to have a suitable time length, e.g. 300 ms, taking into account time required for completely loading data of the vend price SPi into the register 71.

The programmable timer circuit 153 comprises a counter 186 for counting the rise time, a counter 187 for counting the fall time, comparators 188-1 through 188-n for comparing rise time setting data TR1TRm stored in memory circuits 184-1 through 1 84-m with contents of the counter 186, comparators 189-1 through 189-m for comparing fall time setting data TD1TDm with contents of the counter 187, AND gates 190-1 through 190m and 191-1 through 191 -m for combining outputs T1OTmO of the respective timers T1Tm in accordance with the outputs of these comparators 189-1 through 189-m, and adders 192-1 through 192-m for modifying the fall time TD1TDm by the increase-decrease data Td1Tdm stored in the memory circuits 182-1 through 182-m. As the timer start signal ST is stored, AND gates 193 and 194 are enabled and count clock pulses CP1 and CP2 are applied to the counters 186 and 187 through the AND gates 193 and 194. The counters 186 and 187 therefore start counting.

The rise detecting comparators 188-1 through 1 88-m produce a signal "1" if the count CR of the counter 1 86 is equal to or greater than the rise time setting data TR1TRm (i.e., TR1 I CR through TRm 6 CR) and produced a signal "0" if the count CR is smaller than the data TR,--TR,.

Accordingly, as shown in Fig. 4, the output of the comparator 188-1 constituting the timer T1,for example, is "0" from a time point at which the timer start signal ST is generated until the rise time TR1 has elapsed and is "1" thereafter.

The fall detecting comparators 189-1 through 189-m produce a signal "1" if the count CD of the counter 187 is equal to or smaller than the fall time setting data TD1TDm (for convenience of description, the increase-decrease data Td1Tdm is assumed to be zero) (i.e., TD, C through TDm > CD) and produce a signal "0" if the count CD is greater than the data Td,--Td,.

Accordingly, as shown in Fig. 4, the output of the comparator 189-1 constituting the timer1 is "1 " from the time point at which the timer start signal ST until the fall time TD1 has elapsed and is "O" thereafter.

The outputs of the comparators 188-1 through 188-m are supplied to AND gates 190-1 through 190-m. The AND gates 190-1 through 190-m receive at another input thereof the time selection signals T1STmS stored in the memory circuits 181-1 through 181 -m. The outputs of the AND gates 190-1 through 190-m are applied to AND gates 191-1 through 191-m. The AND gates 1911 through 1 91 -m receive at another input thereof the outputs of the comparators 189-1 through 1 89-m. Accordingly, some of the outputs of the comparators 188-1 through 188-m corresponding to the timers (T1Tm) in which the timer selection signals T1STmS are present are selected by the AND gates 190-1 through 190-m and the selected output of the comparators 188-1 through 188-m and the outputs of the comparators 1 89-1 through 189-m are ANDed by AND gates 191-1 through 1 91-m. The Outputs of the AND gates 121-1 through 191 -m are supplied to the drive units 154-1 through 154-m (Fig. 1) as timer Outputs T1OTmO through AND gates 195-1 through 195-m. The AND gates 195-1 through 1 95-m receive at another input thereof the output of the memory circuit 1 83 storing the timer start signal ST.

Accordingly, as shown in Fig. 4, a signal which rises to "1" when the preset timer rise time TR1TRm has elapsed from the time point when the timer start signal ST is generated and falls to "0" when the preset timer fall time TD1TDm has elapsed appears in the outputs T1OTmO with respect only to the timers (T1Tm) which have been selected by the timer selection signals T1STmS. The drive units 154-1 through 154-m (Fig. 1) provided on the vendor mechanism side are driven while the corresponding timer outputs T1OTmO are "1".By these arrangements, the constituent elements of the selected article are chronologically controlled by the timer Outputs T1OTmO and dispensaed one by one whereby the selected article is prepared.

The adders 192-1 through 192-m add (or subtract) the quantity increase-decrease data Td1Tdm stored in the memory circuits 182-1 through 1 82-m to the timer fall time setting data TD1TDm stored in the memory circuits 185-1 through 1 85-m thereby modifying the timer fall time setting data to be inputted to the comparators 189-1 through 189-m, The data Td1Tdm is given in a positive value when it is indicating increase in the quantity and in a negative value when it is indicating decrease in the quantity. In case of increasing the quantity, therefore, the fall time TD1--TDm is prolonged whereas in case of decreasing the quantity, the fall time TD1TDm is shortened.Values of the data Td1Tdm corresponding to the timers which are irrelevant to the manipulated switches of the extra switch group 1 60 are zero so that the timer fall times (TD1TDm) corresponding to such timers are not modified.

Arrangements are made so that the all-reset signal AR for resetting the memory circuits 181-1 through 181-m, 182-1 through 182-m, 183 and the counter 186 and 187 in the vend control unit 150 may be generated about at a time point when preparation of one article has been completed. By way of example, the timer outputs T1OTrn0 of the AND gates 195-1 through 195-m are all applied to an OR gate 196 and the output of this OR gate 196 is stored by a memory circuit 1 98.

The output of the memory circuit 198 and a signal produced by inverting the output of the OR gate 196 by an inverter 200 are applied to an AND gate 199 and the output of the AND gate 199 in turn is applied to a timer 201. By these arrangement, the AND gate 199 produces a signal "1" when all of the timer Outputs T1OTmO have been turned to "0" after these Outputs T1O--TmO have been generated, i.e., when the operation times of all of the timers have elapsed.

This output "1 " of the AND gate 199 is delayed by a preset time length by the timer 201 and the output of the timer 201 is used as the all-reset signal AR. By setting the delay time of the timer 201 to a sufficiently long time, untimely generation of the all-reset signal AR from the timer 201 can be prevented in a case where the AND gate 199 is temporarily enabled before rising of one timer output by falling of all other timer outputs which have risen prior to the timer output.

The all-reset signal AR resets the memory circuit 1 98 also and further the article selection signals S1'Snl stored in the SD flip-flops 168-1 through 168-n. Upon cancellation of the signals S1'Snl,, the output of the OR gate 196 is turned to "0" whereby the self-holding state of the SD flip-flop 173 is reset. The manner of generating the all-reset signal AR is not limited to the one illustrated in Fig. 3. For example, the output of the memory circuit 183 may be inputted to a timer in which a sufficiently long delay time is set and the output of this timer may be used as the all-reset signal AR.Alternatively, an arrangement may be made so that a signal representing that an article preparation of which has been completed has been taken off by the purchaser (e.g. a cup-off signal representing that a cup containing an article has been taken off) is received from the vendor mechanism and the all-zero signal AR is generated in response to this signal.

By repeatedly depressing the article selection switch, vending can be continuously made several times within the amount of the deposited coins.

The memory collection control circuit 73 is operated each time the vending is made for substracting the vend price from the amount of the deposited coins stored in the counters 21 - 23.

When the purchasing of the article is to be ended, the clear switch 88 is depressed to cause a clear signal to be stored in a memory circuit 89. The clear signal stored in the memory ciruit 89 is applied to a timer 91 through an AND gate 90.

The AND gate 90 receives at another input thereof a signal produced by inverting the output of the timer 70 by an inverter 92 so that a clear mode will not be brought about immediately even if the clear switch 88 is despressed when the money collection control circuit 73 is in operation. The output of the timer 91 is applied to the change payout control circuit 30 as a change payout command signal. The change payout control circuit 30 effects, upon receipt of the change payout command signal from the timer 91, a control operation for paying out, as the change balances of respective denominations left in the respective counters 21 -23 in such denominations (i.e., the circuit 30 outputs change payout signals PO10, P05 and PO1 corresponding to the denominations of the balances).

Simultaneously, a signal "1" is supplied through the OR gate 24 to the counters 21 - 23 to bring about the subtraction mode and pulses corresponding to the amount having been paid out as the change are supplied to the counters 21-23 through the OR gates 18, and 20 to subtract the amount of change from the counters 21 - 23. In this manner, the change is paid out until the contents of the counters 21 - 23 are reduced to zero. Upon reaching of the contents of the counters 21 - 23 to zero, the all-zero signal R0 is generated and the memory circuit 89 thereby is reset.The timer 91 is provided for setting a waiting time (TM;) so that acceptance of a thrown-in coin into a coin tube will be ensured in a case where the clear switch 83 is depressed immediately after the coin has been thrown in.

In the programmable timer circuit 153, a single counter may be used commonly for the rise time counter 186 and the fall time counter 187. The clock pulses CP1 and CP2 for counting may be made variable in which case the operation time of the timers T1Tm can be uniformly changed. The entire construction of the programmable timer circuit 1 53 is not limited to the one illustrated in Fig. 3 but may be of any other construction if it comprises a plurality of timers of functions of the timers T1Tm and the rise time and fall time of these timers can be varied as desired. The fall time TD1TDm may be set from a time point of rising.

The vend price setting unit 158, the timer selection setting unit 159, the quantity increasedecrease encoder 161 may be composed not only of a diode matrix circuit but of a switch group and a memory circuit capable of both writing and reading as in the case of the timer fall time setting unit 155.

In the embodiment shown in Fig. 3, the timer operation of the programmable timer circuit 1 53 is started in response to the timer start signal ST provided through the line 17. The manner of starting of the timer operation, however, is not limited to the above described one. A safer article dispensing operation will be ensured by starting the timer operation by a cup falling confirmation signal. By way of example, a programmable timer circuit 1 53c for cups only is provided separately from the programmable timer circuit 1 53 for other article constituent elements (materials) and the programmable timer circuit 1 53c for cups is started by the timer start signal ST.There are also provided a timer rise time setting switch 155C, a timer fall time setting switch 1 55D and memory circuits 1 84C and 1 85C respectively for cups only and, in accordance with rise time TRc and fall time TDc set by these switches, a timer output TcO for dropping a cup is generated by the timer circuit 1 53c. A drive unit for dropping a cup (not shown) is driven by this timer output TcO. When the cup has fallen on a predetermined place, a cup falling confirmation signal CUPON is provided from the vendor mechanism side and is stored in a memory circuit 202. An AND gate 203 receives the timer start signal ST stored in the memory circuit 183 and the cup fall confirmation signal CUPON stored in the memory circuit 202.The output of the AND gate 203 is applied to the programmable timer circuit 1 53 to start the timer counting in the circuit 153. The programmable timer circuit 153 is of the same construction as that shown in Fig. 3, the output of the AND gate 203 being applied thereto together with the outputs of the AND gates 1 93 and 1 94 (Fig. 3). According to this arrangement, the timer outputs T1OTmO are generated only after the cup has completely fallen on the predetermined placed and the respective materials are dispensed in the cup without fail so that safety of the article dispensing operation is ensured.The cup falling confirmation signal CUPON may be generated only when not only the condition that falling of the cup has been confirmed but other conditions such that hot water is above a predetermined temperature and all materials are sufficiently stored have all been satisfied. An arrangement may be further made so that in a case where the cup falling confirmation signal CUPON is not generated in a preset time after the generation of the timer start signal ST, such a state is regarded as abnormal and the all-rest signal AR is produced and a clear signal is supplied to the change payout control circuit 30 (Fig. 2) to automatically return a deposited coin.In the circuit shown in Fig. 3, a programmable timer circuit for cups only is not separately provided and one of the timer Outputs T1OTmO corresponds to a drive unit for dispensing cups.

The present invention is applied not only to vending machines for preparing foods and drinks but to vending machines in general in which suitable combinations of a plurality of drive units are driven in a preset time sequence for dispensing an article.

According to the invention, relationship between an article selected by the article selection signals (157-1 through 157-n) and the drive units (i.e., timers T1Tm) employed for vending the selected articles can be readily changed by changing the set state in the timer selection setting unit 1 59. Further, driving time of the respective drive units (timings of starting and finishing of driving) i.e., the operation time of the timers T,--T, can be readily and freely changed by changing the set states in the timer rise time setting unit 1 55 and the timer fall time setting unit 156.

Accordingly, the control device made according to the invention is applicable to all types of vending machines only by suitably changing setting states in the respective setting units. Since the circuit portion other than the setting units (i.e., the coin control unit 10 and the vend control unit 150) need not be changed at all no matter what type of vending machine it may be applied to, the device according to the invention is advantageous in a large scale production of such circuit portion in the form of an integrated circuit and, as a result, reduction in the manufacturing cost can be achieved. Moreover, the control device can carry out change in vendible articles or mixing ratios of each article simply and economically, for functions of a vending machine can be changed simply by changing the set states in the setting units.

The coin control unit 10 performs addition of deposited coins, subtraction of the vend price, comparison of the deposited coins and the vend price, change payout and other control operations which are irrelevant to and independent from the functions of the vend control unit 1 50. Besides, tne coin control unit 10 and the vend control unit 1 50 operate asynchronously with each other.

Accordingly, this coin control unit 10 is applicable to a vending machine which is of a different type from the vending machine including the vend control unit 1 50 which carries out a combination of time limited operations. Fig. 6 shows an example in which the coin control unit 10 of the same type as that employed in the embodiment shown in Fig. 1 is applied to a vending machine of a type in which one piece of article (e.g. a can of drink, a pack of cigarettes or a ticket) is dispensed by a single drive of a motor or a solenoid.

Referring to Fig. 6, details of constructions of the coin control unit 10 are the same as those shown in Fig. 2. A clock pulse used in the coin control unit 10 is not illustrated but it should be noted that counting and other operations are controlled in synchronism with a clock pulse of a high rate in the order of microseconds. A coin detection 151, a change payout device 152, an amount indicator 1 62 and a clear switch 88 are also of the same construction as those shown in Fig. 1.

As in the embodiment shown in Fig. 1, the coin control unit 10 and the vend control unit 11 are electrically connected by lines 13 through 1 7. The vent control unit 11 delivers vend possible signals V1Vn to article dispensing circuits 12-1 through 12-n in accordance with comparison in the coin control unit 10, receives article selection signals S1Sn from the circuits 12-1 through 12-n, delivers vend drive signals M1Mn to one of the article dispensing circuits 12-1 through 12-n corresponding to a selected article and instructs money collection and change payout controls. The vend control unit 11 is controlled by a clock pulse of a low rate (e.g. in the order of milliseconds) which is asynchronous with the clock pulse used in the coin control unit 10.A vend price setting unit 28 which is attached to the vend control unit 11 is provided for setting vend prices of articles.

In Fig. 7, the vend price setting unit 28 consists of a set of switches 28-1 through 28-n corresponding to n kinds of articles. Vend prices SP1SPn of n kinds of vendible articles are respectively set by these switches 28-1 through 28-n. Signals representing the prices SP1SPn are applied to a memory and delivery circuit 29 in the vend control unit 1. When the all-zero signal R0 supplied from the coin control unit 10 (Fig. 2) through the line 13 is "1", i.e., when the vending machine is in a stand-by mode, the vend prices SP1SPn having been set by the switches 28-1 through 28-n are loaded in the memory and delivery circuit 29 and stored therein.When the all-zero signal R0 is "0", the vending machine is in a readout mode and all or a selected one of the vend prices SP1SPn is read out under predetermined conditions. The readout signals representing vend prices (SP1SPn) are applied to the comparison circuit 26 through the line 14.

Conditions for reading the memory and delivery circuit 29 are determined by presence or absence of article selection signals S1'Snl. The article selection signals S1'Snl initially are all "0" and, at this time, the signals representing the vend prices SP,SPn of the respective articles are successively read out on a time-shared basis in accordance with time division time pulses Ta1Tan.

When the article has been selected and the vending machine has entered a vend mode, a single article selection signal (one of the signals Sr'Snl) is generated and a signal representing a single vend price corresponding to this selected article (one of - the vend prices SP,SPn) only is read out. The timing pulses Ta1-Ta for the time sharing operation are successively generated at a timing of a clock pulse Ta used for controlling the circuits in the vend control unit 11. This clock pulse Ta has a relatively long pulse period of several milliseconds. The timing pulses Ta1-Ta likewise have a pulse width of several milliseconds and their period is n times as long as that of the clock pulse Ta.In the vend control unit 11, time division timing pulses Tb1Tbn are also used in correspondence to the timing pulse Ta1Tan. The timing pulses Tb1Tbn are pulses of a narrow pulse width which build up with a certain length of delay to the pulses Ta1-Ta and of a pulse period which is of the same length as the clock pulses Ta1-Ta.

As the coin has been deposited and the count K of the addition circuit 25 in the coin control unit 10 (Fig. 2) has amounted to a value other than 0, the all-zero signal R0 turns to "0" and the memory and delivery circuit 29 is changed to a readout mode.Since the article selection signals 51'5n' initially are all "0", the respective vend prices SP1SPn are successively read out on a time shared basis from the circuit 29 in accordance with the timing pulses Ta1Tan. The comparison circuit 26 in the coin control unit 10 (Fig. 2) compares the vend price SP provided on the line 14 with the output K (the amount of the deposited coin or coins as described previously and, when vending is allowable, it outputs a signal "1" (OK signal) on the line 1 5.

The output of the comparison circuit 26 is supplied from the line 1 5 to SD flip-flops 32-1 through 32-n corresponding to the respective articles via AND gates 31-1 through 31-n and OR gates OR 116-1 through 116-n. Each of the AND gates 31-1 through 31-n receives at another input terminal thereof a corresponding one of the time division timing pulses Tb1Tbn. The AND gates 31-1 through 31-n are enabled in a time sharing manner in accordance with the time shared comparison of the amount K of the deposited coin and the respective vend prices SP1SPn in the comparison circuit 26 and all of the SD flip-flops corresponding to vendible articles with a range of the amount K (i.e., one or more of the SD flip-flops 32-1 through 32-n) are set. The above described comparison of the amount of the deposited coin with all of the vend prices SP1SPn is hereinafter referred to as "first comparison". Outputs of the flip-flops 32-1 through 32-n are delivered out as vend possible signals V1Vn via AND gates 35-1 through 35-n. The output of an inverter 36 applied to other inputs of the AND gates 35-1 through 35-n initially is "1".

Each of the SD flip-flops 32-1 through 32-n driven by the clock pulse Ta and outputs the applied signal after delaying it by one bit time (i.e., one period of the clock pulse Ta). The outputs of the flip-flops 32-1 through 32-n are fed back to the inputs thereof via self-holding AND gates 11 7- 1 through 11 7-n and the OR gates 116-1 through 11 6-n and self-held in the SD flip-flops 32-1 through 32-n. Upon turning of outputs of NOR gates 34-1 through 34-n applied to other input terminals of the AND gates 117-1 through 117-n to "0", the self-holding of the Outputs of the flipflops 32-1 through 32-n is inhibited and the flipflops 32-1 through 32-n are reset. The outputs of the NOR gates 34-1 through 34-n are normally "1".

The vend possible signals V1Vn are applied to circuits of respective article selection switches (not shown) provided in respective article dispensing circuits 12-1 through 12-n in the vendor unit 12 (Fig. 6) thereby enabling selection of articles by the respective switches. Article selection signals S1Sn obtained by selective operation of the article selection switches are fed back to the vend control unit 11.

Referring to Fig. 7, the article selection signals S,--S, are applied through AND gates 45-1 through 45-n, OR gates 46-1 through 46-n and 47-1 through 47-n to SD flip-flops 48-1 through 48-n and stored therein. The AND gates 45-1 through 45-n function to cause a single article selection signal (one of S1Sn) only to be stored in the SD flip-flop 48-1 through 48-n, receiving the time division timing pulses Ta,'--Ta,' and an output of a NOR gate 49 through which all outputs of the SD flip-flops 48-1 through 48-n are combined together.The outputs of the SD flipflops 48-1 through 48-n are supplied to the memory and delivery circuit 29 as article selection signals S1'Snl. The time sharing clock pulses Ta,'--Ta,' are pulses of the same width and period as the time sharing clock pulses Ta1-Ta but appear one bit time in advance of the clock pulses Ta1Tan, for the signal is delayed by one bit time through the SD flip-flops 48-1 through 48-n.Accordingly, the pulse Ta1, appears synchronously with Tan, the pulse Ta2, appears synchronously with Ta1'... and the pulse Tan' -appears synchronously with Tan.1 Since the AND gates 45-1 through 45-n are enabled in a time sharing manner by the pulse Ta,'--Ta,', only one signal among the article selection signals S1Sn is selected at one time slot even if a plurality of article selection signals S1Sn are simultaneously generated by simultaneous depressing of a plurality of article selection switches.

If, for example, the signals S1 and Sn have built up at the timing of the pulse Ta1,, the signal S1 only is selected by the AND gate 45-1 and the signal Sn is inhibited by the AND gate 45-n. Then, as a signal "1" is outputted fron the SD flip-flop 48-1 in which the signal S1 has been loaded at the timing of the pulse Ta2', i.e., the pulse Ta1, the output of the NOR gate 49 falls to "0" thereby disabling all of the AND gates 45-1 through 45-n.

Accordingly, upon arrival of the timing of the pulse Tan', the signal S is inhibited by the AND gate 45n. Thus, the single article selection signal S1 is selected. The output of the SD flip-flop 48-1 storing the selected signal S1 is fed back to an AND gate 50-1. The AND gate 50-1 receives at another input thereof the article selection signal S1. The outpuf of the AND gate 50-1 is fed back to the SD fli-flop 48-1 through the OR gates 46-1 and 47-1. The selected article selection signal S therefore is held by the SD flip-flop 48-1 so long as the signal S is present.It should be noted that the clock pulses Ta and the time division timing pulses Ta,'--Ta,' are of such a high rate compared with the switch depressing operation by a human finger that the signal S1 circulates several times within the SD flip-flop 48-1 within the matter of about one second during which the signal S1 is produced by depression of the switch.

On the other hand, all of the article selection signals S1Sn are applied to an OR gate 51. Upon receipt of any one of the signals S1Sn, the output of the OR gate 51 rises to "1" which is applied to a rise detection circuit 52. The rise detection circuit 52 detects rise of the signals S1Sn and thereupon generates one shot of pulse having predetermined pulse width. The rise detection pulse from the circuit 52 is supplied through an OR gate 53 to the NOR gater 34-1 through 34-n, thereby disabling all of the selfholding AND gates 117-1 through 11 7-n while resetting the flip-flops 32-1 through 32-n.

Consequently, the vend possible signals V1Vn having been stored in the flip-flops 32-1 through 32-n as a result of the above described "first comparison" are all cancelled.

Among the article selection signals S1'Snl outputted from the SD flip-flops 48-1 through 48n, only a single signal corresponding to the selected article is "1" and the rest of the signals S1'Snl are all "O". These signals S1'Snl are supplied to the memory and delivery circuit 29.

The reading condition of the circuit 29 changes when one of the signals S1'Snl rises to "1" and the single vend price signal (one of the signals SP1SPn) corresponding to the selected article only is read out. The read out signal is applied to the comparison circuit 26 (Fig. 2) through the line 14. The comparison circuit 26 compares the amount (or balance) of the deposited coin with the vend price of the selected article (one of SP1SPn) and produces a signal "1" on the line 1 5 if the vending is possible. This comparison is hereinafter referred to as "second comparison".

The signal "1" on the line 15 is stored in one of the flip-flops 32-1 through 32-n corresponding to the selected article in accordance with the timing pulses (one of the timing pulses Tb1Tbn) corresponding to the article.

In the circuit shown in Fig. 1, the AND gates 66-1 through 66-n receive the outputs of the flip flcps 32-1 through 32-n and the outputs S1,D' ot the SD flip-flops 48-1 through 48-n. If, accordingly, the selected article has been found vendible as a result of the second comparison, a signal "1" is outputted form one of the AND gates 66-1 through 66-n corresponding to the selected article. The outputs of the AND gates 66-1 through 66-n are applied to AND gates 67-1 through 67-n and also to an OR gate 68. An output "1" of the OR gate 68 is delayed by a timer 69 by a preset time length TM1 and thereafter is provided on the line 1 6 as a vend start signal VS.

The output VS of the time 69 is applied commonly to self-holding AND gates 93-1 through 93-n of the flip-flops 48-1 through 48-n provided for storing the article selection signals and used to hold the storage of the single article selection signal (one of S1'Snl) in one of the flip-flops 481 through 48-n.The output VS of the timer 69 is inverted by the inverter 36 and thereby disables the AND gates 35-1 through 35-n and inhibits the vend possible signals V1Vn. To other inputs of the AND gates 93-1 through 93-n are applied the outputs of the SD flip-flops 48-1 through 48-n, outputs V1,Vn' of the SD flip-flops 32-1 through 32-n storing the vend possible signals and also a reset signal from an inverter 11 8. The output of the inverter 11 8 normally is "1" and is turned to "0" in the reset mode.Thus, upon turning of the single vend possible signal among the signals V,'Vnl to "1" by the second comparison and resulting generation of the vend start signal VS, the signal (one of S,'Snl) stored in one of the SD flip-flops 48-1 through 48-n corresponding to the single vend possible signal is self-held.

The vend start signal VS outputted by the timer 69 is also applied through the line 1 6 to a timer 70 of the coin control unit 10 (Fig. 2) and a load control input of a register 71. As described previously, the coin control unit 10 starts the operation of the money collection control circuit 73 in response to the signal produced by delaying the vend start signal by the timer 70 thereby subtracting the vend price of the selected article from the amount of the deposited coins.

On the other hand, the output of the timer 70 is fed back to the vend control unit 11 (Fig. 7) through the line 17 to enable AND gates 67-1 through 67-n and cause the outputs of the AND gates 66-1 through 66-n to be stored in memory circuits 72-1 through 72-n.

In the foregoing manner, a signal "1" is stored in a single memory circuit (one of the circuits 72-1 through 72-n) corresponding to the selected article and the output of this single memory circuit is applied to the article dispensing circuits 12-1 through 12-n (Fig. 6) of the vendor unit 12 as vend drive signals M1Mn. The article dispensing circuits 12-1 through 12-n drive an article dispensing drive unit (e.g. a solenoid or motor) to dispense a piece of article when the corresponding vend drive signals M1Mn are turned to "1". Accordingly, a selected article is dispensed by turning of a single vend drive signal (one of M1Mn) corresponding to the selected article to "1".

When the vend drive signal has been outputted from one of the memory circuits 72-1 through 72n, an OR gate 76 to which all of the outputs of the memory circuits 72-1 through 72-n are applied produces an output "1" which output in turn is applied to timers 77 and 78. The timer 77 is provided for ensuring a sufficient operation time of a solenoid in case the solenoid is employed as the article dispensing drive unit in the article dispensing circuits 12-1 through 12-n. Delay time TM3 of the timer 77 is set, for example, at about 50n ms. The output of the timer 77 is applied as the all-reset signal AR to reset imputs of the memory circuits 72-1 through 72-n through a switching gate 79.The switching gate 79 selects the output of the timer 77 in case a solenoid is used as the article dispensing drive unit whereas it selects the output of an OR gate 80 in case a motor is used as the drive unit. The switching gate 79 can be constructed to fixedly select either one of these Outputs once the construction of the drive unit has been determined. If, accordingly, the solenoid is used as the drive unit, the single memory circuit (one of the memory circuits 72-1 through 72-n) is reset and the vend drive signal (one of ,M1Mn) falls to a "0" level upon lapse of the time TM3 of the timer 77 counting from the rise of the vend drive signal.

In a case where a solenoid is used as the drive unit, the operation time thereof is completely secured by the timer 77, whereas in a case where a motor is used, a time interval until a carrier switch of the motor is stabilized at a switching time is secured by the timer 81.

A CIN signal outputted from an AND gate 84 is supplied to a carrier switch (not shown) of an article dispensing motor (not shown) in the article dispensing circuits 12-1 through 12-n. Further, a COT signal representing ON-OFF states of this carrier switch is supplied to an AND gate 85 in the vend control 11. When this carrier switch is operating in a normal state, the carrier switch is changed over after lapse of some time from a time' point when the vend drive signals M,Mn have risen and the COT signal falls to "O". A fall detection circuit 86 detects the fall of the COT signal and thereby starts a timer 81. Upon lapse of delay time TM4 of the timer 81, the all reset signal AR is generated through an OR gate 80 and a switching gate 79 to reset the memory circuits 72-1 through 72-n (i.e., the vend drive signals M1Mn) Timer 78 and a rise detection circuit 87 are also provided for preventing an erroneous operation of the carrier switch but detailed description thereof will be omitted for the operations of these circuits are not so important for the subject matter of the present invention.

Claims (11)

1. A control device for a vending machine of a type in which a plurality of drive units are separately and individually driven in a predetermined time sequence to provide an article by association of these drive units characterized in that said control device comprises: programmable timer means provided for respective drive units for individually controlling time for supplying a drive signal to the respective drive units; and Timer operation time setting means for programming operation time of each of the programmable timer means as desired; said programmable timer means being individually operated in a vending mode at times programmed by said timer operation time setting means and said drive units being driven individually in response to outputs of the corresponding programmable timer means.

2. A control device as defined in claim 1 wherein said control device further comprises timer selection setting means for setting each combination of a plurality of the programmable timer means to be used for vending of each article and that operations of only the plurality of programmable timer means set for the specific article by said timer selection setting means are made effective to individually drive the corresponding drive units with a set time relation in response to outputs of said plurality of effectively operated programmable timer means.

3. A control device for a vending machine as defined in claim 1 wherein said timer operation time setting means comprises timer rise time setting means for individuallly programming, as desired, a rise time from a set time for starting vending till a time point at which each of the drive signals corresponding to the respective drive units is to rise and timer fall time setting means for individually programming, as desired, a fall time from the set time for starting vending till a time point at which each of said drive signals is to fall, and each of said programmable timer means comprises rise timer means for counting the rise time programmed by said timer rise time setting means from the set time for starting vending and fall timer means for counting the fall time programmed by said timer fall time setting means from the set time for starting vending.

4. A control device as defined in claim 3 wherein said timer rise time setting means and said timer fall time setting means are respectively composed of a plurality of digital switches which set data corresponding to a desired rise time and a desired fall time, and said rise timer means and said fall timer means comprise counter means for counting a predetermined clock pulse from the set time for starting vending and a plurality of comparators for comparing contents of said counter means with the data of the rise time and the data of the fall time set by said respective setting means.

5. A control device for a vending machine as defined in claim 4 wherein said counter means consists of a first counter counting a clock pulse for rising and a second counter counting a clock pulse for falling and said plurality of comparators compare the respective rise time data with contents of said first counter and the respective fall time data with contents of said second counter.

6. A control device for a vending machine as defined in claim 1 wherein said timer operation time setting means comprises timer rise time setting means for individually programming, as desired, a rise time from a set time for starting vending till a time point at which each of the drive signals corresponding to the respective drive units is to rise and timer fall time setting means for individually programming, as desired, a fall time from a rise time point of each of the drive signals till a time point at which the drive signal is to fall, and each of said programmable timer means comprises rise timer means for counting the rise time programmed by said timer rise time setting means from the set time for starting vending and fall timer means for counting the fall time programmed by said timer fall time setting means from the rise time point of each of said drive signals.

7. A control device for a vending machine as defined in claim 1 or 2 individually driving the drive units for dispensing respective article constituent elements such as a cup and different materials in a preset time sequence wherein said control device further comprises: extra switches for selecting increase or decrease of a desired article constituent element or elements according to a purchaser's preference; quantity increase-decrease data generation means for outputting quantity increase data or quantity decrease data in accordance with the selective operation of one or more of said extra switches; and means for modifying the operation time of one or more of said programmable timer means in response to the data outputted by said quantity increase-decrease data generation means, whereby quantity to be dispensed of the desired article constituent element or elements is modified according to the purchaser's preference.

8. A control device for a vending machine including counter means for adding amounts of deposited coins together and subtracting a vend price of an article sold and an amount of paid out coins from a total amount of the deposited coins, comparator means for comparing present counting contents of the counter means with set vend prices of respective articles, vend price setting means for previously setting vend prices of the respective article, article selection switches corresponding to respective articles, and a plurality of drive units for individually dispensing respective article constituent elements such as a cup and different materials to be mixed together characterized in that said control device further includes a vend control unit which comprises:: programmable timer means provided for the respective drive units for individually controlling time for supplying a drive signal to the respective drive units; timer operation time setting means for programming operation time of each of the programmable timer means as desired; timer selection setting means for setting each combination of a plurality of the programmable timer means to be used for vending of each article; means for reading vend price data corresponding to a single article selected in response to an output of one of said article selection switches from said vend price setting means, and data representing a combination of the programmable timer means to be used for vending of the article from said timer selection setting means; means for producing a vend start signal if the output of said comparator means indicates the article is vendible;; timer start control means for starting operation of said programmable timer means in response to the vend start signal; and means for selecting only outputs of said programmable timer means indicated by the data read from said timer selection setting means to supply the outputs to the drive units corresponding to said programmable timer means

9. A control device as defined in claim 8 wherein said timer start control means initially starts one of said programmable timer means corresponding to one of the drive units which dispenses a cup and thereafter starts the rest of said programmable timer means if a cup has been dispensed in a predetermined outlet in the vending machine.

10. A control device for a vending machine as defined in claim 8 wherein respective component parts of said control device are divided into and arranged in three portions of a first unit including said counter means and said comparator means, a second unit including said vend control unit and said vend price setting means, and a vend circuit section including said article selection switches and said drive units; wirings are provided from said first unit to said second unit for delivering a signal representing a stand-by mode when contents of said counter means are zero, the output signal of said comparator means and a signal representing that said counter means has been brought into a vend price subtraction mode; wirings are provided from said second unit to said first unit for delivering said vend price data and said vend start signal; and wirings are provided between said second unit and said vend circuit section for delivering or receiving the outputs of the respective programmable timer means and the outputs of said article selection switches.

11. A control device for a vending machine, the device being substantially as hereinbefore described with reference to the accompanying drawings.