GB2061675A - Stereo signal demodulators - Google Patents

Abstract

A stereo signal demodulator having a switching circuit 9-12 for demodulating main and sub-channel signals of a stereo composite signal to provide right and left signals. A crosstalk cancellation circuit 35 is provided for attenuating the main and sub-channel signals at 18 by a predetermined amount, and further means are provided for superposing the right and left signals at 3, 2 from the switching circuit upon the output of the crosstalk cancellation circuit. <IMAGE>

Description

SPECIFICATION Improvements in or relating to stereo signal demodulators The present invention relates to demodulators.

An FM (Frequency Modulated) composite stereo signal of the pilot tone system, i.e., the composite signal, is generally expressed as a composite signal consisting of a main channel signal, a sub-channel signal, a pilot signal and a SCA (Subsidiary Communication Authorization) signal. The main channel signal is a summation signal (L + R) of left and right audio signals, and the sub-channel signal contains a component of a difference signal (L - R) thereof, and is an AM (Amplitude Modulated) signal of a subcarrier signal (38 KHz) modulated by the difference signal. The pilot signal is a 19 KHz signal and is a reference signal used for the separation of the left and right audio signals.The SCA signal is used for auxiliary communication business, but this signal is a signal component which is not necessary for the stereo demodulation and generally removed from the stereo composite signal before the composite signal is supplied to the stereo demodulator. Therefore, "the stereo composite signal" means, thereinafter, the composite signal of main and sub-channel signals and the pilot signal.

As the circuit for separately extracting the right and left signals from this composite signal, there are mainly two systems, one being of a switching type and the other being of a matrix type.

In the matrix type, after the composite signal are separated by means of a filter into the main channel signal and the sub-channel signal, the sub-channel signal is demodulated by the subcarrier signal of 38 KHz to produce the difference signal (L - R). Those signals (L + R) and (L - R) are summed and subtracted to attain the signals L and R. However, the matrix type is not used so commonly because the circuit construction is complicated and the operation stability of this type is deteriorated.

According to the switching system, on the other hand, the composite signal is switched so that they are separated into two signals L and R. Since the circuit construction of the switching system is simplified and since the operations are relatively stable, the switching system has recently been used in an exclusive manner.

Although various types are proposed and practised as the demodulator of the switching type, a demodulator using a differential amplifier, as disclosed in USP 3,617,641, is generally used because it is easily formed on a semiconductor integrated circuit. That is, the composite signal is fed to the common emitter junction of two transistors constituting the differential amplifier, and they are separated by supplying a subcarrier frequency signal of 38 KHz to the base of one transistor and the other subcarrier frequency signal having a pase opposite to the above subcarrier signal to the base of the other transistor. In this instance, since the left and right signals separated have the opposite signal components superposed thereon as crosstalk components more or less, a cancel circuit for cancelling those crosstalk signal components is generally added.This cancel circuit is designed to attenuate the composite signals to have the substantially same signal level as the crosstalk components, separate the attenuated composit signals into attenuated left and right signals, and add the attenuated left and right signals to the above-separated left and right signals so as to cancel the crosstalk signal components. An example of such cancel circuit is also described in the above U.S. patent as a circuit of resistors 100, 101 and 102 and transistors 60, 71 and 72.

The attenuation of the composite signal is usually performed by means of a T-type resistor circuit. However, in the stereo demodulator of switching type having such crosstalk cancel circuit, both the attenuation of the composite signals and the separation of the attenuated composite signal are performed by a cascade connected circuit of the T-type resistor circuit; two differential amplifier type switches and a load resistor. Especially, the Ttype resistor circuit is inserted between the emitters of two transistors of the lower positioning differential amplifier. As a result, the emitters of those transistors have such a preset DC potential as is determined by the Ttype resistor circuit.Consequently, bias potentials to the differential amplifiers connected in series have to be so determined as to consider the DC potential in that the active elements such as the respective transistors operates in a linear range. Even if the points described above are considered to determine the bias potentials together with electric characteristics such as the distorsion factor, the demodulator having the conventional crosstalk cancel circuit cannot operate with good characteristics in the case of the lowering of power supply voltage.

A consideration is now taken into the case in which the power supply voltage is reduced.

Since the DC voltage loss determined by the T-type resistor circuit is inevitable, the bias voltages applied to the active elements such as transistors are accordingly lowered. Thus, the active elements operate in their non-linear regions. In the worst case, the transistors are driven into their saturated regions, resulting in that the signal injecting operation for cancelling the crosstalk components is not accomplished, so that the separation factor of produced demodulation signals is remarkably deteriorated.Even if the active elements are operated at such a higher supply voltage as is free from reduction of the separation factor, the margin of the voltage to be suplied to the active elernents is lowered by-the DC- potential loss of the T-type resistor 'circuit so that the distortion factor characteristics of the separated stereo -signals are deteriorated.

According to-the present irivention-there is provided a stereo signal demodulator compris ing a swit6hirg circuit for separating a stereo composite signal into right and left signal components, and circuit means for superpos- ing a predetermined quantity of said stereo composite signal upon said right and left signal components generated by said switching circuit: A stero signal demodulator according to the invention may provide a demodulated output having improved separation and distortion even when the power supply voltage is lowered. The demodilator may be suitable for forming on a semiconductor integrated circuit with the minimum increase in the number of elements.

In stereo signal demodulator according to the present invention, the signale for superposing on the separated left and right signal components to cancel the crosstalk components are not attained by switching the composite signal but are produced by attenuating the stereo composite signal by a predetermined amount. Consequently, an attenuation for reducing the stereo composite signal can be provide separately from the switching circuit for the stereo demodulation, so that the switching circuit can be driven by the entire power suooly voltage without any DC potential los caused by the attenuator.Moreever, since there is no DC potentlal- loss of 'th'e- attenautor, the respective transistors of the stereo switching circuit can operated with a power voltage margin, so that the distortionfree dynamic range of the output can be widened and that the separation factor can be enhanced-. When- the operations of the present invention are accomplished at the same power supply voltage as that of the prior art, the bias voltage to the active elements is also raised, so that the distortion factor characteristics can be improved.Moreever, since the composite signal attenuated by the preset quantity is superposed upon the demodulated left and right signal components, it is possible to eliminate the distortion in the attenuated co'rripoe-' ite signal which is used in the prior art by the switching of the attenuated composite signal, and especially, eliminate the distortion in the demoduöated output Signals due to the crosstalk cancel operation.

The invention will now be described by way of example, with ?efe'r"en"ce to the accompany- ing drawings, in which: Figure I is a circuit diagram Showing a stero signal demodulator of switching type using a differential amplifier according to the prior art; Figure 2 is a circuit diagram showing a stereo signal demodulator according to a pres fetred embodiment of the present invention;; and Figure 3 is a graphical diagram showing, the, characteristic curves indicating-the power sup ply-voltage to separation factor of the stereo signal demodualtor according to the prior. art and the embodiment' of 'the present invention.

With-reference--to the stereo signal'demodu lator according to the prior art, showm in Fig.

1, the composite signals are fed fed to an input terminal 18; which-is connected-to the base of a transistor 16 whose emitter is connected to a signal attenuator 29 consisting of a T type resistor circuit network composed of re sistors 21 and 22 and a variable resistor 23.

The collector of the transistor 16 is connected to the common emitter junction point of switching; transistors 1 1 and 1 2' for separating left. and. right channel signals. from-the com- posite--signal.- To the respective bases of'th-e switching transistors 1;2 and 11 are respec tively supplied with the sub-carrier signal of 38 KHz as a- switching signal through switch ing signal input terminale 24 and 25 to separate the left- and' right signals from the composite signal. The phases of those switch ing signals applied to the switching signal.

input terminals 24 and 25 are opposite to each other. The respective collectors of the transistors 12: and 11 are respectively conr- riected- to right and left signal' output circuits ;S and 40 which are current mirror circuits composing of transistors 7, g and 2-7 and transistors 5, 6 and 28, respectively.The respective outputs of the right and left signal output circuits 50 and 40 are respectively fed tci right ard~ left signal output terminals 3 and 2. fo the l'eft and right signal output circuits 40 and 50 are supplied a power supply voltage from a power supply terminal 1.

In order to cancel the left and right cros stalk components which are contained in the respective signals appearing at the right and left signal output terminals 3 and 2, there is provided a crosstalk cancellation switching cir cuit 28 Composing of transistors 9, 10 and 13. These transistors 9 and 10 have their respective emitters commonly connected, their respective collectors connected to the respective collectors of the transistors 11 and 12, and their bases connected to the respective bases of the transistors 12 and 11. To the junction point of the emitters of the transistors g and 10 is connected the collector of the transistor 1 3 which has its emitter connected with the signal attenuator 29, and its base connected to a ground terminal 4 through a reference voltage source 14.

The operations of the demodulator accord ing to the prior art will be described in the following The composite signal fed to the input terminal 18 is amplified by the transis tor 1 e, and the amplified signal is fed to the common emitter junction of the transistor 11 and 12 from the collector of the transistor 16.

At this time, in response to the switching signal of 38 KHz fed to the switching signal input terminals 24 and 25, the transistors 11 and 12 are repeatedly rendered conductive and inconductive in an alternate manner.

Thus, the composite signal amplified by the transistor 16 are subjected to time division by the transistors 11 and 12. As a result, the right channel signal is fed to the right signal output circuit 50 in response to the conduction of the transistor 12 to derive as a current output at the right signal output terminal 3, while the left channel signal is fed to the left signal output circuit 40 in response to the conduction of the transistor 11 to derive as a current output at the left signal output terminal 2. Since the transistors 5 and 6 and the transistors 7 and 8 constituting the current mirror circuits of the signal output circuits 40 and 50 are of PNP type, their current gains are low and might have deviation by their manufacturing condition.However, since the base current of those transistors are enlarged by the transistors 26 and 27, the symmetry between the generated left and right output signals is maintained. Thus, the composite signals are demodulated into a stereophonic signal.

However, the right channel signal contains the crosstalk components of the left channel signal and vice versa if they are left as they are, so that the separation between the right and left channel signals is deteriorated. In order to cancel those crosstalk components, therefore, there are additionally provided the crosstalk cancellation switching circuit 28 and the signal attenuator 29. More specifically, the composite signal at the emitter of the transistor 16 through the input terminal 18 is attenuated at the constant of the T-type resistor circuit network, which is the signal attenuator 29, composed of the resistors 21, 22 and 23.The attenuated signal is fed through the transistor 13 to the transistors 9 and 10, and crosstalk cancel signals are superposed upon the right and left signal output circuits 50 and 40 after they are separated by the conduction and inconduction of the transistors 9 and 10. Accordingly, by suitably setting the resistances of the resistors 21, 22 and 23 for attenuating the composite signal, the crosstalk component of the left channel contained in the right channel signal and the crosstalk component of the right channel contained in the left channel signal can be cancelled. Thus, the separation between the right and left channel signals is enhanced.

With the circuit construction thus far described, however, if the level of the composite signal and the stereo demodulation gain are raised, the separation between the right and left channel signals is abruptly deteriorated when the power supply voltage fed to the power supply terminal 1 becomes low. Specifically, if the composite signal input voltage level and the demodulation gain are set at 1 vrms and - 1 dB, respectively, current of about 1 mA flows through the collectors of the transistors 6 and 7 and the same current flows through the loads or filter circuits to be coupled to the signal output terminals 2 and 3. In this case, some potential loss occurs in the T-type resistor circuit network composed of the resistors 21, 22 and 23, so that the DC potentials at the junction point of the resistors 21 and 22 is raised.Since this DC potential is determined by the attenuation factor of the signal attenuator 29, this potential level is preset at about 0.4 V by selecting the resistances of the resistors 21, 22 and 23 for obtaining the attenuation factor by which the maximum separation is achieved. Consequently, if input voltage level of the composite signal is assumed at 1 vrms as described in the above, the composite signal have the maximum amplitude of 1.4 V, so that the base bias of the transistor 16 has to be higher than 2.6 V if some margin (0.1 V) is taken.

Then, the composite signal having the maximum amplitude of 1.4 V swings the base bias of the transistor 16 of 2.6 V as the center, and therefore the base potentials of the trans tors 9. 10,11 and 1 2 have to be 4.8 V at the minimum of consideration is taken into the collector-emitter voltage of the transistor 16 under its saturated condition and the distorsion characteristics of the demodulator. As a result, when the power supply voltage becomes lower than 6 V, the collector-emitter voltages of the transistors 9, 10, 11 and 12 are reduced, so that they are brought into their saturated conditions.Then, the transistors 9 and 10 of the crosstalk cancellation switching circuit 28 become inoperative, so that the crosstalk canceling effect is decreased and the separation factor between the right and left channels is abruptly deteriorated.

This particular condition is illustrated in Fig.

3. In this Figure, a curve 100 indicates the characteristics of the power supply voltage Vcc to the separation factor of the stereo signal demodulator according to the prior art. As will be understood from the characteristic curve 100, the separation factor is 55 dB for the power supply voltage Vcc higher than 6 V but is abruptly deteriorated for the power supply voltage Vcc lower than 6 V. This is because the cancelling effect is decreased due to the reduction of the power supply voltage. Moreover, although the separator factor between the right and left channels is not deteriorated near the power supply voltage of 6 V, the collectoremitter voltages of the transistors 9, 10, 1 1 and 12 are low because they are about 0.5 V, so that the distorsion factor is deteriorated by those transistors.

Thus, in the stereo signal demodulator of Fig. 1 according to the prior art, when the input level of the composite signal and the demodulation gain are designed at high levels, the separation is abruptly deteriorated with the reduction in the power supply voltage. According to the conventional demodulator, in other words, it is impossible to raise the composite signal input level and the de modulation gain while improving the voltage reduction characteristics. In addition, the distorsion factor in the case of the operation at a low power supply voltage is deteriorated. In other words, in the conventional demodulator, it is extremely difficult to determine the base bias potentials of the transistors 9, 10, 1 1, 12 and 1 6 so as to satisfy the aforementioned conditions while improving the voltage reduction characteristics.

Next, a demodulator shown in Fig. 2 according to a preferred embodiment of the present invention will be described in the following. In this stereo signal demodulator, a crosstalk cancellation circuit 35 is connected in parallel to the input terminal 18 to which the composite signal or main and sub-channel signals of the composite signal are supplied.

Therefore, the attenuator connected to the transistors 16 and 13 in the prior art can be eliminated, so that the respective emitters of the transistors 16 and 13 can be grounded through resistors 17 and 15, respectively. The outputs of the crosstalk cancellation circuit 35 are connected directly to the left channel signal terminal 2 and to the right channel signal output terminal 3. By this configuration, the composite signal fed to the input terminal 18 is applied to both the base of the transistor 16 and the respective bases of transistors 19 and 20 constituting the crosstalk cancellation circuit 35.Between the emitters of the transistors 19 and 20 is connected a T-type resistor circuit network consisting of resistors 30 and 31 and a variable resistor 32, and the respective collectors of these transistors are connected to the left and right channel signal output terminals 2 and 3, respectively. According to this circuit construction, therefore, the transistors 9, 10 and 13, the resistor 1 5 and the constant voltage source 14 form a DC output current compensation circuit and operate no crosstalk cancellation effect, as is different from the conventional demodulator shown in Fig. 1.

The operations of the stereo signal demodulator according to the preferred embodiment of the present invention will be described in the following. The demodulated composite signal of the pilot tone system applied to the input terminal 18, i.e. the composite signal is amplified by the common emitter amplifier of the transistor 16 and the resistor 17, and the amplified signal is fed to the common junction point of the emitters of the transistors 11 and 12.These transistors 11 and 12 are repeatedly rendered conductive and inconductive in response to the switching signals of 38 KHz produced from the pilot tone of 19 KHz supplied to the switching signal input terminals 24 and 25, so that the amplified composite signal is subjected to the time division by the conductions and inconductions of transistors 11 and 12, and thus, separated into the right and left channel signals. More specifically, by the conduction of the transistor 12, the right channel signal appears at the right channel signal output terminal 3 as the output current through the output circuit 50 which is composed of the transistors 7, 8 and 27. On the other hand, by the conduction of the transistor 11, the left channel signal appears at the left channel signal output terminal 2 through the output circuit 40 which is composed of the transistors 5, 6 and 26.

These left and right channel signals appearing at the two channel signal output terminals 2 and 3 respectively contain the crosstalk components of the opposite channels, as described hereinbefore. However, to two channel signal output terminals 2 and 3 are respectively supplied the composite signal from the crosstalk cancellation circuit 35 having such a quantity as can cancell the aforementioned crosstalk components. More specifically, the composite signal fed to the input terminal 18 are fed to the respective bases of the transistors 19 and 20. The composite signal fed to the transistor 16 is attenuated so as to perform a normal stereo switching action, while that to the transistors 19 and 20 is attenuated by the resistors 30, 31 and 32 inserted between the emitters of those transistors so as to generate the signals for the crosstalk cancel.The attenuated composite signals for the crosstalk cancel are fed of the left channel signal output terminal 2 and the right channel signal output terminal 3, through the respective collectors of the transistors 19 and 20. By suitably setting the resistance values of the resistors 30, 31, 32 and 17, therefore, the crosstalk components of the opposite channels contained in the left and right channel signals can be cancelled.

In this demodulator, the resistance values of the resistors 17, 30 and 31 are preferably designed at 1.2 Kohms, 5.1 Kohms and 5.1 Kohms, respectively, and therefore, it is sufficient that the resistance value of the variable resistor 32 is so adjusted as to maximize the separation factor. The attenuation quantity for maximizing the separation factor, i.e., the optimum ratio of the base to collector signal level of the transistor 1 9 or 20 is, if that optimum ratio is assumed to k1, indicated at k1 =0.1817. The resistance value of the resistor 32 for obtaining this value of kg is at about 752 ohms, and then the maximum eparation factor can be obtained. Moreover, the range of k is necessary for attaining the separation factor higher than 50 dB is from 0.1768 to 0.1868. If, in this case, the resistance values of the resistors 17, 30 and 31 are left as they are, it is sufficient that the resistance value of the resistor 32 is so ad justed as to range from 653 ohms to 876 ohms. Thus, the separation factor of the right and left channels is increased.

Incidentally, other combinations of the resistors 17, 30 and 31, can naturally be conceived, and it is sufficient that the resistance value of the resistor 32 is adjusted in accordance with the selected combination. Needless to say, when the separation factor is higher than 40 dB, k = 0.1654 to 0. 1986 holds, so that the range of the resistance value of the resistor 32 can be widened. It should be noted that the T-type resistor circuit network composed of the resistors 30, 31 and 32 is not necessary to be connected between the emitters of the transistors 19 and 20 but that the respective emitters may be alternatively grounded through single resistor having the resistance value adjusted so as to cancel the crosstalk components.In his modification, two terminals for the respective emitter resistors are required, so that the embodiment mentioned hereinbefore is more advantageous.

Now, when the composite signal input voltage level and the demodulation gain are respectively assumed at 1 vrms and - 1 dB as described in the above, since the emitter of the transistor 16 is connected to the ground terminal 14 through the resistor 17, the base bias of the transistor 1 6 may be designed at 2.2 V with a slight margin (0.1 V). Therefore, the voltage level of the reference voltage source 14 may be designed at 2.2 V. Then, the composite signal having the maximum amplitude of 1.4 V swings the base voltage of the transistor 16 from the base bias voltage of 2.2 V. As has been described hereinbefore, moreover, if consideration is taken into the collector-emitter voltage of the transistor 16 under its saturated condition and the distorsion characteristics of the demodulator, the base potential of the transistors 9, 10, 11 and 12 may be set at 4.4 V.On the other hand, the crosstalk components appearing at the left and right channel signal output terminals 2 and 3 are cancelled by the fact that the output of the crostalk cancel circuit 35 is respectively fed directly to those terminals 2 and 3. Accordingly, when the power supply voltage fed to the power supply terminal 1 becomes lower than 6 V, the crosstalk of the switching circuit composed of the transistors 11 and 12 is increased.Since, however, the power supply voltage at which the transistors 19 and 20 of the crosstalk cancellation circuit 35 are saturated is low, compared to the voltage at which the transistor 11 and 12 are saturated, the crosstalk cancelling operation is maintained even with the reduction in the power supply voltage at which the transistors 19 and 20 of the crosstalk cancellation circuit 35 are saturated is low compared to the voltage at which the transistor 11 and 12 are saturated, the crosstalk cancelling operation is maintained even with the reduction in the power supply voltage. Consequently, even if the main voltage becomes as low as about 4 V, the separation factor between right and left channels is not abruptly deteriorated. This is because the switching circuit is not connected in series to the crosstalk cancellation circuit 35.

This condition is illustrated in Fig. 3 by a curve 200. Specifically, the separation factor of 55 dB is obtained in the case of the power supply voltage higher than 6 V, and the separation factor of 50 dB can be obtained even when the power supply voltage becomes as low as 4 V.

Moreover, as described hereinbefore, since the base bias potentials of the transistors 16, 11 and 12 can be designed at low levels, their collector-emitter voltages can be in creased for the same power supply voltage as the prior art. For instance, for the power supply voltage of 6 V, the collector-emitter voltages of the transistors 11 and 12 have a value of 0.9 V, and that of the transistor 16 has a value of 2.2 V, so that the distortion factor can be further decreased.

According to this prefered embodiment, still moreover, since the crosstalk cancellation cir cuit 35 is connected to the input terminal 18 in parallel to the transistor 16. The transistor 16 is made to operate as the common emitter amplifier, and the signal attenuator 29 is not connected to the emitter of the transistor 16 as indicated in the prior art. By these con structions, the base potentials of the transistor 16 and the transistor 11 and 12 can be easily designed, so that the degree of freedom for the circuit design is very increased. On the contrary, in the conventional demodulator, the base bias of the transistor 16 has to be determined in accordance with both the com posite signal input voltage level and the atten uation constant of the signal attenuator 29, so that the degree of freedom for the circuit design is considerably decreased.In addition, since the transistor 16 is used as the common emitter amplifier according to this embodi ment, there is such advantage that the input dynamic range can be increased.

According to the stereo signal demodulator of this embodiment, even when the composite signal input level is assumed at 1 vrms and the demodulation gain is as high as - 1 dB, the separation factor between the right and left channels is sufficiently high at the power supply voltage of about 4 V, and the much lower distortion is surely achieved for the same power supply voltage. Moreover, the base potentials of the transistor 16 and the switching transistors 11 and 12 can be easily designed, and the input dynamic range can also be widened.

As described hereinbefore, according to the present invention, even when the composite signal input level is made high and the stereo demodulation gain is also made high, it is possible to provide a stereo signal modulator which can have a high separation factor, excellent voltage reducing characteristics and a reduced distorsion factor.

It should be noted here that the present invention should not be limited to the aforementioned embodiment but can be modified in various forms without departing from the scope and spirit of the present invention. For example, although the resistor 32 is of the variable type in the present embodiment, it may be fixed in accordance with the composite signal attenuation because the attenuation for cancelling the crosstalk components can be easily determined. In addition, the two output circuits 40 and 50 are constructed by the current mirror circuits in order to generate the current outputs, but they may have other circuit constructions such as resistor loads.

Moreover, the present invention can naturally be formed into the integrated circuit, constructed on a single semiconductor substrate, and is found suitable for such integration because it contains no capacitor element.

Still moreover, the composite signal demodulating means may be not only the differential amplifiers but also diode switching circuits.

Furthermore, the transistors 9, 10 and 13.

the resistor 15 and the reference voltge source 14 constitute a DC current supplying circuit which compensates the change in the output DC current due to the switching of the transistors 1 and 12. Consequently, if the left and right channel output terminals 2 and 3 are coupled through coupling capacitors to filter circuits or the like of the next stage, that DC current supplying circuit of the transistors 9, 10 and 13, etc. can be eliminated. This is because, even if the aforementioned bias circuit is eliminated, the output singal are transfered to the next stage in spite of the change in output.

Claims (12)

1. A stereo signal demodulator comprising a switching circuit for separating a stereo composite signal into right and left signal components, and circuit means for superposing a predetermined quantity of said stereo composite signal upon said right and left signal components generated by said switching circuit.

2. A stereo signal demodulator claimed in Claim 1, wherein said stereo composite signal is fed to said switching circuit through a transistor in a common emitter circuit.

3. A stereo signal demodulator comprising an input terminal for receiving at least main and sub-channel signals of a stereo composite signal, a switching circuit for demodulating said main and sub-channel signals to right and left signals, circuit means for attenuating said main and sub-channel signals by a predetermined quantity, means for superposing said respective right and left signals demodulated by said switching circuit upon the output of said attenuating circuit means, and output terminals for separately deriving said left and right signals superposed upon said output of said attenuating circuit means.

4. A stereo signal demodulator claimed in Claim 3, wherein said attenuating circuit means includes first and second transistors having their respective bases supplied with said main and sub channel signals and their respective emitters connected therebetween with a resistor circuit network so that the outputs of the attenuated main and sub channel signals may be derived from the respective collectors thereof.

5. A stereo signal demodulator claimed in Claim 3, wherein said right and left signals are derived from said switching circuit through a current mirror circuit.

6. A stereo signal demodulator claimed in Claim 4 or 5, wherein said main and sub channel signals are fed to said switching circuit through an additional transistor in a common emitter connection.

7. A stereo signal demodulator claimed in Claim 3, 4, 5 or 6, wherein said switching circuit includes third and fourth transistors connected so as to form a differential amplifier, said main and sub channel signals being applied to the common junction point of the emitters of said third and fourth transistors.

8. A stereo signal demodulator comprising a first transistor in a common emitter circuit, said first transistor having its base receiving main and sub channel signals of stereo composite signal, second and third transistors having their respective emitters connected to the collector of said first transistor and their respective bases to which switching signals having sub-carrier signal frequency of said stereo composite signal and opposite phases to each other are respectively supplied, left and right signal output terminals respectively connected through an output circuit to the respective collectors of said second and third transistors, an attenuating circuit coupled to the base of said first transistor, said attenuating circuit attenuating said main and sub channel signals, and means for feeding the output of said attenuating circuit to said left and right signal output terminals.

9. A stereo signal demodulator claimed in Claim 8, wherein said attenuating circuit includes fourth and fifth transistors having their respective base connected to the base of said first transistor and a resistor circuit connected between the emitters of said fourth and fifth transistors, output of said attenuating circuit being supplied from the respective collectors of said fourth and fifth transistors to said left and right signal output terminals.

10. A stereo signal demodulator claimed in Claim 8, wherein said output circuit includes a current mirror circuit.

11. A stereo signal demodulator comprising an input terminal receiving main and sub channel signals of stereo composite signal, a first transistor connected in common-emitter connection and having its base connected to said input terminal, second and third transistors having their respective emitters connected to the collector of said first transistor, said second and third transistors being alternatively rendered conductive and non-conductive in response to subcarrier signal of said stereo composite signal to demodulate said main and sub channel signals into left and right signals, first and second current mirror circuits connected respectively to the respective collectors of said second and third transistors, left and right signal output terminals coupled respectively to the outputs of said first and second current mirror circuits, fourth and fifth transistors having their respective bases connected to said input terminal, a resistor circuit network inserted between the emitters of said fourth and fifth transistors, and means for supplying the outputs at the collectors of said fourth and fifth transistors respectively to said left and right signal output terminals.

12. A stereo signal demodulator constructed, arranged and adapted to operate substantially as hereinbefore described with reference to, and as illustrated in, the accompanying drawings.