GB2059078A

GB2059078A - Improvements in or relating to phase sequence indicators

Info

Publication number: GB2059078A
Application number: GB7931837A
Authority: GB
Original assignee: Plessey Co Ltd
Current assignee: Plessey Co Ltd
Priority date: 1979-09-13
Filing date: 1979-09-13
Publication date: 1981-04-15

Abstract

A three phase signal sequence indicator comprising respective pulse formers responsive to the lines of a three phase signal the sequence of which it is required to indicate for forming corresponding pulse waveforms which are provided, one for each phase to a logic circuit responsive to the pulse waveforms for providing control signals to operate an indicator in dependence upon the phase sequence of the three phase signal whereby the sequence is indicated. <IMAGE>

Description

SPECIFICATION Improvements in or relating to phase sequence indicators This invention relates to phase sequence indicators.

In multiphase systems and more especiaily but not exclusively in three phase systems it is often necessary to provide an indication of, or in dependence upon, the phase sequence obtaining from time to time. In three phase systems for example it is sometimes essential to determine which of the two possible sequences the phase voltage follows. Presently known ways of obtaining a phase sequence indication involve the use of capacitor/resistor phase shifting networks and the making of a comparison between two voltage measurements or the making of a comparison between the brightness of two neon lamps. These methods do not, however, give a positive easily read indication.

According to the present invention a phase sequence indicator comprises pulse forming means responsive to the phase of a multiphase signal, the sequence of which is required to indicate, for forming corresponding pulse waveforms, one for each phase, logic circuit means responsive to the pulse waveforms for providing control signals to operate indicator means in dependence upon the phase sequence of the multiphase signal whereby the said sequence is indicated.

The indicator may be adapted exclusively for three phase systems and the logic circuit means may comprise latch means, gating means responsive to two of the three phases for providing one signal for the latch inverter means responsive to the other of the three phases for providing a second signal for the latch the indicator means being operated in dependence upon the operative state of the latch as determined by the signals applied thereto.

The gating means may comprise a first Schmitt trigger circuit responsive to signals from the said two of the three phases.

Afurther Schmitt trigger may be provided con necked to operate as a buffer via which one of the said two phases is fed to the said first said Schmitt trigger circuit.

The inverter means may comprise two Schmitt trigger circuits serially connected.

The pulse forming means may comprise three zener diodes one for each phase.

Alternatively the pulse forming means may comprise a transistor shunted by a diode one transistor and diode for each phase arranged so that a limited square wave output signal is provided.

The transistor may be arranged to feed an optocoupler one provided for each phase.

The indicator may comprise power supply means responsive to one or more phases of the three phase circuit for providing a d.c. power supply for the indicator circuit arrangement.

Some exemplary embodiments of the invention will now be described with reference to the accompanying drawings in which: Figure l is a circuit diagram of a phase sequence indicator; Figure 2 is a circuit diagram showing part of another phase sequence indicator according to the invention; and wherein Figure 3a, 3b and 3c are waveform diagrams appertaining to the circuits of Figure 1 and Figure 2.

Referring now to Figure 1 a phase sequence indicator comprises input terminals 1, 2 and 3 to which alternating phase signals R, Y and B of a three phase system are fed. The signals are fed from terminals 1, 2 and 3 via fuses 4, 5 and 6 respectively and current limiting resistors 8,9,10,11, 12 and 13.

Terminal 1 is arranged to feed via resistors 8 and 9 a pulse forming circuit comprising diode 14, transistor 15 and resistor 16 and in a similar manner terminals 2 and 3 of the other two phases feed the diode 16, transistor 18, resistor 19, and the diode 20, the transistor 21, and the resistor 22, respectively. The transistors 15, 18 and 21 are arranged to feed opto-couplers 23, 24 and 25 respectively, capacitors 26, 27 and 28, 29, 30 and 31 being provided for smoothing purposes. The opto-couplers 23, 24 and 25 which serve an isolating and buffer function are arranged to feed Schmitt trigger circuits 32, 33 and 34 which are available as complete units. Schmitt trigger circuit 33 is connected as a buffer and arranged to feed Schmitt trigger circuit 32.Whereas Schmitt trigger circuit 34 is arranged to feed a further Schmitt trigger circuit 35 which is connected as an inverter. Output signals from Schmitt trigger circuits 32 and 35 are fed to a latch 36 which is arranged to operate light emitting diodes 37 or 38 in dependence upon the phase sequence applied to the terminals 1, 2and3.

For a better understanding of the operation of the circuit reference should be made to Figure 3.

Referring now to Figure 3, Figure 3a shows waveforms 39,40 and 41 which are applied to the terminals 1,2 and 3. The pulse waveforms of Figure 3b, are numbered 42,43 and 44 appear in the circuit of Figure 1 at points 45, 46 and 47 respectively, and the pulse waveform 48 appears at the output of Schmitt trigger 32 on line 49. It will be appreciated that when the signal from the output of Schmitt trigger 35 goes positive the value which obtains on the line 49 will appear on the output terminal Q of the latch 36 and the light emitting diode 37 will light.

Thus when the phase rotation sequence A, B, C as shown in Figure 3a obtains, the pulses as shown in Figure 3b will obtain and the light emitting diode 38 will be illuminated. When the other rotational sequence A, C, B obtains the pulses 50, 51, 52 and 53 will obtain on points 45, 46, 47 and line 49 respectively and the light emitting diode 37 will be illuminated indicating the sequence A, C, B.

As an alternative to the arrangement just before described with reference to Figure 1 as a circuit as shown in Figure 2 may be provided wherein the opto-couplers and transistors of Figure 1 are replaced by Zener diodes 54, 55 and 56. The arrangement of Schmitt triggers 32, 33, 34 and 35 is the same as in Figure 1 and these parts bear the same numerical designations. Output signals from the Schmitt triggers 32 and 35 are fed via lines 57 and 58 to a latching indicator arrangement (not shown) similar to the arrangement described with reference to Figure 1. In order to bias the zener diodes 54,55 and 56 a resistor network comprising resistors 59 and 60,61,62, 63 and 64 is provided in a conventional manner. In order to provide power for the circuit a power supply 65 is provided but in an alternative arrangement a battery may be used.

Claims

1. A phase sequence indicator comprising pulse forming means responsive to the phase of a multiphase signal the sequence of which is required to indicate, for forming corresponding pulse waveforms one for each phase, logic circuit means responsive to the pulse waveforms for providing control signals to operate the indicator means in dependence upon the phase sequence of the multiphase signal whereby the said sequence is indicated.

2. A phase sequence indicator as claimed in claim 1 for a three phase system wherein the logic circuit means comprises latch means, gating means responsive to two of the three phases for providing one signal for the latch means and invertor means responsive to the other of the three phases for providing a second signal for the latch means, the indicator means being operated in dependence upon the operative state of the latch means as determined by the signals applied thereto.

3. A phase sequence indicator as claimed in claim 2 wherein the gating means comprises a first Schmitt trigger circuit responsive to signals from the said two of the three phases.

4. A phase sequence indicator as claimed in claim 3 comprising a further Schmitt trigger con necked to operate as a buffer via which one of the said two phases is fed to the said first Schmitt trigger circuit.

5. A phase sequence indicator as claimed in any of claims 2,3 or 4 wherein the inverter means comprises two Schmitt trigger circuits serially connected.

6. A phase sequence indicator as claimed in any preceding claim wherein the pulse forming means comprises three zener diodes for each phase.

7. A phase sequence indicator as claimed in any of claims 1 to 5 wherein the pulse forming means comprises a transistor shunted by a diode one transistor and diode for each phase being provided and arranged so that a limited square wave output signal is provided.

8. A phase sequence indicator as claimed in claim 7 wherein the transistor is arranged to feed an opto-coupler one of which is provided for each phase.

9. A phase sequence indicator as claimed in any preceding claim wherein the indicator means comprises power supply means responsive to one or more phases of the three phase circuit for providing a d.c. power supply for the indicator circuit arrangement.

10. A phase sequence indicator substantially as hereinbefore described with reference to the accompanying drawings.