GB2056198A - Power supplies for printed circuit boards - Google Patents

Abstract

A control circuit for controlling application of power to and removal of power from a circuit board includes an R-C element 31, 32 which can be selectively placed in a charging or discharging mode by a logic element 20 according to whether the board is being inserted or removed from a rack. The arrangement is such that when the board is inserted the power supplied to the board by a voltage regulator 18 increases gradually as the capacitor 32 charges whilst when the board is removed the power supplied gradually decreases as the capacitor 32 discharges. <IMAGE>

Description

SPECIFICATION Improvements in or relating to printed circuit boards This invention relates to power supplies for printed circuit boards and in particular relates to a control circuit for controlling the application of power to and removal of power from a printed circuit board.

In electronic systems involving a plurality of electronic circuits the circuits are generally contained on printed circuit boards which are mounted in rows within racks. The printed circuit boards are mounted in the racks such that they can be inserted or removed by sliding them along upper and lower guide rails. Power for the boards is usually provided via connectors at the rear of the racks, the boards having terminal pins which are arranged to engage the connectors. When a printed circuit board has a fault it is often necessary to remove the board for testing or to replace it by a similar board. Most printed circuit boards when unpowered present an initially capacitative load when connected to a power supply.The power supply for a board can often be capable of supplying a current of two amperes and it will be appreciated that the sudden connection of a capacitative load to such a power supply can induce a transient on the power lines. Such a transient can adversely affect the operation of other circuit boards already mounted in a rack. In a similar manner if a circuit board is removed from the rack that removal causes a step down in load which can also induce a voltage transient and again affect other circuits in the rack.

Similar types of problems can occur with logic levels if they are connected to signal pins during board replacement. This is particularly so where the board plugs into a bus. If active logic levels are connected to the bus then data passing on the bus is likely to be corrupted and system failure can occur.

It is an object of the present invention to provide a control circuit for supplying power to a printed circuit board which is designed to reduce to an acceptable level transients during interchange of printed circuit boards and to buffer logic levels during which interchange of boards.

According to the present invention there is provided a control circuit for controlling application of power to and removal of power from a printed circuit board, said circuit comprising an R-C element connected between the power supply line of the circuit board and terminal pins of the board, and logic circuitry having a first state which provides a connection for the R--C element to charge from a power source and a second state which provides a connection for the R--C element to discharge, said logic circuitry being placed in its first state when the board is connected to a power supply and its second state when the board is disconnected from a power supply.

The logic circuitry may have first, second and third inputs connected respectively to first, second and third terminal pins, said first pin having a length greater than that of the other two pins and said third pin having a memory element associated therewith, the arrangement being such that when the board is inserted into a rack said first pin contacts a power supply connector to place the logic circuitry into its first state, said second and third pins subsequently contacting respective power supply connectors to set said logic circuitry whereby when the circuit board is removed from the rack the logic circuitry is placed in its second state for a time determined by said memory element.

The memory element may comprise a resistor and capacitor connected in parallel between said third input and earth.

The R--C element may be connected by a field effect transistor to a voltage regulator which is arranged to control the current drawn by the circuit board.

The R--C element may be connected to said logic circuitry via first and second transistors, said first transistor being arranged to assume a conductive state to provide a charging path for the R--C element when the logic circuitry is in its first state with the second transistor being nonconductive, and said second transistor being arranged to assume a conductive state to provide a discharge path for the R--C element when the logic circuitry is in its second state with the first transistor being non-conductive.

The invention will be described now by way of example only with particular reference to the accompanying drawings. In the drawings: Figure 1 is a block schematic diagram of a control circuit in accordance with the present invention; Figure 2 illustrates in more detail some of the elements shown as blocks in Figure 1, and Figures 3 and 4 are curves illustrating the operation of the present invention.

A control circuit for controlling the application of power to and removal of power from a printed circuit board has three pins 10, 11 and 12 arranged to engage power supply terminals 14, 1 5 and 16 which are fixed to a rack for mounting circuit boards. The pin 10 is somewhat longer than the pins 11 and 12 so that when the circuit board is inserted into a rack it makes contact with the terminal 14 before the pins 11 and 1 2 contact the terminals 1 5 and 16. The pin 10 is connected by a line 16 to a voltage regulator 18. The pin 10 is also connected to a first input 1 9 of a multiplexer 20. The multiplexer 20 has a second input 21 which is connected to the pin 11 and a third input 22 which is connected to the pin 12. A resistor 24 and a capacitor 25 are connected in parallel between the input 22 and earth.

The multiplexer 20 has two outputs 26, 27. The output 26 is connected to the gate of a transistor 28 and the output 27 is connected to the gate of a transistor 29. The transistors 28 and 29 are connected in series between the line 16 and earth.

The inter-connection between the transistors 28 and 29 is connected via a resistor 31 and capacitor 32 to the gate of a transistor 33. The transistor 33 is connected to the control input of the regulator 18. The output 35 of the regulator 1 8 is connected to the main power supply line of the circuits on the printed circuit board.

The operation of the circuit shown in Figure 1 will now be described starting with the situation where the board is about to be inserted into a rack. When the unpowered board is inserted into the rack the pin 1 0 makes contact with the socket 14 prior to the pins 11 and 12 engaging their respective sockets 1 5 and 1 6. When the pin engages its power supply contact the transistor 28 is switched on via the multiplexer 20. When the transistor 28 switches on the capacitor 32 can charge through the resistor 31 thereby increasing the potential at the gate of the transistor 33. This results in the resistance of the transistor 33 being reduced so that the regulator gradually increases the power supply to the board via terminal 35.In this way a gradual application of power to the board is provided at a rate sufficient to avoid transient voltages. The rate at which the power increases is determined by the time constant of the arrangement of the resistor 31 and capacitor 32. This is selected such that under normal board insertion velocities the voltage provided by the regulator has reached its operating value prior to the pins 11 and 12 engaging their respective connections 1 5 and 1 6.

When the pins 10 and 11 engage their connections a potential is applied to the terminal 22 of the multiplexer which causes the control of the regulator to be transferred from the pin 10 to the pin 12. This has no effect on the circuits on the printed circuit board since they have already been powered up via the pin 1 0.

When a board is removed for testing or replacement the pins 11 and 12 break contact at the same time prior to pin 10 breaking contact.

After the pin 12 breaks contact the potential at terminal 22 does not drop initially to zero because of the capacitor 25 and resistor 24 so that the control of the regulator remains with the pin 11.

The potential at this pin is now zero and thus the transistor 29 switches on allowing the capacitor 32 to discharge therethrough at a given rate. The regulator 18 thus causes the power level of the printed circuit board to power down gradually prior to the pin 10 breaking contact with connector 14. Thus, when the pin 10 actually breaks contact with the connector 14 the circuit has already been powered down gradually thereby avoiding a transient due to a sudden break in voltage.

Thus it will be seen that the circuit of Figure 1 provides a smooth powering up and powering down of a printed circuit avoiding transients which can cause voltage surges on power lights to other circuit boards contained in the same rack. It will be appreciated that, after removal of the board, the memory capacitor 25 discharges through the resistor 24 so that when a board which has been removed is re-inserted control is returned to the pin 10 ready for the process to be repeated.

Figure 2 shows the details of the multiplexer 20. The multiplexer comprises a transistor 40 having a gate electrode connected to the pin 12.

The multiplexer has second and third transistors 41, 42. The gate of the transistor 41 is connected to the drain of the transistor 40 and to the line 1 6 whilst the gate of the transistor 42 is connected to the gate of the transistor 40. The source electrode of the transistor 42 is connected to the pin 11.

The junction of the transistors 41 and 42 is connected to a further transistor 43 the drain of which comprises one output of the multiplexer which is connected to the transistor 28. The arrangement is such that when one output of the multiplexer is high the other is low so that the transistors 28 and 29 are alternately switched on and off.

The time available for powering a circuit board up or down depends upon the electrical characteristics of the board and the dynamic response characteristics of the power supply. It can be shown that for a given circuit board the time required to power the board up or down to or from a given voltage can be determined from the following expression.

V (t) = k' at + e(-at) - 1 where = = k/aC k being the amps/sec maximum dynamic response of the power supply a = 1/RC R being the equivalent board resistance load and C the equivalent board capacitance.

Using the time constant T for powering the 'board up or down the minimum difference in power and signal pin lengths may be determined for a given maximum board velocity V using the expression below L=TxV Figure 3 is a plot showing the predicted board voltage for three different power supplies plotted against time. Figure 4 shows a plot of board velocity against difference in pin length between the pin 10 and the other two pins. This plot is for the supply 3 of Figure 3.

These curves can be used to determined suitable values for the resistor 31 and capacitor 32 and the difference in pin length between the pin 10 and the pins 11 and 12.

As shown in Figure 1 a further pin or pins 50 can be provided. This pin or pins is shorter than the pins 11, 12 so that when a board is removed the pin 50 breaks contact with its associated connector 51 before the pins 11, 12 do so. The pin or pins 50 can be connected to circuitry which provides a warning that a board is being removed from a rack or that an insertion operation is in process.

Also the pin or pins 50 can be connected to an àrrangement which is designed to buffer the circuit board logic during insertion of the board.

When the pins 50 are disconnected, buffers of the signal pins assume a high impedance state to prevent an erroneous signal appearing on the signal bus.

Claims (8)

1. A control circuit for controlling application of power to and removal of power from a printed circuit board, said circuit comprising an R--C element connected between the power supply line of the circuit board and terminal pins of the board, and logic circuitry having a first state which provides a connection for the R--C element to charge from a power source and a second state which provides a connection for the R--C element to discharge, said logic circuitry being placed in its first state when the board is connected to a power supply and its second state when the board is disconnected from a power supply.

2. A control circuit as claimed in claim 1 wherein the logic circuitry has first, second and third inputs connected respectively to first, second and third terminal pins, said first pin having a length greater than that of the other two pins and said third pin having a memory element associated therewith, the arrangement being such that when the board is inserted into a rack said first pin contacts a power supply connector to place the logic circuitry into its first state, said second and third pins subsequently contacting respective power supply connectors to set said logic circuitry whereby when the circuit board is removed from the rack the logic circuitry is placed in its second state for a time determined by said memory element.

3. A control circuit as claimed in claim 2 wherein the memory element comprises a resistor and capacitor connected in parallel between said third input and earth.

4. A control circuit as claimed in any preceding claim wherein the R--C element is connected by a field effect transistor to a voltage regulator which is arranged to control the current drawn by the circuit board.

5. A control circuit as claimed in any preceding claim wherein the R--C element is connected to said logic circuitry via first and second transistors, said first transistor being arranged to assume a conductive state to provide a charging path for the R-C element when the logic circuitry is in its first state with the second transistor being nonconductive, and said second transistor being arranged to assume a conductive state to provide a discharge path for the R--C element when the logic circuitry is in its second state with the first transistor being non-conductive.

6. A control circuit as claimed in claim 2 including at least one further pin which is shorter than said second and third pins, said further pin being connected to circuitry for providing a warning when a circuit board is removed from a rack.

7. A control circuit as claimed in any preceding claim including means for buffering the signal pins during insertion of a circuit board.

8. A control circuit substantially as hereinbefore described with reference to and as shown in the accompanying drawings.