GB2047955A - Continuous Process for Fabricating Solar Cells - Google Patents

Continuous Process for Fabricating Solar Cells Download PDF

Info

Publication number
GB2047955A
GB2047955A GB7914545A GB7914545A GB2047955A GB 2047955 A GB2047955 A GB 2047955A GB 7914545 A GB7914545 A GB 7914545A GB 7914545 A GB7914545 A GB 7914545A GB 2047955 A GB2047955 A GB 2047955A
Authority
GB
United Kingdom
Prior art keywords
semiconductor layer
substrate
electrode
layer
solar cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7914545A
Other versions
GB2047955B (en
Inventor
Deminet Czeslaw
William E Horne
Richard E Oettel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing Co
Original Assignee
Boeing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/702,416 external-priority patent/US4152535A/en
Application filed by Boeing Co filed Critical Boeing Co
Priority to GB7914545A priority Critical patent/GB2047955B/en
Publication of GB2047955A publication Critical patent/GB2047955A/en
Application granted granted Critical
Publication of GB2047955B publication Critical patent/GB2047955B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03921Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The process comprises the following steps: (1) forming a glass sheet 34 which defines a substrate layer for the solar cell; (2) forming a diffusion barrier layer 36 on at least one surface of the substrate; (3) forming a first electrically-conductive layer 40 on the diffusion barrier, the first electrically conductive layer being a first electrode in the solar cell; (4) depositing small-grain polycrystalline silicon in a thin film 44, i.e. 10-100 micrometers, on the first electrode layer; (5) recrystallizing the deposited polycrystalline silicon until it reforms into large-grain polycrystalline or single-crystal silicon; (6) forming a PN junction 63 in the recrystallized silicon layer; and (7) forming a second electrically-conductive layer 62 on the recrystallized silicon layer, the second electrically-conductive layer being a second electrode in the solar cell. The solar cell produced by this process may be fabricated in large surface area configurations. <IMAGE>

Description

SPECIFICATION Continuous Process for Fabricating Solar Cells and the Product Produced Thereby The present invention relates generally to the semiconductor art, and more specifically is concerned with a process for manufacturing solar cells using semiconductor material.
With the increasing cost and potential restrictions on availability of conventional fuels, e.g. petroleum, natural gas, etc., as sources of energy, considerable research effort has been directed towards developing other sources of energy. Notable among alternative sources of energy is the sun. In attempting to make use of the sun's energy, a substantial amount of research effort has been directed toward developing inexpensive, large-capacity devices referred to as solar cells which directly transform the sun's energy which initially is in the form of photons into electricity.
A solar cell typically includes a layer of material having a photovoltaic capability, wherein electric charges present in the material are freed as a consequence of light impinging on the material.
The freed electrical charges, when separated from the region of their generation, produce a current flow, which may be routed to an outside circuit and into an electrical load where work is performed.
Since the current produced by the solar cell continues only so long as light actually impinges on the cell, those applications which have continuous current demands require a separate subsystem for electrical storage. In other applications, however, continuous current is not necessary, and in those applications, the solar cell suffices by itself.
The photovotaic material used in solar cells must have two fundamental characteristics: 1) an inherent structural capability of producing mobile charge carriers in response to absorption of light; and 2) an internal potential barrier by which the mobile charge carriers freed by the light can be separated from the region in which they are generated. Generally, most semiconductor materials fulfill the first requirement, and conventional PN junctions, as found in solid state diodes and transistors, fulfill the second requirement. In addition to these characteristics, the photovoltaic material used in a solar cell as a practical matter possess numerous other properties and characteristics which contribute to the efficiency of the device.Detailed information on the desirable characteristics of such materials for use in solar cells may be found in numerous standard texts such as Solid State Physical Electronics, by Aldert Vander Ziel, published by Prentice-Hall, Inc., 1957.
Generally, numerous materials and compounds are suitable for use in solar cells, among them being silicon, selenium, gallium arsenide, cadmium telluride, and copper sulfide, to specify but a few of the more prevalently used materials and compounds. Considerations of expense and efficiency indicate that the semiconductor material should be either single-crystal or largegrain polycrystalline rather than small-grain polycrystalline, and should be inexpensive and readily available. Silicon is such a material although even those solar cells which currently use silicon are too expensive to compete economically with other sources of electricity.
There are several reasons why solar cells using silicon are still too expensive to manufacture economically on a large scale. First, solar cells heretofore have been made in unit sizes by a batch process, instead of discrete sizes by a.
continuous process. Second, the solar cells now produced are relatively small, instead of large surface area configurations. Attempts to date to produce large area solar cells have resulted in poor quality and extremely fragile structures, which are easily damaged in use. Furthermore, severe manufacturing problems have been encountered in such attempts.
Third, the cost of producing large area thin-film single-cell silicon arrays, by the current method of slicing and polishing blocks of single crystal silicon is too expensive for commercial use.
Previous attempts to deposit silicon in thin films of semiconductor quality suitable for use in solar cells have been unsuccessful. This lack of success is due to many factors, among the most important being 1) the deposited silicon acquires significant amounts of impurities in the manufacturing process, thereby substantially reducing the efficiency of the resulting solar cell, and 2) the grain size of the deposited silicon is too small to produce the necessary conversion efficiently for practical use.
These and other disadvantages have combined to detract from the attractiveness of the silicon solar cell as a significant alternative to present sources of electricity, even though the source of energy utilized by the solar cell is virtually inexhaustable and readily available.
Accordingly, the present invention provides a process for making solar cells which use a semiconductor material as their active element, the process comprising the steps of: forming a substrate; forming a first electrode; depositing a layer of semiconductor material so that one surface thereof is in ohmic contact with said first electrode, said first electrode being positioned intermediate said substrate and said semiconductor layer; recrystallizing said semiconductor layer so as to substantially increase its grain size to the point where it is useful in a solar cell; forming a PN junction in said recrystallized semiconductor layer; and forming a second electrode so that it is in ohmic contact with another surface of the recrystallized semiconductor layer, said solar cell produced thereby capable of providing a current output in response to light impinging on said recrystallized semiconductor layer.
The present invention also provides a solar cell, using semiconductor material as its active element, comprising: a substrate; a deposited thin film layer of semiconductor material having a grain size sufficiently large to be useful in a solar cell, said semiconductor layer having a PN junction formed therein; and first and second electrically-conductive electrodes positioned on opposite surfaces of said semiconductor layer and in ohmic contact therewith, said first electrode being substantially intermediate said substrate and said semiconductor layer, said solar cell capable of producing an electric current in response to light impinging on said semiconductor layer.
The present invention also includes a sequence of steps which in total form a subprocess thereof useful in producing semiconductor devices which use a semiconductor material as an active element. This sequence of steps includes a process for making semiconductor devices using a semiconductor material as its active element comprising the steps of: forming a glass substrate, said glass substrate having substantially the same co-efficient of expansion as the semiconductor material; forming a first electrode; depositing a layer of semiconductor material so that one surface thereof is in ohmic contact with said first electrode, said first electrode being positioned intermediate said substrate and said semiconductor layer; and recrystallizing said semiconductor layer so as to increase substantially its grain size so that it is of semiconductor quality.
A more thorough understanding of the invention may be obtained by a study of the following detailed description taken in connection with the accompanying drawings in which: Figure 1 is a side view of a portion of a large area solar cell showing the sequential build-up of the successive layers of material which comprise the cell.
Figure 2 is a pictorial view showing in more detail the particular step in the process of the present invention wherein the deposited smallgrain polycrystalline silicon layer is melted to form a single-crystal or large-grain polycrystalline silicon layer.
Figure 3 is a graph showing the energy profile for a proton beam, a typical heavy particle beam, relative to its penetration depth in silicon.
Figure 4 is a cross-sectional veiw of a portion of a solar cell, showing in detail the structural effect of the step shown pictorially in Figure 2, the step being accomplished by a proton beam.
Figure 5 is an exploded cross-sectional view of a portion of the complete solar cell showing the structural configuration and relative preferred dimensions of the cell in a selected orientation thereof to the impinging energy from the sun.
The process disclosed herein for the economical manufacture of large-area silicon solar cells is a sequential deposition process, wherein layers of various selected materials are sequentially deposited in a defined order upon a base material or substrate. Because it is a deposition process, rather than a variation of the slice and polish process which now dominates the solar cell prior art, many of the disadvantages of the prior art are inherently eliminated.
Furthermore, even those significant technical problems heretofore present in prior art deposition processes for making solar cells have been largely overcome by use of the sequence of steps explained in detail in the following paragraphs. Although the explanation of the process of the present invention is in terms of continuous production of large-area solar cells, it should be understood that virtually any size or configuration of solar cell may be produced by the present process in batch form as well. The fact that the present process is particularly adaptable to continuous production lends even more commercial attractiveness and practicality to the process than it would otherwise.
Figure 1 shows the sequential steps in the process of the present invention, from the formation of the glass substrate to the last oxide protective layer. Each sequential step is identified with a specific numeral to promote ease of identification and reference.
In the first step, reference 12, molten glass is presented between two rollers 32 and 33 to form a glass plate which serves as a substrate 34 for the solar cell product. The temperature of glass at this point is approximately 1 2O00C. Glass substrate 34 is preferably, but not necessarily thick enough, e.g. one-quarter inch, to provide solid support for the remaining layers of the solar cell, and to resist breakage in normal use, even for large area configurations. The thickness of substrate 34 is important in terrestrial applications; however, in extra-terrestrial (space) applications, substrate 34 may be made relatively thin, i.e. 250 micrometers.
Glass substrate 34 is also, of course, light transmitting, a necessary characteristic if the completed solar cell is to be oriented with substrate 34 toward the sun source. Glass is also generally preferable as the substrate material because of its insulating characteristics, its optical properties, its economy and availability.
Furthermore, glass has a coefficient of expansion which is very close to the coefficient of expansion of the silicon active layer. This is important because both the substrate layer and the active layers, as well as the other layers, will expand and contract during the manufacturing process, because of the high temperatures involved. Under such temperature conditions, any substantial difference in the relative expansion characteristics of the substrate and the active layer, particularly in large-area configurations, will result in sufficient inter-layer stress to cause cracking of the substrate. Borosilicate glass has the required characteristics and has been found to function well in the present process.
Other types of glass having the specified characteristics should be equally useful. After substrate 34 is formed by rollers 32 and 33, it enters a pumpdown chamber, reference 14, wherein the atmospheric pressure surrounding glass substrate 34 is reduced to a near vacuum. Several of the steps of the present process are performed in this near vacuum. Prior to entry of substrate 34 into the pumpdown chamber the temperature of glass substrate 34 is reduced to approximately 8000C. to prevent boiling of the glass in the near-vacuum atmosphere.
In the next step of the process, reference 16, which is accomplished in the near vacuum, a diffusion barrier layer 36 is deposited on upper surface 37 of glass substrate 34. Diffusion barrier layer 36 prevents impurities present in glass substrate 34 from migrating into the silicon active layer during the manufacturing process. Without such a diffusion barrier, the heat generated by the deposition of the silicon active layer, as well as other steps in the process, will result in the impurities present in the glass being diffused into the silicon active layer, substantially reducing its efficiency. If glass substrate 34, however, were free of impurities, diffusion barrier 36 would not be necessary.
In the preferred embodiment, diffusion barrier 36 is a pyrolytic oxide which is deposited on glass substrate 34 at relatively high temperatures. The oxide, being pyrolytic, decomposes at relatively high temperatures, well above the temperature of deposition and the temperature of any other process steps, so as to prevent any impurities in glass substrate 34 from migrating into diffusion barrier 36. Diffusion barrier 36 is preferably relatively thin, in the range of 5,000 to 8,000 angstroms (A), so as to minimize the possibility of its cracking from thermal stress during the remaining steps of the process. The oxide should itself be free from impurities to maintain the silicon layer impurity-free, and further should adhere well to both glass and silicon. A material which meets all of the above requirements is silicon dioxide, and this is the material used in the present process.
The next step in the process, reference 18, is the deposition of an electrically conductive first electrode 40 on top surface 42 of oxide barrier 36. Depending on the anticipated orientation of the completed solar cell relative to the sun, first electrode 40 may or may not be deposited in a pattern, typically in the form of strips of electrode materials spaced a substantial distance apart.
This spacing of the electrode strips permits the sun's rays to reach the silicon active layer. If the solar cell is to be oriented so that the glass substrate 34 is towards the sun, then first electrode 40 is deposited in such a pattern, which may be accomplished by well-known masking techniques. The pattern shown and described comprises a series of narrow strips of material, referred to as fingers, shown in cross-section in Figure 1, which fingers proceed width-wise of the solar cell. The individual fingers are typically joined to each other at one end, respectively, by a bar (not shown), to which an electrode wire or other circuit means may conveniently be connected. The fingers and bar are electrically conductive and form the first electrode for the solar cell.Sufficient interfinger space remains, however, for a large percentage of the light from the sun impinging on glass substrate 34 to reach the silicon active layer.
In the embodiment shown and described, first electrode 40 is deposited in a near vacuum, by conventional techniques of deposition, in thickness typically in the range of 10,000- 20,000 angstroms. The material comprising first electrode 40 is typically metal, preferably a metal having a hign melting point (refractory) which is compatible with glass. Tungsten, tantalum and molybdenum have been successfully used.
However, the electrodes need not necessarily be comprised of metal, as heavily doped silicon has also been used successfully.
The next step in the process, reference 20, is the deposition of small-grain polycrystalline silicon on top of first electrode 40. The silicon active layer also fills in between adjacent strips of patterned first electrode 40 and in those regions extends down to top surface 42 of diffusion barrier 36. As explained above, silicon is used as the active element in the process of the present invention because of its availibility and relatively low cost. Other semiconductor materials and/or compounds, could, however, be successfully utilized in the process of the present invention.
Silicon active layer 44 may be deposited in several ways. One technique which has been used is chemical-vapor-reduction of silicon tetrachloride, which must be accomplished in a controlled hydrogen atmosphere, since the reduction of silicon tetrachloride to pure silicon requires a source of hydrogen. Other techniques of silicon deposition, such as from silane, may be accomplished in a vacuum since a gaseous atmosphere is not required. Still other conventional techniques such as flame spray coating, sputtering, or vacuum evaporation may be used.
In the embodiment shown and described, silicon is deposited in small-grain polycrystalline form in thicknesses of 10-1 00 micrometers.
When silicon is deposited, its crystalline structure is small grain, typically on the order of 1-10 micrometers. It is desirable, for economic reasons, that as little silicon as possible be used. Hence, the silicon active layer is deposited as a thin-film.
The actual depth of the silicon active layer depends on several factors. A PN junction must be formed in the silicon active layer as explained in following paragraphs, but this step requires a thickness of only one micrometer. The depth of the silicon active layer primarily depends upon the desired efficiency of the solar cell. Silicon active layer 44, if 25 micrometers thick, will absorb approximately 80% of the incident photons, while a 100 micrometer thick silicon layer will absorb approximately 95% of the incident photons.
Those solar cells having a silicon active layer less than 25 micrometers thick will have a correspondingly decreased efficiency, while the efficiency of solar cells having active layers thicker than 100 micrometers will increase from 95%. A practical range of active layer depth is 10-100 micrometers. The optimum trade-off between efficiency and cost for most applications will be found within that range.
Silicon layer 44 as deposited, however, is small-grain polycrystalline, and hence, unsuitable for use as is in a solar cell. In the next step of the process, reference 22, silicon layer 44 is melted and reformed into single-crystal or large-grain polycrystalline silicon, which increases the efficiency of the resulting solar cell to a'practical level. As stated above, the silicon as deposited has a small-grain, i.e. several micrometers, crystalline structure. At this grain size, the efficiency of the silicon layer, for solar cell purposes, is extremely low. As the grain size increases, however, the efficiency of the active layer increases correspondingly, until grain sizes of 100 micrometers and larger are obtained, which are suitable for use in solar cells, and referred to as large-grain polycrystals.
The silicon layer 44, originally in small-grain polycrystalline form, may be remelted to form the desired single-crystal or large-grain polycrystalline silicon layer by several different means, among them being electron and/or laser beams. However, these two known methods have significant disadvantages in that their respective heating effects are produced not only in silicon layer 44, but also in first electrode layer 40, oxide barrier 36, and substrate 34. Such a technique is not only inefficient, but can cause migration of impurities present in any of the lower layers into the silicon active layer, thereby significantly diminishing its photovoltaic capability.
Additionally, the heat produced in the substrate will soften it, which presents significant problems in subsequent steps of the process, and affects the configuration and operation of the resulting solar cell. Additionally, such dispersed, penetrating heating has a cooling profile in the remelted silicon layer which proceeds from the base or bottom of the silicon layer toward its upper surface. Such a cooling profile tends to produce a small-grain, rather than a large-grain, crystal formation, due to the face that the crystal structure of the remelted silicon tends to take on the crystal form of the material at which cooling begins.Hence since the cooling with such known techniques proceeds upwardly from the lower surface of silicon layer 44, which is adjacent first electrode 40 and substrate 34 which in turn are small-grain polycrystalline materials, the remelted silicon layer will also tend to be smaller grain than otherwise.
The present process, however, utilizes a heavy particle beam, typically, but not necessarily, a proton beam, in order to accomplish the melting and subsequent recrystallization of silicon layer 44. Significant control is achieved over the heating effect of the proton beam, since the penetration of heavy particles, such as protons, into solid material can be precisely calculated and controlled.
Figure 3 is a graph which plots the penetration depth of a proton beam against the logarithmic value of the beam energy. Not only is it possible to obtain a precise penetration depth by limiting the energy of the beam, but there also exists a maximum penetration depth for a particular material. The energy in the proton beam and the depth dimension of the silicon active layer are adjusted to result in a precisely defined depth of the molten region in silicon layer 44 during the heating (recrystallization) step.
Figure 4 shows a cross-section of a molten region formed by a proton beam. The silicon is melted down to but not beyond the interface between silicon layer 44 and alternatively first electrode layer 40 or diffusion barrier 36. The precise shape of the molten region 48 is not known, although Figure 4 is believed to be generally correct. The largest dimension of molten region 48 is concentrated at some specified depth, usually half-way between the upper and lower surfaces of silicon layer 44. Its width depends on the width of-the heavy-particle beam, which in one embodiment is smaller than the distance between adjacent fingers of electrode 4C but larger than the width of those same fingers.
The specific relative dimensions may be varied to accommodate the desires of the designer and the particular application.
The depth control over the heating effect of the proton beam eliminates the disadvantages of electron and/or laser beams and produces a molten region having a cooling profile which proceeds from the top surface 50 of silicon layer 44 downward toward interface 49 between silicon layer 44 and first electrode layer 40 or diffusion barrier 36. This results in a tendency of the melted silicon to recrystallize in large-grain rather than small-grain polycrystalline form.
Typically, the grain size is increased to at least 100 micrometers, with the melting accomplished by a heavy particle beam, for example, a proton beam. The grain size may even be increased to the point where it is a single-crystal.
In the embodiment shown and described, the proton beam defines a rather narrow line, e.g. 1 millimeter, across the entire width of silicon layer 44 (Figure 2) and as silicon layer 44 and the proton beam move relative to each other, a molten region 54 forms in the silicon layer, taking the form of a narrow rectangle at the upper surface of the silicon layer. The molten region 54 moves longitudinally of silicon layer 44 and separates the deposited small-grain polycrystalline silicon region 58 from the reformed large-grain polycrystalline or single crystal silicon region 56, as glass substrate 57 is moved from right to left relative to the stationary proton beam.
This technique, referred to as a line scan process, has the advantage of a very high production capability, on the order of 25 to 50 square feet per hour. It also greatly reduces any existing impurities in the deposited silicon, as any impurities are collected and maintained in the molten region and hence continuously migrate away from the reformed large-grain polycrystalline silicon, leaving behind, in region 56, a relatively pure silicon in large-grain polycrystalline form. The reformed silicon layer is referenced 44a.
The next step, reference 24, is the formation of a PN junction in the now large-grain polycrystalline or single crystal silicon layer 44a.
As explained briefly above, under conventional solar cell practice a PN junction is necessary in the photovoltaic conversion process since the charge carriers freed by the impinging light must be separated from their region of generation in order to produce a current.
A PN junction may be formed in large-grain silicon layer 44a as follows. In the present process, the silicon originally deposited is slightly doped N-type. Thus, silicon layer 44a is uniformly N-type material prior to the step referenced 24.
The PN junction may be easily formed in the Ndoped silicon layer 44a by doping silicon layer 44a with P-type dopant from the top surface 45 thereof to some specified depth, e.g. mid way of silicon layer 44a. In such a case, the bottom half of silicon layer is N-doped material and the top half P-doped, thus forming the required PN junction 63. Of course, the PN junction could be reversed, with the deposited silicon being initially doped P-type, with the top portion thereof being changed to N-type.
This step of forming the PN junction can be accomplished by any of several conventional techniques including diffusion, epitaxy, or ion implantation, although ion implantation may in some cases by preferred due to its precise control of the doping level and its adaptability to large scale production. The formation of the PN junction should be accomplished in a vacuum.
The temperature of substrate 34 following the step of formation of the PN junction 63 will typically decrease from 7000C., which has been the temperature of the substrate during previous steps, to 3750C.
In the next step in the process, reference 26, a second electrode 62 is formed on the top surface 45 of reformed silicon layer 44a in which a PN junction 63 has been formed. This second electrode 62 is similar in characteristics and purpose to first electrode 40. It provides good ohmic contact to the top side of silicon layer 44a and is generally formed by conventional techniques such as vacuum evaporation or deposition. If first electrode 40 is patterned, then second electrode 62 will be solid and vice versa.
This step is performed in a near vacuum, with substrate 34 typically being at a temperature of about 3750C.
In the last step in the process shown and described, reference 28, a light-transparent oxide layer 64 is applied to upper surface 66 of second electrode 62, to provide protection for the completed solar cell. As in several of the other steps, the oxide is conventionally deposited in a near vacuum, and the temperature of substrate 34 is approximately 3750C. Oxide layer 64 in the embodiment shown and described is relatively thin, on the order of 5,000 angstroms, and may be any one of a number of different oxides, including, but not limited to, a pyrolitic oxide similar to that of diffusion barrier layer 36. Oxide layer 64 has the primary purpose of protecting the reverse side of the solar cell.
The result of the process described above is a solar cell which is shown in exploded form in Figure 5. The solar cell in Figure 5 is oriented so that glass substrate 34 is closest to the sun, although the cell certainly would be operative if it were oppositely oriented, provided that the particular electrode which is between reformed silicon layer 44a and the sun is patterned so as to permit light from the sun to actually impinge upon the silicon layer.Briefly, for the embodiment shown and described, the completed solar cell comprises in sequence the following layers and their respective thicknesses: 1) a glass substrate, approximately 1/4 inch (for terrestrial application); 2) an oxide diffusion barrier, approximately 5,000-8,000 angstroms; 3) a first patterned electrode, approximately 10,000- 20,000 angstroms; 4) a large-grain polycrystalline or single-crystal silicon active layer, having a PN junction formed therein, approximately 10-100 micrometers; 5) a second electrode, approximately 10,000- 20,000 angstroms; and 6) a protective glass layer, approximately 5,000 angstroms. For space applications, where weight is critical, the glass substrate can be extremely thin, i.e.
approximately 250 micrometers.
It should be understood that the individual steps of the process, explained in detail above, as well as the specific dimensions, especially thickness, of each layer define a preferred embodiment of a process and the product produced thereby. Several steps of the process, as well as many of the characteristics and dimensions of the resulting layers comprising the complete solar cell may be modified by men skilled in the art or perhaps even eliminated in specific applications, without detracting from the spirit of the invention, which is a process for inexpensively producing large-area solar cells, in which the semiconductive active element is initially deposited on a substrate in small-grain polycrystalline form. The small-grain polycrystalline layer is then melted in a precise, controlled manner to produce a large-grain polycrystalline or single crystal silicon layer, in which a PN junction is then formed. Electrodes or similar devices positioned strategically within the structure permit a current to flow when connected to a load.
Solar cells made by such a process may take various configurations, including one in which several silicon active layers are separated by electrode interfaces, so as to result in a stacked solar cell, increasing the efficiency and lowering the cost of the basic solar cell.
Other modifications or changes to the process and/or product described above can be accomplished by men skilled in the art in accordance with known techniques or processes, without departing from the scope of the invention as defined by the appended claims.

Claims (28)

Claims
1. A process for making solar cells which use a semiconductor material as their active element, the process comprising the steps of: forming a substrate; forming a first electrode; depositing a layer of semi-conductor material so that one surface thereof is in ohmic contact with said first electrode, said first electrode being positioned intermediate said substrate and said semiconductor layer; recrystallizing said semiconductor layer so as to substantially increase its grain size to the point where it is useful in a solar cell; forming a PN junction in said recrystallized semiconductor layer; and forming a second electrode so that it is in ohmic contact with another surface of the recrystallized semiconductor layer, said solar cell produced thereby capable of providing a current output in response to light impinging on said recrystallized semiconductor layer.
2. The process of Claim 1, wherein said substrate comprises a material having substantially the same coefficient of expansion as said semiconductor material.
3. The process of Claim 1 or 2, wherein said material comprising said substrate is glass.
4. The process of Claim 1, 2 or 3, wherein said semiconductor material is silicon.
5. The process of Claim 1,2,3 or 4, wherein one of said first and second electrodes is formed in a pattern, thereby permitting light to partially pass through said one electrode and impinge upon said recrystallized semiconductor layer.
6. The process of any of the preceding claims, wherein said first and second electrodes are refractory metal.
7. The process of any of the preceding claims, wherein the grain size of said semiconductor material is increased to at least approximately 100 micrometers by the step of recrystallization.
8. The process of any of the preceding claims, including the step of forming a diffusion barrier on one surface of said substrate, such that said diffusion barrier is intermediate said substrate and said first electrode, said diffusion barrier functioning to prevent impurities in said substrate from migrating to said semiconductor layer during the remainder of the process.
9. The process of Claim 8, wherein said diffusion barrier is an oxide.
10. The process of any of the preceding claims, including the step of forming a protective layer on top of said second electrode.
11. The process of any of the preceding claims, wherein the step of recrystallizing said semiconductor layer includes the step of heating said semiconductor layer by a heavy particle beam.
12. The process of any of the preceding claims, wherein said semiconductor layer has a depth within the range of 10-1 00 micrometers.
13. A process for making semiconductor devices using a semiconductor material as its active element comprising the steps of: forming a glass substrate, said glass substrate having substantially the same coefficient of expansion as the semiconductor material; forming a first electrode; depositing a layer of semiconductor material so that one surface thereof is in ohmic contact with said first electrode, said first electrode being positioned intermediate said substrate and said semiconductor layer; and recrystallizing said semiconductor layer so as to increase substantially its grain size so that it is of semiconductor quality.
14. The process of Claim 13, wherein said semiconductor material is silicon.
15. The process of Claim 13 or 14, including the step of forming a diffusion barrier on a surface of said substrate so that said diffusion barrier is intermediate said substrate and said first electrode.
16. The process of Claim 13, 14 or 15, wherein the step of recrystallization includes the step of melting said semiconductor layer with a heavy particle beam.
17. A solar cell, using semiconductor material as its active element, comprising: a substrate; a deposited, thin film layer of semiconductor material having a grain size sufficiently large to be useful in a solar cell, said semiconductor layer having a PN junction formed therein; and first and second electrically-conductive electrodes positioned on opposite surfaces of said semiconductor layer and in ohmic contact therewith, said first electrode being substantially intermediate said substrate and said semiconductor layer, said solar cell capable of producing an electrical current in response to light impinging on said semiconductor layer.
18. The article of Claim 17, wherein said semiconductor layer has a thickness in the range of 10-100 micrometers.
19. The article of Claim 17 or 18, wherein the grain size of said semiconductor material is at least approximately 100 micrometers.
20. The article of Claim 1 7, 18 or 19, wherein said substrate comprises a material having substantially the same coefficient of expansion as said semiconductor layer.
21. The article of Claim 20, wherein the material comprising said substrate is glass.
22. The article of Claim 17,18, or 21, wherein said semiconductor layer is silicon.
23. The article of any one of preceding claims 17 to 22, wherein one of said first and second electrodes is patterned so as to permit light to partially pass therethrough to impinge upon said semiconductor layer.
24. The article of any one of preceding claims 17 to 23, wherein said first and second electrodes are a refractory metal.
25. The article of any one of preceding claims 17 to 24, including a diffusion barrier positioned between said substrate and said first electrode, said diffusion barrier preventing impurities from migrating into said semiconductor layer during the manufacture of the solar cell.
26. The article of Claim 25, wherein said diffusion barrier comprises a material having a coefficient of expansion substantially the same as said semiconductor layer and said substrate.
27. A process for making solar cells substantially as herein described with reference to the accompanying drawings.
28. A solar cell constructed and adapted to operate substantially as herein described with reference to the accompanying drawings.
GB7914545A 1976-07-06 1979-04-26 Continous process for fabricating solar cells Expired GB2047955B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7914545A GB2047955B (en) 1976-07-06 1979-04-26 Continous process for fabricating solar cells

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/702,416 US4152535A (en) 1976-07-06 1976-07-06 Continuous process for fabricating solar cells and the product produced thereby
GB7914545A GB2047955B (en) 1976-07-06 1979-04-26 Continous process for fabricating solar cells

Publications (2)

Publication Number Publication Date
GB2047955A true GB2047955A (en) 1980-12-03
GB2047955B GB2047955B (en) 1983-11-02

Family

ID=32031911

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7914545A Expired GB2047955B (en) 1976-07-06 1979-04-26 Continous process for fabricating solar cells

Country Status (1)

Country Link
GB (1) GB2047955B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989001238A1 (en) * 1987-07-24 1989-02-09 Glasstech Solar, Inc. Solar cell substrate and process for its production
EP0656664A1 (en) * 1993-11-30 1995-06-07 Canon Kabushiki Kaisha Polycrystalline silicon photoelectric transducer and process for its production
DE102005045096A1 (en) * 2005-09-21 2007-03-29 Institut für Physikalische Hochtechnologie e.V. Thin layer solar cell comprises glass substrate, nucleation layer, p- and n-type gallium arsenide and passivation layer, selectively modified by laser-induced crystallization

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989001238A1 (en) * 1987-07-24 1989-02-09 Glasstech Solar, Inc. Solar cell substrate and process for its production
EP0656664A1 (en) * 1993-11-30 1995-06-07 Canon Kabushiki Kaisha Polycrystalline silicon photoelectric transducer and process for its production
US5575862A (en) * 1993-11-30 1996-11-19 Canon Kabushiki Kaisha Polycrystalline silicon photoelectric conversion device and process for its production
DE102005045096A1 (en) * 2005-09-21 2007-03-29 Institut für Physikalische Hochtechnologie e.V. Thin layer solar cell comprises glass substrate, nucleation layer, p- and n-type gallium arsenide and passivation layer, selectively modified by laser-induced crystallization

Also Published As

Publication number Publication date
GB2047955B (en) 1983-11-02

Similar Documents

Publication Publication Date Title
US4152535A (en) Continuous process for fabricating solar cells and the product produced thereby
EP0079790B1 (en) A thin film photovoltaic solar cell and method of making the same
US4113531A (en) Process for fabricating polycrystalline inp-cds solar cells
EP0993052B1 (en) Space solar cell
US4838952A (en) Controlled reflectance solar cell
US4778478A (en) Method of making thin film photovoltaic solar cell
US4879251A (en) Method of making series-connected, thin-film solar module formed of crystalline silicon
US4404422A (en) High efficiency solar cell structure
US4253882A (en) Multiple gap photovoltaic device
US5100478A (en) Solar cell
US4496788A (en) Photovoltaic device
US4461922A (en) Solar cell module
US5066340A (en) Photovoltaic device
US5538564A (en) Three dimensional amorphous silicon/microcrystalline silicon solar cells
EP0341017B1 (en) Deposited-silicon film solar cell
EP0062471B1 (en) Thin film solar cell
US4400221A (en) Fabrication of gallium arsenide-germanium heteroface junction device
EP1231648B1 (en) Solar cell and manufacturing method thereof
US4539431A (en) Pulse anneal method for solar cell
US4385198A (en) Gallium arsenide-germanium heteroface junction device
US4490573A (en) Solar cells
KR970702586A (en) MULTIPLELAYER THIN FILM SOLAR CELLS WITH BURIED CONTACTS
GB2034973A (en) Solar cell with multi-layer insulation
US5575862A (en) Polycrystalline silicon photoelectric conversion device and process for its production
US4650921A (en) Thin film cadmium telluride solar cell

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee